[Tcwg-commits] [llvm] branch master updated (4e7906d9cda -> d3181398276)

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unknown user pushed a change to branch master in repository llvm.

from 4e7906d9cda Fixed the gcc 'enumeral and non-enumeral type in conditiona [...] new 1203053a040 MachineModuleInfo: Remove unused function; NFC new dfcb4f53448 MachineFunction: Slight refactoring; NFC new d3181398276 MachineFunction: Return reference from getFunction(); NFC

The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: include/llvm/Analysis/BlockFrequencyInfoImpl.h | 2 +- include/llvm/CodeGen/MachineFunction.h | 11 +-- include/llvm/CodeGen/MachineModuleInfo.h | 1 - .../CodeGen/MachineOptimizationRemarkEmitter.h | 10 +-- include/llvm/CodeGen/TargetFrameLowering.h | 8 +- include/llvm/IR/Function.h | 2 +- lib/CodeGen/Analysis.cpp | 2 +- lib/CodeGen/AsmPrinter/ARMException.cpp | 12 +-- lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 70 ++++++++-------- lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp | 2 +- lib/CodeGen/AsmPrinter/CodeViewDebug.cpp | 16 ++-- lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp | 4 +- lib/CodeGen/AsmPrinter/DwarfCFIException.cpp | 14 ++-- lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 6 +- lib/CodeGen/AsmPrinter/WinException.cpp | 50 +++++------ lib/CodeGen/BranchFolding.cpp | 6 +- lib/CodeGen/DeadMachineInstructionElim.cpp | 2 +- lib/CodeGen/EarlyIfConversion.cpp | 2 +- lib/CodeGen/ExecutionDepsFix.cpp | 2 +- lib/CodeGen/FEntryInserter.cpp | 2 +- lib/CodeGen/GCRootLowering.cpp | 4 +- lib/CodeGen/GlobalISel/CallLowering.cpp | 2 +- lib/CodeGen/GlobalISel/IRTranslator.cpp | 16 ++-- lib/CodeGen/GlobalISel/InstructionSelect.cpp | 2 +- lib/CodeGen/GlobalISel/Legalizer.cpp | 2 +- lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 6 +- lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 4 +- lib/CodeGen/GlobalISel/RegBankSelect.cpp | 4 +- lib/CodeGen/IfConversion.cpp | 2 +- lib/CodeGen/LexicalScopes.cpp | 4 +- lib/CodeGen/LiveDebugValues.cpp | 4 +- lib/CodeGen/LiveDebugVariables.cpp | 2 +- lib/CodeGen/LiveRangeShrink.cpp | 2 +- lib/CodeGen/MIRParser/MIParser.cpp | 22 ++--- lib/CodeGen/MIRParser/MIRParser.cpp | 4 +- lib/CodeGen/MIRPrinter.cpp | 6 +- lib/CodeGen/MachineBasicBlock.cpp | 4 +- lib/CodeGen/MachineBlockFrequencyInfo.cpp | 8 +- lib/CodeGen/MachineBlockPlacement.cpp | 16 ++-- lib/CodeGen/MachineCSE.cpp | 2 +- lib/CodeGen/MachineCombiner.cpp | 2 +- lib/CodeGen/MachineCopyPropagation.cpp | 2 +- lib/CodeGen/MachineFunction.cpp | 39 +++++---- lib/CodeGen/MachineInstr.cpp | 2 +- lib/CodeGen/MachineLICM.cpp | 2 +- lib/CodeGen/MachineModuleInfo.cpp | 3 +- lib/CodeGen/MachineOptimizationRemarkEmitter.cpp | 4 +- lib/CodeGen/MachinePipeliner.cpp | 4 +- lib/CodeGen/MachineRegisterInfo.cpp | 2 +- lib/CodeGen/MachineScheduler.cpp | 4 +- lib/CodeGen/MachineSink.cpp | 2 +- lib/CodeGen/MachineVerifier.cpp | 4 +- lib/CodeGen/OptimizePHIs.cpp | 2 +- lib/CodeGen/PatchableFunction.cpp | 4 +- lib/CodeGen/PeepholeOptimizer.cpp | 2 +- lib/CodeGen/PostRASchedulerList.cpp | 2 +- lib/CodeGen/PrologEpilogInserter.cpp | 16 ++-- lib/CodeGen/RegAllocGreedy.cpp | 2 +- lib/CodeGen/RegAllocPBQP.cpp | 2 +- lib/CodeGen/RegUsageInfoCollector.cpp | 6 +- lib/CodeGen/RegUsageInfoPropagate.cpp | 2 +- lib/CodeGen/ResetMachineFunctionPass.cpp | 2 +- lib/CodeGen/ScheduleDAGInstrs.cpp | 2 +- lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 14 ++-- lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 4 +- lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 8 +- lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 22 +++-- lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 6 +- lib/CodeGen/SelectionDAG/TargetLowering.cpp | 6 +- lib/CodeGen/ShrinkWrap.cpp | 10 +-- lib/CodeGen/StackColoring.cpp | 5 +- lib/CodeGen/TailDuplication.cpp | 2 +- lib/CodeGen/TailDuplicator.cpp | 2 +- lib/CodeGen/TargetFrameLoweringImpl.cpp | 6 +- lib/CodeGen/TargetLoweringBase.cpp | 4 +- lib/CodeGen/TargetOptionsImpl.cpp | 2 +- lib/CodeGen/TargetRegisterInfo.cpp | 10 +-- lib/CodeGen/TwoAddressInstructionPass.cpp | 2 +- lib/CodeGen/XRayInstrumentation.cpp | 2 +- lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp | 2 +- lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp | 2 +- lib/Target/AArch64/AArch64CallLowering.cpp | 4 +- .../AArch64/AArch64CleanupLocalDynamicTLSPass.cpp | 2 +- lib/Target/AArch64/AArch64CollectLOH.cpp | 2 +- lib/Target/AArch64/AArch64CondBrTuning.cpp | 2 +- lib/Target/AArch64/AArch64ConditionOptimizer.cpp | 2 +- lib/Target/AArch64/AArch64ConditionalCompares.cpp | 4 +- .../AArch64/AArch64DeadRegisterDefinitionsPass.cpp | 2 +- lib/Target/AArch64/AArch64FalkorHWPFFix.cpp | 2 +- lib/Target/AArch64/AArch64FrameLowering.cpp | 22 ++--- lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 2 +- lib/Target/AArch64/AArch64ISelLowering.cpp | 28 +++---- lib/Target/AArch64/AArch64ISelLowering.h | 6 +- lib/Target/AArch64/AArch64InstrInfo.cpp | 10 +-- lib/Target/AArch64/AArch64InstrInfo.td | 6 +- lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp | 2 +- .../AArch64/AArch64RedundantCopyElimination.cpp | 2 +- lib/Target/AArch64/AArch64RegisterInfo.cpp | 14 ++-- lib/Target/AArch64/AArch64SIMDInstrOpt.cpp | 2 +- lib/Target/AArch64/AArch64StorePairSuppress.cpp | 2 +- lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 52 ++++++------ lib/Target/AMDGPU/AMDGPUCallLowering.cpp | 4 +- lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 6 +- lib/Target/AMDGPU/AMDGPUMCInstLower.cpp | 4 +- lib/Target/AMDGPU/AMDGPUMachineFunction.cpp | 2 +- lib/Target/AMDGPU/AMDGPURegisterInfo.cpp | 2 +- lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 4 +- lib/Target/AMDGPU/AMDGPUSubtarget.h | 8 +- lib/Target/AMDGPU/AMDILCFGStructurizer.cpp | 2 +- lib/Target/AMDGPU/GCNIterativeScheduler.cpp | 2 +- lib/Target/AMDGPU/GCNSchedStrategy.cpp | 4 +- lib/Target/AMDGPU/R600ClauseMergePass.cpp | 2 +- lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp | 4 +- lib/Target/AMDGPU/R600InstrInfo.cpp | 4 +- lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp | 2 +- lib/Target/AMDGPU/SIFoldOperands.cpp | 2 +- lib/Target/AMDGPU/SIFrameLowering.cpp | 6 +- lib/Target/AMDGPU/SIISelLowering.cpp | 30 +++---- lib/Target/AMDGPU/SIInsertSkips.cpp | 2 +- lib/Target/AMDGPU/SIInstrInfo.cpp | 18 ++-- lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 2 +- lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 42 +++++----- lib/Target/AMDGPU/SIMemoryLegalizer.cpp | 4 +- lib/Target/AMDGPU/SIOptimizeExecMasking.cpp | 2 +- lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp | 2 +- lib/Target/AMDGPU/SIPeepholeSDWA.cpp | 2 +- lib/Target/AMDGPU/SIRegisterInfo.cpp | 2 +- lib/Target/AMDGPU/SIShrinkInstructions.cpp | 2 +- lib/Target/AMDGPU/SIWholeQuadMode.cpp | 4 +- lib/Target/ARC/ARCBranchFinalize.cpp | 4 +- lib/Target/ARC/ARCFrameLowering.cpp | 19 ++--- lib/Target/ARC/ARCRegisterInfo.cpp | 3 +- lib/Target/ARM/A15SDOptimizer.cpp | 2 +- lib/Target/ARM/ARMAsmPrinter.cpp | 10 +-- lib/Target/ARM/ARMBaseInstrInfo.cpp | 12 +-- lib/Target/ARM/ARMBaseRegisterInfo.cpp | 18 ++-- lib/Target/ARM/ARMCallLowering.cpp | 6 +- lib/Target/ARM/ARMExpandPseudoInsts.cpp | 2 +- lib/Target/ARM/ARMFastISel.cpp | 2 +- lib/Target/ARM/ARMFrameLowering.cpp | 20 ++--- lib/Target/ARM/ARMISelLowering.cpp | 56 ++++++------- lib/Target/ARM/ARMISelLowering.h | 4 +- lib/Target/ARM/ARMLegalizerInfo.cpp | 4 +- lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 10 +-- lib/Target/ARM/ARMOptimizeBarriersPass.cpp | 2 +- lib/Target/ARM/ARMSelectionDAGInfo.cpp | 2 +- lib/Target/ARM/ARMSubtarget.cpp | 4 +- lib/Target/ARM/MLxExpansionPass.cpp | 2 +- lib/Target/ARM/Thumb2SizeReduction.cpp | 8 +- lib/Target/ARM/ThumbRegisterInfo.cpp | 4 +- lib/Target/AVR/AVRFrameLowering.cpp | 4 +- lib/Target/AVR/AVRISelLowering.cpp | 4 +- lib/Target/AVR/AVRRegisterInfo.cpp | 2 +- lib/Target/BPF/BPFISelLowering.cpp | 8 +- lib/Target/BPF/BPFRegisterInfo.cpp | 6 +- lib/Target/Hexagon/HexagonBitSimplify.cpp | 4 +- lib/Target/Hexagon/HexagonBitTracker.cpp | 2 +- lib/Target/Hexagon/HexagonCFGOptimizer.cpp | 2 +- lib/Target/Hexagon/HexagonConstExtenders.cpp | 2 +- lib/Target/Hexagon/HexagonConstPropagation.cpp | 10 +-- lib/Target/Hexagon/HexagonCopyToCombine.cpp | 6 +- lib/Target/Hexagon/HexagonEarlyIfConv.cpp | 2 +- lib/Target/Hexagon/HexagonExpandCondsets.cpp | 12 +-- lib/Target/Hexagon/HexagonFixupHwLoops.cpp | 2 +- lib/Target/Hexagon/HexagonFrameLowering.cpp | 13 ++- lib/Target/Hexagon/HexagonGenInsert.cpp | 2 +- lib/Target/Hexagon/HexagonGenMux.cpp | 2 +- lib/Target/Hexagon/HexagonGenPredicate.cpp | 2 +- lib/Target/Hexagon/HexagonHardwareLoops.cpp | 2 +- lib/Target/Hexagon/HexagonISelDAGToDAG.cpp | 4 +- lib/Target/Hexagon/HexagonISelLowering.cpp | 8 +- lib/Target/Hexagon/HexagonMachineScheduler.cpp | 2 +- lib/Target/Hexagon/HexagonNewValueJump.cpp | 2 +- lib/Target/Hexagon/HexagonOptAddrMode.cpp | 2 +- lib/Target/Hexagon/HexagonPeephole.cpp | 2 +- lib/Target/Hexagon/HexagonRDFOpt.cpp | 2 +- lib/Target/Hexagon/HexagonSplitDouble.cpp | 2 +- lib/Target/Hexagon/HexagonStoreWidening.cpp | 2 +- lib/Target/Hexagon/HexagonVLIWPacketizer.cpp | 2 +- lib/Target/Hexagon/RDFGraph.cpp | 2 +- lib/Target/Lanai/LanaiISelLowering.cpp | 4 +- lib/Target/MSP430/MSP430ISelLowering.cpp | 2 +- lib/Target/MSP430/MSP430RegisterInfo.cpp | 2 +- lib/Target/Mips/MipsAsmPrinter.cpp | 2 +- lib/Target/Mips/MipsCCState.cpp | 8 +- lib/Target/Mips/MipsConstantIslandPass.cpp | 2 +- lib/Target/Mips/MipsISelLowering.cpp | 10 +-- lib/Target/Mips/MipsRegisterInfo.cpp | 6 +- lib/Target/Mips/MipsSEFrameLowering.cpp | 10 +-- lib/Target/Mips/MipsSEISelDAGToDAG.cpp | 6 +- lib/Target/Mips/MipsSEInstrInfo.cpp | 8 +- lib/Target/Mips/MipsTargetMachine.cpp | 2 +- lib/Target/NVPTX/NVPTXAsmPrinter.cpp | 18 ++-- lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp | 2 +- lib/Target/NVPTX/NVPTXISelLowering.cpp | 16 ++-- lib/Target/NVPTX/NVPTXPeephole.cpp | 2 +- lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp | 2 +- lib/Target/PowerPC/PPCAsmPrinter.cpp | 4 +- lib/Target/PowerPC/PPCBranchCoalescing.cpp | 2 +- lib/Target/PowerPC/PPCEarlyReturn.cpp | 2 +- lib/Target/PowerPC/PPCFrameLowering.cpp | 8 +- lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 2 +- lib/Target/PowerPC/PPCISelLowering.cpp | 30 +++---- lib/Target/PowerPC/PPCISelLowering.h | 4 +- lib/Target/PowerPC/PPCInstrInfo.cpp | 2 +- lib/Target/PowerPC/PPCMIPeephole.cpp | 2 +- lib/Target/PowerPC/PPCPreEmitPeephole.cpp | 2 +- lib/Target/PowerPC/PPCQPXLoadSplat.cpp | 2 +- lib/Target/PowerPC/PPCReduceCRLogicals.cpp | 2 +- lib/Target/PowerPC/PPCRegisterInfo.cpp | 6 +- lib/Target/PowerPC/PPCVSXFMAMutate.cpp | 2 +- lib/Target/PowerPC/PPCVSXSwapRemoval.cpp | 2 +- lib/Target/Sparc/SparcISelLowering.cpp | 12 +-- lib/Target/SystemZ/SystemZElimCompare.cpp | 2 +- lib/Target/SystemZ/SystemZFrameLowering.cpp | 6 +- lib/Target/SystemZ/SystemZISelLowering.cpp | 6 +- lib/Target/SystemZ/SystemZLDCleanup.cpp | 2 +- lib/Target/SystemZ/SystemZRegisterInfo.cpp | 4 +- lib/Target/SystemZ/SystemZShortenInst.cpp | 2 +- lib/Target/X86/X86AsmPrinter.cpp | 2 +- lib/Target/X86/X86CallFrameOptimization.cpp | 4 +- lib/Target/X86/X86CallLowering.cpp | 4 +- lib/Target/X86/X86CmovConversion.cpp | 2 +- lib/Target/X86/X86DomainReassignment.cpp | 2 +- lib/Target/X86/X86ExpandPseudo.cpp | 2 +- lib/Target/X86/X86FixupBWInsts.cpp | 4 +- lib/Target/X86/X86FixupLEAs.cpp | 4 +- lib/Target/X86/X86FloatingPoint.cpp | 4 +- lib/Target/X86/X86FrameLowering.cpp | 67 ++++++++------- lib/Target/X86/X86ISelDAGToDAG.cpp | 10 +-- lib/Target/X86/X86ISelLowering.cpp | 97 +++++++++++----------- lib/Target/X86/X86ISelLowering.h | 4 +- lib/Target/X86/X86InstrInfo.cpp | 28 +++---- lib/Target/X86/X86InstrInfo.td | 8 +- lib/Target/X86/X86OptimizeLEAs.cpp | 4 +- lib/Target/X86/X86PadShortFunction.cpp | 4 +- lib/Target/X86/X86RegisterInfo.cpp | 22 ++--- lib/Target/X86/X86SelectionDAGInfo.cpp | 2 +- lib/Target/X86/X86VZeroUpper.cpp | 2 +- lib/Target/X86/X86WinAllocaExpander.cpp | 4 +- lib/Target/XCore/XCoreFrameLowering.cpp | 8 +- lib/Target/XCore/XCoreInstrInfo.cpp | 2 +- lib/Target/XCore/XCoreMachineFunctionInfo.cpp | 2 +- lib/Target/XCore/XCoreRegisterInfo.cpp | 3 +- unittests/CodeGen/MachineInstrTest.cpp | 3 +- 245 files changed, 852 insertions(+), 864 deletions(-)