[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig updated (b05629230e9 -> 13e19d2e7cd)

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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig in repository toolchain/ci/llvm-project.

from b05629230e9 [mlir] Remove redundant shape.cstr_broadcastable canonicalization. adds a2fb5446be9 [SelectionDAG] Check any use of negation result before removal adds 6637d72ddd3 [Lint] Add check for intrinsic get.active.lane.mask adds d49707cf4b2 [AMDGPU] Generate test checks for splitkit-copy-bundle.mir adds 6f6d389da5c [SplitKit] Only copy live lanes adds aadf55d1cea [NFC] EliminateDuplicatePHINodes(): small-size optimization [...] adds b03c2b8395b Revert "Re-land: Add new hidden option -print-changed which [...] adds a9cbe5cf30e [X86] Fix stack alignment on 32-bit Solaris/x86 adds c687af0c30b [lldb] Don't send invalid region addresses to lldb server adds 9218f928380 [clang][aarch64] ACLE: Support implicit casts between GNU a [...] adds 347d59b16c7 [mlir][Linalg] Convolution tiling added to ConvOp vectoriza [...] adds 4ae1bb193a5 [AsmPrinter] Remove orphan DwarfUnit::shareAcrossDWOCUs dec [...] adds 8adf92e2d11 [AMDGPU] Remove orphan SITargetLowering::LowerINT_TO_FP dec [...] adds 550b1a6fd46 [AsmPrinter] DwarfDebug - use DebugLoc const references whe [...] adds f108e71437c [MLIR] Turns swapId into a FlatAffineConstraints member func adds 504697e6f40 [gn build] (manually) port c9af34027bc adds 68cfb026685 [mlir] turn clang-format back on in C API test adds a615226743d [ARM] Extra fp16 bitcast tests. NFC adds 71f237506b8 DwarfFile.h - remove unnecessary includes. NFCI. adds 572e542c5e5 DwarfStringPool.cpp - remove unnecessary StringRef include. NFCI. adds fece1489d10 [ARM] Additional tests for qr intrinsics in loops. NFC adds c65627a1fe3 Revert "[lldb] Don't send invalid region addresses to lldb server" adds 97a476eb567 [NFC][ARM] Tail fold test changes adds ed53ff4cde3 SymbolizableObjectFile.h - remove unnecessary includes. NFCI. adds abe0d8551da MetadataLoader.cpp - remove unnecessary StringRef include. NFCI. adds 40e771c1c0d [clang-format][regression][PR47461] ifdef causes catch to b [...] adds bb037c2a762 [ConstraintSystem] Remove local variable that is set but no [...] adds aa896a0b3a9 Remove unnecessary forward declarations. NFCI. adds 788c7d2ec11 [clang][docs] Fix documentation of -O adds 03783f19dc7 [SLP] sort candidates to increase chance of optimal compare [...] adds 0dca1ac617d [llvm-readelf/obj][test] - Document what we print in variou [...] adds 279943edf87 [obj2yaml] - Don't emit EM_NONE. adds f7185b271f5 [SVE][CodeGen] Lower floating point -> integer conversions adds 9dc1e53787a [MemorySSA] Add another loop clobber test case. adds deb8f8bcf31 [ARM][MachineOutliner] Add missing testcase for calls. adds f0268121108 InstCombiner.h - remove unnecessary KnownBits.h include. NFCI. adds e4a198eeee3 [AMDGPU] Bump to ROCm 3.7 dependency hip_hcc->amdhip64 adds 67ae46c820f SafeStackLayout.cpp - remove unnecessary StackLifetime.h in [...] adds 69516ddd028 [compiler-rt] Avoid pulling libatomic to sanitizer tests adds d566771779c ValueList.cpp - remove unnecessary includes. NFCI. adds 46e59062a0e DwarfExpression.cpp - remove unnecessary includes. NFCI. adds 85ba2f16633 LiveDebugVariables.cpp - remove unnecessary Compiler.h incl [...] adds 85e578f53ad [compiler-rt] Replace INLINE with inline adds 9339f68f21f [compiler-rt] [tsan] [netbsd] Catch unsupported LONG_JMP_SP [...] adds 0efbb70b719 [AMDGPU] should expand ROTL i16 to shifts. adds 72c5feeed8d [compiler-rt] [netbsd] Include <sys/dkbad.h> adds e7de267910e [compiler-rt] [hwasan] Replace INLINE with inline adds 5e0ded26892 [mlir][Standard] Canonicalize chains of tensor_cast operations adds 7b2dd58eb09 [compiler-rt] [scudo] Fix typo in function attribute adds 34b27b9441d [ARM] Sink splats to MVE intrinsics adds c3492a1aa1b [amdgpu] Lower SGPR-to-VGPR copy in the final phase of ISel. adds a3c28ccd493 [libc++] Remove some workarounds for missing variadic templates adds 5b533d6cdee [Coroutine] Fix a bug where Coroutine incorrectly spills ph [...] adds d5ce8233bfc [OpenMP 5.0] Fix user-defined mapper privatization in tasks adds 559f9198125 [DFSan] Add bcmp wrapper. adds 3ee87a976d5 Precommit test updates adds d5fd3d9b903 [AArch64] Match pairwise add/fadd pattern adds 40df06cdafc [CUDA][HIP] Defer overloading resolution diagnostics for ho [...] adds 72a4a478fe1 [ARM] Add more MVE postinc distribution tests. NFC adds 6d3cabd90ee [mlir][openacc] Change operand type from index to AnyIntege [...] adds f0e028f4b32 [flang][openacc] Lower clauses on loop construct to OpenACC [...] adds 7688027f166 [Test] Add tests showing that IndVars cannot prove (X + 1 > X) adds df017fd906b Revert "[DFSan] Add bcmp wrapper." adds 2a56a0ba086 ModuloSchedule.cpp - remove unnecessary includes. NFCI. adds 7f1f89ec8d9 Fix build failure in clangd adds f16abe5f84e [mlir][Vector] Add a folder for vector.broadcast adds 79b21fc1876 [AArch64][GlobalISel] Fix bug in fewVectorElts action while [...] adds 7f7993e0daf [ARM] Expand distributing increments to also handle existin [...] adds c6ebe3fd002 [InstSimplify] add tests for FP constant miscompile; NFC (PR43907) adds 7d593d0d690 [amdgpu] Compilation fix for Release adds 1e19165bd89 [SyntaxTree][Synthesis] Fix allocation in `createTree` for [...] adds 50dd545b00e [DFSan] Add bcmp wrapper. adds e09107ab80d [Sema] Introduce BuiltinAttr, per-declaration builtin-ness adds fb182028361 [AMDGPU] Fix ROCm unit test memref initialization adds dd28254063f Add missing include adds 50f1d4517ae [PowerPC][AIX] Don't hardcode python invoke command line adds e06914b59bf [VectorCombine] add test for multi-use load (PR47558); NFC adds ddd9575d15a [VectorCombine] rearrange bailouts for load insert for effi [...] adds 772bd8a7d99 Revert "[CUDA][HIP] Defer overloading resolution diagnostic [...] adds 829d14ee0a6 Revert "[NFC] Refactor DiagnosticBuilder and PartialDiagnostic" adds 296e97ae8f7 [MLIR] Support for return values in Affine.For yield adds 0602e8f77f8 [MLIR][Affine] Add parametric tile size support for affine. [...] adds 3783d3bc7b3 [X86] Don't match x87 register inline asm constraints unles [...] adds 48a23bccf37 [VectorCombine] limit load+insert transform to one-use adds bea7749d036 [AArch64][GlobalISel] Make <8 x s16> and <16 x s8> legal fo [...] adds 7d5b1034837 [AArch64][GlobalISel] Widen G_EXTRACT_VECTOR_ELT element ty [...] adds 1e5b7e91aa6 [PDB] Split TypeServerSource and extend type index map lifetime adds a35c7f30769 [SVE][WIP] Implement lowering for fixed length VSELECT to Scalable adds 7e4c6fb8546 [IRSim] Adding IR Instruction Mapper adds 667762c64e0 [gn build] Port 7e4c6fb8546 adds c145a1ca259 AArch64::ArchKind's underlying type is uint64_t adds 5813fca1076 [Lsan] Use fp registers to search for pointers adds a4bb71b1c0d Disable hoisting MI to hotter basic blocks when using pgo adds 51973a607df [SCEV] Add test cases for max BTC with loop guard info. adds 59855b9d3ba [GVN] Add additional assume tests (NFC) adds 91ce8e121b7 [GVN] Use that assume(!X) implies X==false (PR47496) adds 1cee33e9dbb [LoopUnrollAndJam] Allow unroll and jam loops forced by user. adds 05d4c4ebc2f [InstCombine] Canonicalize SPF_ABS to abs intrinc adds 53ba045f488 [llvm-install-name-tool] Update the command-line guide adds 179a22e807a [NewPM] Fix pr45927.ll under NPM adds a0017c2bc25 [MemorySSA] Be more conservative when traversing MemoryPhis. adds 0ff28fa6a75 Support dwarf fission for wasm object files adds cab780a5a0e [NFC] Test Commit adds 99e865b618f [TargetRegisterInfo] Add a couple of target hooks for the g [...] adds f2f0474c93e [test] Fix FullUnroll.ll adds b04c181ed77 [AArch64] Enable implicit null check transformation adds 1c466477ad4 [RISCV] Support Shadow Call Stack adds 8069844577d [MLIR][TableGen] Automatic detection and elimination of red [...] adds b4013f9c7fe [MemorySSA] Fix an unused variable warning [NFC] adds 2c3bc918db3 [PowerPC] Implement Vector Count Mask Bits builtins in LLVM/Clang adds 6f3c0991bf9 [PowerPC] Add Set Boolean Condition Instruction Definitions [...] adds 196e2f97b71 [AArch64][GlobalISel] clang-format AArch64LegalizerInfo.cpp. NFC. adds f5898f8c2de [AArch64][GlobalISel] Make G_STORE <8 x s8> legal. adds 4926a5ee630 [lldb] Clarify docstring for SBBlock::IsInlined, NFC adds bae63742057 [mlir][shape] Add `shape.cstr_require %bool` adds ea237e2c8e5 [MLIR] Fix build failure due to https://reviews.llvm.org/D87059. adds 27f34540ea5 [scudo/standalone] Don't define test main function for Fuchsia adds 03358becbf2 [NFC][Lsan] Fix zero-sized array compilation error adds 55edf7039e2 [NFC] clang-format one line adds 2ffaa9a1732 [sanitizer] Add facility to print the full StackDepot adds f55963d501e [libc] Add implementation for hypotf adds 6e475e1288e Revert "[sanitizer] Add facility to print the full StackDepot" adds 992698cfbc8 [AArch64] Emit zext move when the source of the zext is Ass [...] adds fb92f863f68 [X86] Add some demanded bits test cases for PDEP with const [...] adds 9d54b166c2e This is a test commit adds 5a733468e09 Revert "This is a test commit" new 8a86261c511 [FPEnv] Use typed accessors in FPOptions new 8f09cec8c99 [AArch64] Add tests for zext pattern match with AssertZext/ [...] new f16c4a3704f [NFC][fuzzer] Simplify StrcmpTest.cpp new 13e19d2e7cd Revert "[InstCombine] Canonicalize SPF_ABS to abs intrinc"

The 4 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: clang/docs/CommandGuide/clang.rst | 2 +- clang/include/clang/AST/ASTContext.h | 5 +- clang/include/clang/AST/Attr.h | 11 +- clang/include/clang/AST/CanonicalType.h | 4 +- clang/include/clang/AST/Decl.h | 10 +- clang/include/clang/AST/DeclCXX.h | 7 +- clang/include/clang/AST/DeclarationName.h | 13 +- clang/include/clang/AST/NestedNameSpecifier.h | 4 +- clang/include/clang/AST/TemplateBase.h | 4 +- clang/include/clang/AST/TemplateName.h | 6 +- clang/include/clang/AST/Type.h | 39 +- clang/include/clang/Basic/Attr.td | 8 + clang/include/clang/Basic/Builtins.def | 1 + clang/include/clang/Basic/BuiltinsPPC.def | 6 + clang/include/clang/Basic/Diagnostic.h | 143 +-- clang/include/clang/Basic/FPOptions.def | 2 +- clang/include/clang/Basic/IdentifierTable.h | 12 - clang/include/clang/Basic/LangOptions.h | 9 +- clang/include/clang/Basic/PartialDiagnostic.h | 98 +- clang/include/clang/Sema/Ownership.h | 10 +- clang/include/clang/Sema/ParsedAttr.h | 22 +- clang/include/clang/Sema/Sema.h | 13 +- clang/include/clang/Tooling/Syntax/BuildTree.h | 6 +- clang/lib/AST/ASTContext.cpp | 10 +- clang/lib/AST/Decl.cpp | 28 +- clang/lib/AST/DeclCXX.cpp | 9 +- clang/lib/AST/TemplateBase.cpp | 9 +- clang/lib/AST/TemplateName.cpp | 18 +- clang/lib/Basic/Diagnostic.cpp | 9 +- clang/lib/CodeGen/CGOpenMPRuntime.cpp | 54 +- clang/lib/Driver/SanitizerArgs.cpp | 6 +- clang/lib/Driver/ToolChain.cpp | 3 +- clang/lib/Driver/ToolChains/Arch/AArch64.cpp | 2 +- clang/lib/Driver/ToolChains/Clang.cpp | 3 +- clang/lib/Format/FormatTokenLexer.cpp | 2 +- clang/lib/Headers/altivec.h | 12 + clang/lib/Headers/intrin.h | 145 +-- clang/lib/Sema/SemaDecl.cpp | 119 +- clang/lib/Sema/SemaExpr.cpp | 1 + clang/lib/Sema/SemaLookup.cpp | 7 +- clang/lib/Serialization/ASTReader.cpp | 12 +- clang/lib/Serialization/ASTWriter.cpp | 6 +- clang/lib/Tooling/Syntax/Synthesis.cpp | 145 ++- clang/test/AST/ast-dump-attr.cpp | 1 + clang/test/AST/ast-dump-fpfeatures.cpp | 14 +- clang/test/CodeGen/attr-arm-sve-vector-bits-cast.c | 53 + clang/test/CodeGen/builtin-redeclaration.c | 16 + clang/test/CodeGen/builtins-ppc-p10vector.c | 24 + clang/test/CodeGen/callback_pthread_create.c | 4 + clang/test/CodeGen/shadowcallstack-attr.c | 24 +- clang/test/CodeGenCXX/builtins.cpp | 14 + clang/test/Driver/sanitizer-ld.c | 10 + clang/test/Driver/split-debug.c | 5 + clang/test/OpenMP/target_depend_codegen.cpp | 89 +- clang/test/Sema/attr-arm-sve-vector-bits.c | 92 +- clang/test/Sema/implicit-builtin-decl.c | 5 - clang/test/Sema/warn-fortify-source.c | 19 +- clang/test/SemaCXX/attr-arm-sve-vector-bits.cpp | 14 +- clang/test/SemaCXX/cxx11-compat.cpp | 2 +- clang/test/SemaCXX/warn-unused-local-typedef.cpp | 4 +- clang/unittests/Format/FormatTest.cpp | 37 + compiler-rt/lib/asan/asan_malloc_linux.cpp | 8 +- compiler-rt/lib/asan/asan_malloc_local.h | 2 +- compiler-rt/lib/asan/asan_report.cpp | 2 +- compiler-rt/lib/dfsan/dfsan_custom.cpp | 38 +- compiler-rt/lib/dfsan/done_abilist.txt | 1 + compiler-rt/lib/hwasan/hwasan_malloc_bisect.h | 2 +- compiler-rt/lib/msan/tests/msan_test.cpp | 18 +- .../lib/sanitizer_common/sanitizer_allocator.h | 6 +- .../sanitizer_common/sanitizer_allocator_checks.h | 10 +- .../sanitizer_allocator_secondary.h | 8 +- .../lib/sanitizer_common/sanitizer_atomic.h | 4 +- .../lib/sanitizer_common/sanitizer_atomic_clang.h | 14 +- .../sanitizer_common/sanitizer_atomic_clang_mips.h | 10 +- .../sanitizer_atomic_clang_other.h | 6 +- .../sanitizer_common/sanitizer_atomic_clang_x86.h | 6 +- .../lib/sanitizer_common/sanitizer_atomic_msvc.h | 36 +- .../lib/sanitizer_common/sanitizer_common.h | 56 +- .../lib/sanitizer_common/sanitizer_internal_defs.h | 3 - compiler-rt/lib/sanitizer_common/sanitizer_linux.h | 2 +- .../sanitizer_common/sanitizer_linux_libcdep.cpp | 2 +- compiler-rt/lib/sanitizer_common/sanitizer_mac.h | 2 +- .../sanitizer_platform_limits_freebsd.cpp | 2 - .../sanitizer_platform_limits_netbsd.cpp | 1 + .../sanitizer_stoptheworld_linux_libcdep.cpp | 65 +- .../sanitizer_symbolizer_report.cpp | 4 +- .../tests/sanitizer_atomic_test.cpp | 18 + compiler-rt/lib/scudo/scudo_allocator.cpp | 24 +- compiler-rt/lib/scudo/scudo_crc32.h | 2 +- compiler-rt/lib/scudo/scudo_tsd.h | 8 +- compiler-rt/lib/scudo/scudo_utils.cpp | 2 +- compiler-rt/lib/scudo/scudo_utils.h | 2 +- .../standalone/tests/scudo_unit_test_main.cpp | 8 +- compiler-rt/lib/tsan/rtl/tsan_interceptors.h | 2 +- compiler-rt/lib/tsan/rtl/tsan_platform_linux.cpp | 10 +- compiler-rt/lib/tsan/rtl/tsan_rtl.h | 10 +- compiler-rt/test/dfsan/custom.cpp | 24 +- compiler-rt/test/fuzzer/StrcmpTest.cpp | 4 +- compiler-rt/test/lsan/TestCases/use_registers.cpp | 5 +- .../{use_registers.cpp => use_registers_extra.cpp} | 47 +- .../test/ubsan/TestCases/TypeCheck/vptr.cpp | 6 +- flang/include/flang/Optimizer/Dialect/FIRDialect.h | 1 + flang/lib/Lower/OpenACC.cpp | 190 +++- libc/config/linux/aarch64/entrypoints.txt | 1 + libc/config/linux/api.td | 1 + libc/config/linux/x86_64/entrypoints.txt | 1 + libc/spec/stdc.td | 2 + libc/src/math/CMakeLists.txt | 12 + libc/src/math/hypotf.cpp | 222 ++++ libc/src/math/hypotf.h | 18 + libc/test/src/math/CMakeLists.txt | 13 + libc/test/src/math/hypotf_test.cpp | 65 ++ libcxx/include/__config | 4 - libcxx/include/future | 6 +- libcxx/include/memory | 157 +-- libcxx/include/type_traits | 237 ++-- .../member_function_pointer_no_variadics.pass.cpp | 84 -- lld/COFF/DebugTypes.cpp | 141 +-- lld/COFF/DebugTypes.h | 20 +- lld/COFF/InputFiles.cpp | 8 +- lld/COFF/PDB.cpp | 80 +- lld/COFF/TypeMerger.h | 9 - lldb/bindings/interface/SBBlock.i | 2 +- llvm/docs/CommandGuide/llvm-install-name-tool.rst | 8 + llvm/include/llvm/ADT/FloatingPointMode.h | 18 + .../include/llvm/Analysis/IRSimilarityIdentifier.h | 367 ++++++ llvm/include/llvm/Analysis/MemorySSA.h | 46 +- llvm/include/llvm/CodeGen/TargetRegisterInfo.h | 30 + llvm/include/llvm/DebugInfo/PDB/PDBSymbol.h | 1 - .../llvm/ExecutionEngine/Orc/CompileUtils.h | 2 - .../llvm/ExecutionEngine/Orc/GlobalMappingLayer.h | 1 - llvm/include/llvm/IR/IntrinsicsPowerPC.td | 14 + llvm/include/llvm/IR/LegacyPassManagers.h | 1 - llvm/include/llvm/MC/MCELFObjectWriter.h | 1 - llvm/include/llvm/MC/MCParser/MCTargetAsmParser.h | 1 - llvm/include/llvm/MC/MCWasmObjectWriter.h | 4 + .../include/llvm/Passes/StandardInstrumentations.h | 92 -- llvm/include/llvm/ProfileData/SampleProf.h | 2 - llvm/include/llvm/Support/AArch64TargetParser.h | 4 +- llvm/include/llvm/Transforms/Utils/LoopUtils.h | 1 - .../include/llvm/Transforms/Utils/LoopVersioning.h | 1 - llvm/lib/Analysis/CMakeLists.txt | 1 + llvm/lib/Analysis/ConstraintSystem.cpp | 2 - llvm/lib/Analysis/IRSimilarityIdentifier.cpp | 156 +++ llvm/lib/Analysis/Lint.cpp | 5 + llvm/lib/Bitcode/Reader/MetadataLoader.cpp | 3 - llvm/lib/Bitcode/Reader/ValueList.cpp | 3 - llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp | 5 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 8 +- llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp | 3 - llvm/lib/CodeGen/AsmPrinter/DwarfFile.cpp | 3 +- llvm/lib/CodeGen/AsmPrinter/DwarfFile.h | 3 +- llvm/lib/CodeGen/AsmPrinter/DwarfStringPool.cpp | 1 - llvm/lib/CodeGen/AsmPrinter/DwarfUnit.h | 1 - llvm/lib/CodeGen/BranchRelaxation.cpp | 40 +- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 2 +- llvm/lib/CodeGen/ImplicitNullChecks.cpp | 66 +- llvm/lib/CodeGen/LiveDebugVariables.cpp | 1 - llvm/lib/CodeGen/MachineLICM.cpp | 2 +- llvm/lib/CodeGen/ModuloSchedule.cpp | 2 - llvm/lib/CodeGen/RegAllocGreedy.cpp | 7 +- llvm/lib/CodeGen/SafeStackLayout.cpp | 1 - llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 22 +- llvm/lib/CodeGen/SplitKit.cpp | 9 +- .../DebugInfo/Symbolize/SymbolizableObjectFile.cpp | 9 - .../DebugInfo/Symbolize/SymbolizableObjectFile.h | 6 +- llvm/lib/IR/LegacyPassManager.cpp | 4 +- llvm/lib/MC/MCAsmBackend.cpp | 15 +- llvm/lib/MC/MCObjectFileInfo.cpp | 35 + llvm/lib/MC/WasmObjectWriter.cpp | 345 +++--- llvm/lib/Passes/StandardInstrumentations.cpp | 228 +--- llvm/lib/Support/AArch64TargetParser.cpp | 6 +- llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp | 48 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 123 +- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 9 +- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 50 + llvm/lib/Target/AArch64/AArch64InstrInfo.h | 3 + llvm/lib/Target/AArch64/AArch64InstrInfo.td | 3 + llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 76 +- .../Target/AArch64/GISel/AArch64LegalizerInfo.cpp | 130 ++- llvm/lib/Target/AArch64/SVEInstrFormats.td | 13 +- .../Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp | 1 + llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 5 + llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 66 +- llvm/lib/Target/AMDGPU/SIISelLowering.h | 1 - llvm/lib/Target/ARM/ARMISelLowering.cpp | 13 + llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 176 ++- llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 1 + llvm/lib/Target/PowerPC/PPCInstrPrefix.td | 39 +- llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 1 + llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 113 +- llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.cpp | 3 + llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.h | 3 + llvm/lib/Target/X86/X86ISelLowering.cpp | 38 +- llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp | 1 + llvm/lib/Target/X86/X86Subtarget.cpp | 9 +- llvm/lib/Transforms/Coroutines/CoroFrame.cpp | 41 +- llvm/lib/Transforms/Scalar/GVN.cpp | 5 + .../lib/Transforms/Scalar/LoopUnrollAndJamPass.cpp | 11 +- llvm/lib/Transforms/Utils/Local.cpp | 55 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 30 +- llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 16 +- llvm/test/Analysis/Lint/get-active-lane-mask.ll | 39 + llvm/test/Analysis/MemorySSA/phi-translation.ll | 41 + llvm/test/Analysis/MemorySSA/pr45927.ll | 2 +- .../max-backedge-taken-count-guard-info.ll | 55 + .../GlobalISel/legalize-extract-vector-elt.mir | 114 +- .../AArch64/GlobalISel/legalize-fptrunc.mir | 139 +++ .../AArch64/GlobalISel/legalize-load-store.mir | 129 +-- .../CodeGen/AArch64/GlobalISel/legalize-shift.mir | 86 +- .../GlobalISel/regbank-extract-vector-elt.mir | 2 +- llvm/test/CodeGen/AArch64/O3-pipeline.ll | 1 + .../test/CodeGen/AArch64/arm64-assert-zext-sext.ll | 48 + llvm/test/CodeGen/AArch64/arm64-vcvt.ll | 3 + llvm/test/CodeGen/AArch64/faddp-half.ll | 141 +++ llvm/test/CodeGen/AArch64/faddp.ll | 102 ++ llvm/test/CodeGen/AArch64/implicit-null-check.ll | 75 +- llvm/test/CodeGen/AArch64/shift_minsize.ll | 6 +- llvm/test/CodeGen/AArch64/sve-fcvt.ll | 296 +++++ .../CodeGen/AArch64/sve-fixed-length-fp-select.ll | 317 ++++++ .../CodeGen/AArch64/sve-fixed-length-int-select.ll | 415 +++++++ llvm/test/CodeGen/AArch64/sve-split-fcvt.ll | 97 ++ llvm/test/CodeGen/AArch64/vecreduce-fadd.ll | 275 ++++- llvm/test/CodeGen/AMDGPU/fabs.ll | 6 +- llvm/test/CodeGen/AMDGPU/fneg-fabs.ll | 6 +- llvm/test/CodeGen/AMDGPU/rotl.ll | 25 + llvm/test/CodeGen/AMDGPU/rotr.ll | 25 + llvm/test/CodeGen/AMDGPU/sgpr-copy-cse.ll | 26 + llvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll | 2 +- llvm/test/CodeGen/AMDGPU/splitkit-copy-bundle.mir | 189 +++- .../CodeGen/AMDGPU/splitkit-copy-live-lanes.mir | 525 +++++++++ .../CodeGen/AMDGPU/subreg-split-live-in-error.mir | 6 +- llvm/test/CodeGen/AMDGPU/waitcnt-vscnt.ll | 4 +- llvm/test/CodeGen/AMDGPU/wqm.ll | 4 +- llvm/test/CodeGen/ARM/O3-pipeline.ll | 1 + llvm/test/CodeGen/ARM/fp16-bitcast.ll | 63 ++ llvm/test/CodeGen/ARM/machine-outliner-calls.mir | 360 ++++++ llvm/test/CodeGen/PowerPC/aix-overflow-toc.py | 2 +- llvm/test/CodeGen/PowerPC/p10-vector-mask-ops.ll | 45 + llvm/test/CodeGen/RISCV/shadowcallstack.ll | 174 +++ .../CodeGen/Thumb2/LowOverheadLoops/mov-operand.ll | 13 +- .../test/CodeGen/Thumb2/mve-postinc-distribute.mir | 1061 ++++++++++++++++++ llvm/test/CodeGen/Thumb2/mve-postinc-lsr.ll | 188 ++-- llvm/test/CodeGen/Thumb2/mve-qrintr.ll | 693 ++++++++++++ llvm/test/CodeGen/Thumb2/mve-vst2.ll | 17 +- llvm/test/CodeGen/Thumb2/mve-vst3.ll | 7 +- llvm/test/CodeGen/X86/asm-reject-x87-int.ll | 39 + llvm/test/CodeGen/X86/bmi2-x86_64.ll | 12 + llvm/test/CodeGen/X86/bmi2.ll | 19 + llvm/test/CodeGen/X86/opt-pipeline.ll | 1 + llvm/test/CodeGen/X86/pr47517.ll | 28 + llvm/test/CodeGen/X86/stack-align2.ll | 7 +- llvm/test/DebugInfo/WebAssembly/fission-cu.ll | 121 ++ .../test/DebugInfo/WebAssembly/fission-sections.ll | 48 + .../Disassembler/PowerPC/ppc64-encoding-ISA31.txt | 12 + llvm/test/MC/PowerPC/ppc64-encoding-ISA31.s | 12 + llvm/test/Other/change-printer.ll | 109 -- .../Coroutines/coro-spill-defs-before-corobegin.ll | 80 ++ llvm/test/Transforms/GVN/assume.ll | 44 + .../Transforms/IndVarSimplify/trivial-checks.ll | 186 ++++ .../test/Transforms/InstSimplify/ConstProp/cast.ll | 18 + llvm/test/Transforms/LoopUnroll/FullUnroll.ll | 4 +- .../Transforms/LoopUnrollAndJam/pragma-explicit.ll | 4 +- .../LoopVectorize/ARM/tail-fold-multiple-icmps.ll | 84 ++ .../LoopVectorize/ARM/tail-folding-not-allowed.ll | 575 +++++++++- .../Transforms/SLPVectorizer/X86/compare-reduce.ll | 71 +- llvm/test/Transforms/VectorCombine/X86/load.ll | 30 + llvm/test/tools/llvm-readobj/ELF/dyn-symbols.test | 28 +- llvm/test/tools/llvm-readobj/ELF/hash-symbols.test | 35 +- llvm/test/tools/llvm-readobj/ELF/mips-got.test | 55 + llvm/test/tools/llvm-readobj/ELF/mips-plt.test | 72 ++ llvm/test/tools/llvm-readobj/ELF/symbol-shndx.test | 75 +- .../obj2yaml/ELF/call-graph-profile-section.yaml | 7 +- .../ELF/duplicate-symbol-and-section-names.yaml | 7 +- llvm/test/tools/obj2yaml/ELF/emachine.yaml | 44 +- .../tools/obj2yaml/ELF/gnu-unique-symbols.yaml | 9 +- .../obj2yaml/ELF/implicit-sections-order.yaml | 14 +- .../tools/obj2yaml/ELF/invalid-section-name.yaml | 7 +- llvm/test/tools/obj2yaml/ELF/no-symtab.yaml | 14 +- llvm/test/tools/obj2yaml/ELF/null-section.yaml | 28 +- llvm/test/tools/obj2yaml/ELF/sht-symtab-shndx.yaml | 7 +- llvm/test/tools/obj2yaml/ELF/stack-sizes.yaml | 28 +- .../test/tools/obj2yaml/ELF/symbol-visibility.yaml | 7 +- llvm/test/tools/obj2yaml/ELF/versym-section.yaml | 9 +- llvm/tools/obj2yaml/elf2yaml.cpp | 3 +- llvm/unittests/Analysis/CMakeLists.txt | 1 + .../Analysis/IRSimilarityIdentifierTest.cpp | 1177 ++++++++++++++++++++ llvm/unittests/Support/TargetParserTest.cpp | 8 +- .../gn/secondary/compiler-rt/lib/builtins/BUILD.gn | 1 + llvm/utils/gn/secondary/llvm/lib/Analysis/BUILD.gn | 1 + .../gn/secondary/llvm/unittests/Analysis/BUILD.gn | 1 + mlir/include/mlir/Analysis/AffineStructures.h | 3 + mlir/include/mlir/Dialect/Affine/EDSC/Builders.h | 12 + mlir/include/mlir/Dialect/Affine/IR/AffineOps.td | 69 +- .../mlir/Dialect/Linalg/Transforms/Transforms.h | 8 +- mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td | 15 +- mlir/include/mlir/Dialect/Shape/IR/ShapeOps.td | 22 + mlir/include/mlir/Dialect/StandardOps/IR/Ops.td | 2 + mlir/include/mlir/Dialect/Vector/VectorOps.td | 1 + mlir/include/mlir/TableGen/OpClass.h | 297 ++++- mlir/include/mlir/Transforms/LoopUtils.h | 18 +- .../Dialect/Linalg/CPU/test-conv-1d-call.mlir | 10 +- .../Dialect/Linalg/CPU/test-conv-1d-ncw-call.mlir | 10 +- .../Dialect/Linalg/CPU/test-conv-1d-nwc-call.mlir | 10 +- .../Dialect/Linalg/CPU/test-conv-2d-call.mlir | 10 +- .../Dialect/Linalg/CPU/test-conv-2d-nchw-call.mlir | 10 +- .../Dialect/Linalg/CPU/test-conv-2d-nhwc-call.mlir | 10 +- .../Dialect/Linalg/CPU/test-conv-3d-call.mlir | 10 +- .../Linalg/CPU/test-conv-3d-ncdhw-call.mlir | 10 +- .../Linalg/CPU/test-conv-3d-ndhwc-call.mlir | 10 +- mlir/lib/Analysis/AffineStructures.cpp | 39 +- mlir/lib/Dialect/Affine/EDSC/Builders.cpp | 29 +- mlir/lib/Dialect/Affine/IR/AffineOps.cpp | 174 ++- mlir/lib/Dialect/Affine/Transforms/LoopTiling.cpp | 280 +---- .../Dialect/Linalg/Transforms/Vectorization.cpp | 87 +- mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp | 103 +- mlir/lib/Dialect/Shape/IR/Shape.cpp | 8 + mlir/lib/Dialect/StandardOps/IR/Ops.cpp | 81 ++ mlir/lib/Dialect/Vector/VectorOps.cpp | 11 + mlir/lib/TableGen/OpClass.cpp | 207 +++- mlir/lib/Transforms/Utils/LoopUtils.cpp | 571 +++++++++- mlir/test/CAPI/ir.c | 1 + .../LinalgToVector/linalg-to-vector.mlir | 203 +--- mlir/test/Dialect/Affine/invalid.mlir | 11 + .../Dialect/Affine/loop-tiling-parametric.mlir | 275 +++++ mlir/test/Dialect/Affine/ops.mlir | 50 + .../transform-patterns-matmul-to-vector.mlir | 5 - mlir/test/Dialect/OpenACC/ops.mlir | 129 ++- mlir/test/Dialect/Shape/canonicalize.mlir | 24 + mlir/test/Dialect/Shape/ops.mlir | 6 +- mlir/test/Dialect/Vector/canonicalize.mlir | 25 + mlir/test/EDSC/builder-api-test.cpp | 32 + mlir/test/Transforms/canonicalize.mlir | 48 + mlir/test/lib/Transforms/CMakeLists.txt | 1 + .../Transforms/TestAffineLoopParametricTiling.cpp | 90 ++ mlir/test/lib/Transforms/TestConvVectorization.cpp | 79 +- mlir/test/mlir-rocm-runner/vecadd.mlir | 8 + mlir/test/mlir-rocm-runner/vector-transferops.mlir | 9 + mlir/test/mlir-tblgen/op-attribute.td | 6 +- mlir/test/mlir-tblgen/op-result.td | 2 +- mlir/tools/mlir-opt/mlir-opt.cpp | 2 + mlir/tools/mlir-rocm-runner/CMakeLists.txt | 2 +- mlir/tools/mlir-rocm-runner/mlir-rocm-runner.cpp | 2 + mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp | 593 +++++----- mlir/tools/mlir-tblgen/OpFormatGen.cpp | 18 +- 345 files changed, 14849 insertions(+), 3753 deletions(-) create mode 100644 clang/test/CodeGen/builtin-redeclaration.c copy compiler-rt/test/lsan/TestCases/{use_registers.cpp => use_registers_extra.cpp} (75%) create mode 100644 libc/src/math/hypotf.cpp create mode 100644 libc/src/math/hypotf.h create mode 100644 libc/test/src/math/hypotf_test.cpp delete mode 100644 libcxx/test/std/utilities/meta/meta.unary/meta.unary.cat/member [...] create mode 100644 llvm/include/llvm/Analysis/IRSimilarityIdentifier.h create mode 100644 llvm/lib/Analysis/IRSimilarityIdentifier.cpp create mode 100644 llvm/test/Analysis/Lint/get-active-lane-mask.ll create mode 100644 llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-gua [...] create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/legalize-fptrunc.mir create mode 100644 llvm/test/CodeGen/AArch64/arm64-assert-zext-sext.ll create mode 100644 llvm/test/CodeGen/AArch64/faddp-half.ll create mode 100644 llvm/test/CodeGen/AArch64/faddp.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-fcvt.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-fixed-length-fp-select.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-fixed-length-int-select.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-split-fcvt.ll create mode 100644 llvm/test/CodeGen/AMDGPU/sgpr-copy-cse.ll create mode 100644 llvm/test/CodeGen/AMDGPU/splitkit-copy-live-lanes.mir create mode 100644 llvm/test/CodeGen/ARM/machine-outliner-calls.mir create mode 100644 llvm/test/CodeGen/RISCV/shadowcallstack.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-qrintr.ll create mode 100644 llvm/test/CodeGen/X86/asm-reject-x87-int.ll create mode 100644 llvm/test/CodeGen/X86/pr47517.ll create mode 100644 llvm/test/DebugInfo/WebAssembly/fission-cu.ll create mode 100644 llvm/test/DebugInfo/WebAssembly/fission-sections.ll delete mode 100644 llvm/test/Other/change-printer.ll create mode 100644 llvm/test/Transforms/Coroutines/coro-spill-defs-before-corobegin.ll create mode 100644 llvm/test/Transforms/GVN/assume.ll create mode 100644 llvm/test/Transforms/IndVarSimplify/trivial-checks.ll create mode 100644 llvm/test/Transforms/LoopVectorize/ARM/tail-fold-multiple-icmps.ll create mode 100644 llvm/unittests/Analysis/IRSimilarityIdentifierTest.cpp create mode 100644 mlir/test/Dialect/Affine/loop-tiling-parametric.mlir create mode 100644 mlir/test/lib/Transforms/TestAffineLoopParametricTiling.cpp