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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-master-arm-next-allyesconfig in repository toolchain/ci/gcc.
from a2b7397b501 Daily bump. adds fa91ca7f506 [testsuite] Add effective target ident_directive adds 7ac25ab3989 [testsuite] Add missing require-effective-target alloca adds e9e2953cedd Fix spacing in cgraph_node::dump. adds b2784a9698f Add cgraph_edge::debug function. adds c2ebf4f10de openmp: Add support for non-rect simd and improve collapsed [...] adds 499b63048ac testsuite/97204 - fix gcc.target/i386/sse2-mmx-pinsrw.c adds 8c775bf447e testsuite: [aarch64] Fix aarch64/advsimd-intrinsics/v{trn,u [...] adds 4dcc7f03b54 tree-optimization/97199 - fix virtual operand update in if- [...] adds 6abd428605e arm: Fix fp16 move patterns for base MVE adds 473da7e22c8 libstdc++: Remove redundant -std=gnu++1z flags from makefile adds 7bfc4cd2c81 middle-end/97207 - implement move assign for auto_vec<> adds d16b5975ca9 middle-end/96814 - fix VECTOR_BOOLEAN_TYPE_P CTOR RTL expansion adds 69cf7decf1b [nvptx] Fix Wimplicit-fallthrough in nvptx.c with -save-temps adds a28542df4d0 c++: DECL_BUILTIN_P for builtins adds 1921ebcaf64 gcov: fix streaming of HIST_TYPE_IOR histogram type. adds 4af3472517b arm: Add missing Neoverse V1 feature adds 0d8f3f612d6 AArch64: Add Linux cpuinfo string for rng feature adds 00aaae03db2 c++: Replace tag_scope with TAG_how adds c74e6f7cfd7 c++: Adjust pushdecl/duplicate_decls API adds 67a5c215940 Fix gimple_clobber handling in ipa-modref adds f46f899b4fa Disable ipa-modref with live patching adds cdd8f031c7e Daily bump. adds 29f5db8ef81 analyzer: fix ICEs treeifying offset_region [PR96646, PR96841] adds d4a906e7b51 analyzer: add test for placement new
No new revisions were added by this update.
Summary of changes: gcc/ChangeLog | 85 ++++ gcc/DATESTAMP | 2 +- gcc/analyzer/region-model.cc | 7 +- gcc/cgraph.c | 23 +- gcc/cgraph.h | 3 + gcc/config/aarch64/aarch64-option-extensions.def | 2 +- gcc/config/arm/arm-cpus.in | 2 +- gcc/config/arm/arm-protos.h | 1 - gcc/config/arm/arm.c | 25 +- gcc/config/arm/arm.md | 4 +- gcc/config/arm/constraints.md | 9 +- gcc/config/arm/vfp.md | 32 +- gcc/config/nvptx/nvptx.c | 4 +- gcc/cp/ChangeLog | 66 ++++ gcc/cp/cp-tree.h | 9 +- gcc/cp/decl.c | 144 +++---- gcc/cp/friend.c | 8 +- gcc/cp/name-lookup.c | 129 ++++--- gcc/cp/name-lookup.h | 38 +- gcc/cp/parser.c | 28 +- gcc/cp/pt.c | 23 +- gcc/doc/invoke.texi | 2 +- gcc/expr.c | 18 +- gcc/ipa-modref.c | 2 +- gcc/objcp/ChangeLog | 5 + gcc/objcp/objcp-decl.c | 4 +- gcc/omp-expand.c | 412 ++++++++++++++------ gcc/omp-low.c | 3 +- gcc/opts.c | 7 + gcc/testsuite/ChangeLog | 42 ++ gcc/testsuite/c-c++-common/ident-1b.c | 1 + gcc/testsuite/c-c++-common/ident-2b.c | 1 + gcc/testsuite/g++.dg/analyzer/placement-new.C | 26 ++ .../gcc.dg/analyzer/pr93355-localealias.c | 1 + gcc/testsuite/gcc.dg/analyzer/pr96646.c | 24 ++ gcc/testsuite/gcc.dg/analyzer/pr96841.c | 23 ++ gcc/testsuite/gcc.dg/vect/vect-simd-17.c | 304 +++++++++++++++ .../aarch64/advsimd-intrinsics/vtrn_half.c | 3 - .../aarch64/advsimd-intrinsics/vuzp_half.c | 3 - .../aarch64/advsimd-intrinsics/vzip_half.c | 3 - .../gcc.target/arm/armv8_1m-fp16-move-1.c | 418 ++++++++++++++++++++ .../gcc.target/arm/armv8_1m-fp32-move-1.c | 420 ++++++++++++++++++++ .../gcc.target/arm/armv8_1m-fp64-move-1.c | 426 +++++++++++++++++++++ .../arm/mve/intrinsics/mve-vldstr16-no-writeback.c | 5 +- gcc/testsuite/gcc.target/i386/pr96814.c | 19 + gcc/testsuite/gcc.target/i386/sse2-mmx-pinsrw.c | 8 +- gcc/testsuite/lib/target-supports.exp | 9 + gcc/tree-if-conv.c | 107 +++--- gcc/value-prof.c | 5 +- gcc/vec.h | 8 +- libcc1/ChangeLog | 4 + libcc1/libcp1plugin.cc | 2 +- libgomp/ChangeLog | 4 + libgomp/testsuite/libgomp.c/loop-25.c | 296 ++++++++++++++ libstdc++-v3/ChangeLog | 5 + libstdc++-v3/libsupc++/Makefile.am | 22 -- libstdc++-v3/libsupc++/Makefile.in | 22 -- 57 files changed, 2841 insertions(+), 467 deletions(-) create mode 100644 gcc/testsuite/g++.dg/analyzer/placement-new.C create mode 100644 gcc/testsuite/gcc.dg/analyzer/pr96646.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/pr96841.c create mode 100644 gcc/testsuite/gcc.dg/vect/vect-simd-17.c create mode 100644 gcc/testsuite/gcc.target/arm/armv8_1m-fp16-move-1.c create mode 100644 gcc/testsuite/gcc.target/arm/armv8_1m-fp32-move-1.c create mode 100644 gcc/testsuite/gcc.target/arm/armv8_1m-fp64-move-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr96814.c create mode 100644 libgomp/testsuite/libgomp.c/loop-25.c