[Tcwg-commits] [llvm] branch master updated (a1c92d356ea -> 8fafa168697)

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from a1c92d356ea [X86] Add DAG combine to remove sext i32->i64 from gather/s [...] new 8fafa168697 [ARM] 't' asm constraint should accept i32

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Summary of changes: lib/Target/ARM/ARMISelLowering.cpp | 2 +- test/CodeGen/ARM/inlineasm.ll | 9 ++++++++- 2 files changed, 9 insertions(+), 2 deletions(-)