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from 1186e47cd27 [AArch64] Add HF vector modes to lane-to-lane INS pattern new 1c697db0dc5 [PATCH][AArch64] Allow CMP+SHIFT when comparing with zero
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Summary of changes: gcc/ChangeLog | 5 +++++ gcc/config/aarch64/aarch64.c | 2 +- gcc/testsuite/ChangeLog | 4 ++++ gcc/testsuite/gcc.target/aarch64/cmp_shifted_reg_1.c | 11 +++++++++++ 4 files changed, 21 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/cmp_shifted_reg_1.c