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from 9c87009 Updating branches/google/stable to r288497 adds 5b12946 [X86][SSE] Add support for extracting constant bit data from [...] adds a74d10f CODE_OWNERS: Take ownership of IR Linker as discussed on llvm-dev adds 3be9b42 [X86][SSE] Renamed shuffle combine test. adds 1832d9a [Sparc] Fix parsing of double-precision %f18, %f20, and %f22 adds 7ac6b09 Tidyup code with indentation and clang-format. NFCI. adds 42285f5 [DAGCombiner] do not fold (fmul (fadd X, 1), Y) -> (fmad X, Y [...] adds 66e793d Revert "[SLP] Fix for PR6246: vectorization for scalar ops on [...] adds d2c7981 [InstCombine] Regenerate vector srem tests adds 88afddf [InstCombine] Add vector urem tests adds 0acff68 [x86] add tests to show missing demanded bits analysis; NFC adds b65cc89 fix check-label adds 3716239 Make LTO opt-remarks tests matching stricter adds 55f24b0 [LTOs] Allow generation of hotness information adds 2fbac67 [x86] add common check prefix to reduce duplication; NFC adds 76a17e0 AMDGPU: Implement isCheapAddrSpaceCast adds 1f697f4 [SystemZ] Refactor hasSideEffects setting adds 4b7476c [SystemZ] Support floating-point control register instructions adds 49c2555 [SystemZ] Support remaining atomic instructions adds e72670c [PGO] Fix PGO use ICE when there are unreachable BBs adds fd18667 [LibFuzzer] Split FuzzerUtil for Posix and Windows. adds a6ae0e2 [LibFuzzer] Introduce a portable WeakAlias implementation. adds 52e3995 [WebAssembly] Fix a compiler warning. NFC. adds 609477e Revert "[LibFuzzer] Split FuzzerUtil for Posix and Windows." adds fe88eab [IR] Fix some Clang-tidy modernize-use-equals-delete and Incl [...] adds 8860d3c [lanai] Custom lowering of SHL_PARTS adds 1a45ade Resubmit "[LibFuzzer] Split FuzzerUtil for Posix and Windows." adds 8460d68 Support escaping in TrigramIndex. adds 9d91f90 [ppc] Correctly compute the cost of loading 32/64 bit memory [...] adds 970538c AArch64CollectLOH: Rewrite as block-local analysis. adds bb4cc15 [doc] Add .arcconfig setup to the "how to work with a monorep [...] adds 5bfd319 testcase only works in a debug build adds 4732785 [sanitizer-coverage] use IRB.SetCurrentDebugLocation after IR [...] adds f463822 [TTI/CostModel] Correct the way getGEPCost() calls isLegalAdd [...] adds ceceabb Remove stale comment. NFC. adds 09c0f52 [X86] Add test cases demonstrating where we incorrectly commu [...] adds c018e3b [X86] Fix VEX encoded VPMADDUBSW to not be marked commutable. adds 20e9431 [InstCombine] change select type to eliminate bitcasts adds ae10a1c [AVX-512] Add EVEX VPMADDUBSW and VPMADDWD to the load foldin [...] adds b7a44fa [InstSimplify] add helper functions for SimplifyICmpInst; NFCI adds d4ddede [InstSimplify] add more helper functions for SimplifyICmpInst; NFCI adds 0f9eec2 AMDGPU: Clean up struct initializers adds ad37a58 [AVX-512] Add many of the VPERM instructions to the load fold [...] adds c8f08d8 [PM] Make PreservedAnalyses::preserved take its parameter by [...] adds bd6d576 [PM] Make PassManager's constructor explicit. adds 0f33f07 [PM] Make AnalysisManager::registerPass take its parameter by [...] adds 6f16e4a [PM] Don't walk the AM's ResultsList if nothing was invalidated. adds 6aaaf4a [PM] Consistently use curly braces rather than std::make_pair [...] adds 8645bc7 [PM] Get rid of an unused variable in AnalysisManager::clear( [...] adds d0aaae3 [PM] Rename lookupPass to lookUpPass. adds 0b69b1f build: allow specifying the component to `llvm_install_symlink` adds 46db4b2 AMDGPU: remove a couple of unused variables adds 2a88a6d [WebAssembly] Eliminate an ad-hoc command-line argument. adds 728c815 DAG: Fold out out of bounds insert_vector_elt adds bbaf9cd [MC] Generalize MCContext's SectionSymbols field. adds 85334ad [Object][MachO] Reference-ify some helper function arguments. NFC. adds 5084450 TableGen: Use StringRef instead of const std::string& for parameters adds 607c683 TableGen: Optimize common string concatenation with SmallString adds 0c517c8 TableGen: Use StringRef instead of const std::string& in retu [...] adds 013ca3c TableGen: Store Records on a BumpPtrAllocator adds 2f8ebc0 Prefix path when displaying thin archives. adds fb309b5 Always use / as the path separator. adds a31bc24 [AVR] Remove 'XFAIL' from a CodeGen test adds 6a2af3e [stl-extras] Provide an adaptor of std::count for ranges. adds c166e1c [X86] Add Commutative property to several MMX arithmetic and [...] adds 0cd80ce [X86] Mark 256-bit DPPS intrinsic as commutable to increase l [...] adds 46dd0f7 [X86][AVX512] Add target shuffle tests showing missing UNPCK [...] adds 5f2b897 [X86][XOP] Add target shuffle tests showing missing UNPCKL combine. adds 1ef550d [CMake] Refactor add_llvm_tool_symlink for reuse adds de0c130 [Hexagon] Changing from literal numeric value to argument sin [...] adds 9991769 [AVX-512] Add avx512f command lines to fast isel SSE select test. adds 9def0bf [AVX-512] Teach fast isel to use masked compare and movss for [...] adds 38492ab [Hexagon] Adding additional tokenization characters in prepar [...] adds ccd8fec TableGen/Record: Move PointerIntPair to less used field of RecordVal adds c7fb36d TableGen: Factor out STRCONCAT constructor, add shortcut. adds 9a1eeb2 Use Darwin libtool's -no_warning_for_no_symbols if available [...] adds a3d4859 [AVX-512] Teach fast isel to handle 512-bit vector bitcasts. adds 1ecbef9 TableGen: Use more StringInit instead of StringRef adds 205e9501 TableGen: Use StringInit instead of std::string for DagInit name adds ddbd6db TableGen: Use StringInit instead of std::string for DagInit a [...] adds 1fcb0c5 [X86] Remove unnecessary explicit uses of .SimpleTy just to d [...] adds 2ba1a51 ListInit::convertInitializerTo: avoid foldingset lookup if no [...] adds 5a87cb2 TableGen/Record: Replace std::vector with SmallVector/ArrayRef adds a3f0e48 TableGen/TGParser: Prefer SmallVector/ArrayRef over std::vector adds c2e7826 TableGen: Use range based for; reserve vectors where possible adds f3a991b TableGen: TableGenStringKey is no longer necessary as of r288642 adds 53cf984 TableGen/Record: Shortcut member access in hottest function adds 2b86a87 TableGen: Some more std::string->StringInit* replacements adds 25801f0 TableGen/AsmMatcherEmitter: Trust that stable_sort works adds 02114e6 [cmake] Include component in Sphinx install rules adds 45274ac [AMDGPU] Disassembler: fix s_buffer_store_dword instructions adds 0eeb88b [GlobalISel] Extract handleAssignments out of AArch64CallLowering adds 55f84f1 [X86][SSE] Add helper function to create UNPCKL/UNPCKH shuffl [...] adds 26d70f7 [X86][SSE] Add support for combining target shuffles to UNPCK [...] adds 4a2a5df [mips][ias] N32/N64 must not sort the relocation table. adds 447a288 [PPC] Slightly Improve Assembly Parsing errors and add EOL co [...] adds 4b0a367 Use range based for loop. NFCI. new 6a74133 Updating branches/google/stable to r288672
The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: CMakeLists.txt | 15 +- CODE_OWNERS.TXT | 4 +- cmake/modules/AddLLVM.cmake | 49 +- cmake/modules/AddSphinxTarget.cmake | 2 + docs/GettingStarted.rst | 11 + include/llvm/ADT/STLExtras.h | 8 + include/llvm/Analysis/TargetTransformInfoImpl.h | 8 +- include/llvm/CodeGen/GlobalISel/CallLowering.h | 47 + include/llvm/IR/Constant.h | 14 +- include/llvm/IR/Constants.h | 154 ++- include/llvm/IR/Function.h | 29 +- include/llvm/IR/IntrinsicsSystemZ.td | 5 + include/llvm/IR/IntrinsicsX86.td | 16 +- include/llvm/IR/Metadata.h | 106 +- include/llvm/IR/PassManager.h | 60 +- include/llvm/IR/User.h | 24 +- include/llvm/IR/Value.h | 27 +- include/llvm/MC/MCContext.h | 4 +- include/llvm/TableGen/Record.h | 165 ++- lib/Analysis/InstructionSimplify.cpp | 1078 ++++++++++--------- lib/CodeGen/GlobalISel/CallLowering.cpp | 40 +- lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 16 +- lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 7 + lib/Fuzzer/CMakeLists.txt | 3 + lib/Fuzzer/FuzzerDriver.cpp | 3 +- lib/Fuzzer/FuzzerExtFunctionsWeakAlias.cpp | 54 + lib/Fuzzer/FuzzerMutate.cpp | 2 +- lib/Fuzzer/FuzzerTraceState.cpp | 4 +- lib/Fuzzer/FuzzerUtil.cpp | 121 +-- lib/Fuzzer/FuzzerUtil.h | 9 +- lib/Fuzzer/FuzzerUtilPosix.cpp | 106 ++ lib/Fuzzer/FuzzerUtilWindows.cpp | 194 ++++ lib/LTO/LTOCodeGenerator.cpp | 9 + lib/LTO/ThinLTOCodeGenerator.cpp | 4 + lib/MC/MCContext.cpp | 6 +- lib/Object/MachOObjectFile.cpp | 401 ++++--- lib/Support/TrigramIndex.cpp | 37 +- lib/TableGen/Record.cpp | 427 ++++---- lib/TableGen/TGParser.cpp | 204 ++-- lib/TableGen/TGParser.h | 38 +- lib/Target/AArch64/AArch64CallLowering.cpp | 44 +- lib/Target/AArch64/AArch64CallLowering.h | 45 - lib/Target/AArch64/AArch64CollectLOH.cpp | 1120 +++++--------------- lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 15 +- lib/Target/AMDGPU/SIISelLowering.cpp | 14 +- lib/Target/AMDGPU/SIISelLowering.h | 1 + lib/Target/AMDGPU/SIRegisterInfo.cpp | 16 +- lib/Target/AMDGPU/SMInstructions.td | 13 +- lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp | 17 +- .../Hexagon/Disassembler/HexagonDisassembler.cpp | 31 + lib/Target/Hexagon/Hexagon.td | 2 +- lib/Target/Hexagon/HexagonInstrInfoV4.td | 19 +- lib/Target/Hexagon/HexagonNewValueJump.cpp | 10 - lib/Target/Hexagon/HexagonOperands.td | 2 + .../Hexagon/MCTargetDesc/HexagonMCCompound.cpp | 6 +- lib/Target/Lanai/LanaiISelLowering.cpp | 53 +- lib/Target/Lanai/LanaiISelLowering.h | 1 + .../Mips/MCTargetDesc/MipsELFObjectWriter.cpp | 7 + lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 313 +++--- lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 19 +- lib/Target/Sparc/AsmParser/SparcAsmParser.cpp | 2 +- lib/Target/SystemZ/SystemZInstrFP.td | 20 + lib/Target/SystemZ/SystemZInstrFormats.td | 96 +- lib/Target/SystemZ/SystemZInstrInfo.td | 74 +- lib/Target/SystemZ/SystemZOperators.td | 6 + lib/Target/SystemZ/SystemZScheduleZ13.td | 33 + lib/Target/SystemZ/SystemZScheduleZ196.td | 34 + lib/Target/SystemZ/SystemZScheduleZEC12.td | 34 + .../WebAssembly/WebAssemblyExplicitLocals.cpp | 5 + .../WebAssembly/WebAssemblyFrameLowering.cpp | 2 +- .../WebAssembly/WebAssemblyTargetMachine.cpp | 8 +- lib/Target/X86/X86FastISel.cpp | 101 +- lib/Target/X86/X86ISelLowering.cpp | 235 ++-- lib/Target/X86/X86InstrInfo.cpp | 72 +- lib/Target/X86/X86InstrSSE.td | 12 +- lib/Transforms/InstCombine/InstCombineCasts.cpp | 47 + lib/Transforms/Instrumentation/CFGMST.h | 8 + .../Instrumentation/PGOInstrumentation.cpp | 66 +- .../Instrumentation/SanitizerCoverage.cpp | 2 +- lib/Transforms/Utils/LoopUtils.cpp | 3 - lib/Transforms/Vectorize/SLPVectorizer.cpp | 140 ++- test/Analysis/CostModel/AArch64/gep.ll | 196 ++++ test/Analysis/CostModel/ARM/gep.ll | 22 +- test/Analysis/CostModel/PowerPC/vsr_load_32_64.ll | 19 + .../AArch64/arm64-collect-loh-garbage-crash.ll | 2 +- test/CodeGen/AArch64/arm64-collect-loh-str.ll | 2 +- test/CodeGen/AArch64/arm64-collect-loh.ll | 17 +- test/CodeGen/AArch64/loh.mir | 180 ++++ test/CodeGen/AMDGPU/fma-combine.ll | 85 +- .../AVR/select-must-add-unconditional-jump.ll | 1 - test/CodeGen/Lanai/lshift64.ll | 24 + test/CodeGen/PowerPC/vec_add_sub_quadword.ll | 57 +- test/CodeGen/SystemZ/fpc-intrinsics.ll | 67 ++ test/CodeGen/X86/avx-intrinsics-x86.ll | 29 +- test/CodeGen/X86/avx2-intrinsics-x86.ll | 43 +- test/CodeGen/X86/avx512-insert-extract.ll | 6 +- .../CodeGen/X86/clear_upper_vector_element_bits.ll | 16 +- test/CodeGen/X86/combine-srem.ll | 6 +- test/CodeGen/X86/combine-urem.ll | 6 +- test/CodeGen/X86/fast-isel-bitcasts-avx512.ll | 244 +++++ test/CodeGen/X86/fast-isel-select-sse.ll | 170 +++ test/CodeGen/X86/fma_patterns.ll | 192 +++- test/CodeGen/X86/fma_patterns_wide.ll | 244 +++-- test/CodeGen/X86/not-and-simplify.ll | 45 + test/CodeGen/X86/stack-folding-int-avx512.ll | 246 +++++ test/CodeGen/X86/stack-folding-int-avx512vl.ll | 208 ++++ test/CodeGen/X86/vec_int_to_fp.ll | 12 +- test/CodeGen/X86/vec_uint_to_fp-fastmath.ll | 7 +- .../X86/vector-shuffle-combining-avx512bw.ll | 28 + .../X86/vector-shuffle-combining-avx512bwvl.ll | 28 + test/CodeGen/X86/vector-shuffle-combining-xop.ll | 30 +- .../X86/diagnostic-handler-remarks-with-hotness.ll | 77 ++ test/LTO/X86/diagnostic-handler-remarks.ll | 18 +- test/MC/AMDGPU/smem.s | 45 +- test/MC/Disassembler/AMDGPU/smem_vi.txt | 36 + test/MC/Disassembler/SystemZ/insns.txt | 387 +++++++ test/MC/Mips/reloc-directive.s | 12 +- test/MC/PowerPC/directive-parse-err.s | 44 + test/MC/SystemZ/insn-bad-z196.s | 51 + test/MC/SystemZ/insn-bad.s | 186 ++++ test/MC/SystemZ/insn-good-z196.s | 42 + test/MC/SystemZ/insn-good.s | 246 +++++ test/Object/archive-thin-create.test | 8 +- test/Object/archive-toc.test | 28 +- .../X86/diagnostic-handler-remarks-with-hotness.ll | 56 + test/ThinLTO/X86/diagnostic-handler-remarks.ll | 34 +- .../CodeGenPrepare/AMDGPU/sink-addrspacecast.ll | 121 +++ test/Transforms/InstCombine/bitcast.ll | 48 +- test/Transforms/InstCombine/vector-srem.ll | 10 +- test/Transforms/InstCombine/vector-urem.ll | 29 + test/Transforms/LoopVectorize/PowerPC/pr30990.ll | 140 +++ .../PGOProfile/Inputs/unreachable_bb.proftext | 9 + test/Transforms/PGOProfile/unreachable_bb.ll | 23 + test/Transforms/SLPVectorizer/X86/arith-fp.ll | 964 +++++++++++------ .../X86/insert-element-build-vector.ll | 176 +-- tools/llvm-ar/llvm-ar.cpp | 5 + unittests/ADT/STLExtrasTest.cpp | 17 + unittests/Support/SpecialCaseListTest.cpp | 11 + unittests/Support/TrigramIndexTest.cpp | 24 +- utils/TableGen/AsmMatcherEmitter.cpp | 18 +- utils/TableGen/AsmWriterEmitter.cpp | 18 +- utils/TableGen/CodeEmitterGen.cpp | 2 +- utils/TableGen/CodeGenDAGPatterns.cpp | 30 +- utils/TableGen/CodeGenInstruction.cpp | 32 +- utils/TableGen/CodeGenRegisters.cpp | 2 +- utils/TableGen/CodeGenRegisters.h | 2 +- utils/TableGen/CodeGenTarget.cpp | 4 +- utils/TableGen/CodeGenTarget.h | 2 +- utils/TableGen/DAGISelEmitter.cpp | 2 +- utils/TableGen/DAGISelMatcherGen.cpp | 8 +- utils/TableGen/DisassemblerEmitter.cpp | 2 +- utils/TableGen/FastISelEmitter.cpp | 2 +- utils/TableGen/FixedLenDecoderEmitter.cpp | 14 +- utils/TableGen/InstrInfoEmitter.cpp | 3 +- utils/TableGen/PseudoLoweringEmitter.cpp | 4 +- utils/TableGen/RegisterInfoEmitter.cpp | 2 +- utils/TableGen/SubtargetEmitter.cpp | 4 +- utils/TableGen/SubtargetFeatureInfo.h | 4 +- 158 files changed, 7810 insertions(+), 3683 deletions(-) create mode 100644 lib/Fuzzer/FuzzerExtFunctionsWeakAlias.cpp create mode 100644 lib/Fuzzer/FuzzerUtilPosix.cpp create mode 100644 lib/Fuzzer/FuzzerUtilWindows.cpp create mode 100644 test/Analysis/CostModel/AArch64/gep.ll create mode 100644 test/Analysis/CostModel/PowerPC/vsr_load_32_64.ll create mode 100644 test/CodeGen/AArch64/loh.mir create mode 100644 test/CodeGen/Lanai/lshift64.ll create mode 100644 test/CodeGen/SystemZ/fpc-intrinsics.ll create mode 100644 test/CodeGen/X86/fast-isel-bitcasts-avx512.ll create mode 100644 test/CodeGen/X86/not-and-simplify.ll create mode 100644 test/LTO/X86/diagnostic-handler-remarks-with-hotness.ll create mode 100644 test/MC/PowerPC/directive-parse-err.s create mode 100644 test/ThinLTO/X86/diagnostic-handler-remarks-with-hotness.ll create mode 100644 test/Transforms/CodeGenPrepare/AMDGPU/sink-addrspacecast.ll create mode 100644 test/Transforms/InstCombine/vector-urem.ll create mode 100644 test/Transforms/LoopVectorize/PowerPC/pr30990.ll create mode 100644 test/Transforms/PGOProfile/Inputs/unreachable_bb.proftext create mode 100644 test/Transforms/PGOProfile/unreachable_bb.ll