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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-defconfig in repository toolchain/ci/llvm-project.
from 831636b0e63 [SimplifyCFG] SUCCESS! Teach createUnreachableSwitchDefault [...] adds 0d21e66014f [IRSim] Letting call instructions be legal for similarity i [...] adds 57a46914f5c [IRSim][IROutliner] Allowing call instructions to be outlined. adds 89b0972aa2f [Sema] Fix deleted function problem in implicitly movable test adds d5324c052b2 [clang-tidy][NFC] Fix a build warning due to an extra semicolon adds da1bd953faa Precommit a test for D92015 (NFC) adds d9f306aa52f [LV] Fix crash when generating remarks with multi-exit loops. adds 4a17b9a39b7 [LAA] Add tests with uncomputable BTCs. adds 890079ef18e [LoopLoadElim] Add tests with uncomputable BTCs. adds 068a23f05f9 [LoopDistribute] Add tests with uncomputable BTCs. adds f4c39ccd221 [TableGen] Continue cleaning up .td files adds 13b1c9abaf4 [CVP] Add tests for union of conditions (NFC) adds 14e540febcd [LVI] Handle unions of conditions adds 26680269e0e [InstSimplify] Add tests for gep p, -p without inbounds (NFC) adds bf2a78fd4ae [SLP]Add a test for correct use of the reordered loads, NFC. adds c182a000954 [Analysis] fix typo in code comment; NFC adds c74e8539ff3 [Analysis] flatten enums for recurrence types adds ec9f2c3be07 test/OpenMP/parallel_codegen.cpp: Allow multiple result attributes adds f43daf1b62a [SSAUpdater] Remove unused code InstrIsPHI (NFC) adds bea8d021a32 [llvm] Use *Map::lookup (NFC) adds 9a90c4ea8a0 [llvm] Use isa instead of dyn_cast (NFC) adds e08fea3b240 [SimplifyCFGPass] Ensure that DominatorTreeWrapperPass is i [...] adds f1ce6960561 [SimplifyCFG] Teach tryWidenCondBranchToCondBranch() to pre [...] adds 657c1e09da9 [SimplifyCFG] Teach eliminateDeadSwitchCases() to preserve [...] adds db753269d91 [IR] PassManagerTest: Register DominatorTreeAnalysis before [...] adds 5fe0798dee6 [Utils] LocalTest: fix SimplifyCFGWithNullAC test to work w [...] adds c38739ad8f1 [NFC] clang-format the entire DwarfEHPrepare.cpp adds e6b1a27fb9c [NFC][CodeGen] Split DwarfEHPrepare pass into an actual tra [...] adds b23b1bcc26e [NFC][CodeGen][Tests] Mark all tests that fail to preserve [...] adds 2461cdb4172 [CodeGen][SimplifyCFG] Teach DwarfEHPrepare to preserve DomTree adds b4429f3cdd1 [SimplifyCFG] Teach removeUndefIntroducingPredecessor to pr [...] adds 4b806473679 [AMDGPU][SimplifyCFG] Teach AMDGPUUnifyDivergentExitNodes t [...] adds 20670ba4406 [compiler-rt][test] Suppress stderr of ldd output adds 34489da81b3 [sanitizer] Enable mallopt and mallinfo interceptors on And [...] adds e4337159e3d [NFC][RISCV] Move vmsge{u}.vx processing to RISCVAsmParser. adds 3bcca6b12d4 [MLIR] Fix affine_map compose with multi-symbols
No new revisions were added by this update.
Summary of changes: clang-tools-extra/clang-tidy/ClangTidyOptions.cpp | 2 +- clang/lib/Sema/SemaInit.cpp | 67 ++++-- clang/lib/Sema/SemaStmt.cpp | 31 ++- .../CXX/class/class.init/class.copy.elision/p3.cpp | 50 +++++ clang/test/OpenMP/parallel_codegen.cpp | 2 +- .../sanitizer_platform_interceptors.h | 2 +- compiler-rt/test/lit.common.cfg.py | 1 + .../include/llvm/Analysis/IRSimilarityIdentifier.h | 16 +- llvm/include/llvm/Analysis/IVDescriptors.h | 113 +++++----- llvm/include/llvm/IR/IntrinsicsARM.td | 2 +- llvm/include/llvm/IR/IntrinsicsNVVM.td | 36 ++-- llvm/include/llvm/InitializePasses.h | 2 +- llvm/include/llvm/Option/OptParser.td | 2 +- llvm/include/llvm/ProfileData/SampleProf.h | 5 +- llvm/include/llvm/Transforms/IPO/IROutliner.h | 11 +- llvm/include/llvm/Transforms/Utils/LoopUtils.h | 27 ++- llvm/lib/Analysis/IRSimilarityIdentifier.cpp | 16 ++ llvm/lib/Analysis/IVDescriptors.cpp | 234 +++++++++++---------- llvm/lib/Analysis/LazyValueInfo.cpp | 24 ++- llvm/lib/CodeGen/CodeGen.cpp | 2 +- llvm/lib/CodeGen/DwarfEHPrepare.cpp | 230 ++++++++++++-------- llvm/lib/CodeGen/ExpandReductions.cpp | 26 +-- llvm/lib/Support/CommandLine.cpp | 6 +- .../AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp | 54 ++++- llvm/lib/Target/NVPTX/NVPTXIntrinsics.td | 6 +- llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 66 ++++++ .../RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp | 100 --------- llvm/lib/Transforms/Scalar/SimplifyCFGPass.cpp | 1 + llvm/lib/Transforms/Utils/LoopUtils.cpp | 84 ++++---- llvm/lib/Transforms/Utils/SSAUpdater.cpp | 6 - llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 34 ++- .../Vectorize/LoopVectorizationLegality.cpp | 32 +-- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 41 ++-- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 224 ++++++++++---------- .../pointer-with-unknown-bounds.ll | 55 ++++- .../uncomputable-backedge-taken-count.ll | 113 ++++++++++ llvm/test/CodeGen/AArch64/pic-eh-stubs.ll | 4 +- .../AMDGPU/atomic_optimizations_pixelshader.ll | 10 +- llvm/test/CodeGen/AMDGPU/branch-condition-and.ll | 4 +- llvm/test/CodeGen/AMDGPU/branch-relaxation.ll | 4 +- llvm/test/CodeGen/AMDGPU/infinite-loop.ll | 4 +- llvm/test/CodeGen/AMDGPU/kill-infinite-loop.ll | 3 +- llvm/test/CodeGen/AMDGPU/mixed-wave32-wave64.ll | 2 +- .../CodeGen/AMDGPU/multi-divergent-exit-region.ll | 4 +- llvm/test/CodeGen/AMDGPU/ret_jump.ll | 4 +- llvm/test/CodeGen/AMDGPU/si-annotate-cf-noloop.ll | 4 +- .../si-lower-control-flow-unreachable-block.ll | 2 +- llvm/test/CodeGen/AMDGPU/skip-if-dead.ll | 2 +- llvm/test/CodeGen/AMDGPU/unigine-liveness-crash.ll | 2 +- .../AMDGPU/unstructured-cfg-def-use-issue.ll | 4 +- llvm/test/CodeGen/AMDGPU/update-phi.ll | 2 +- llvm/test/CodeGen/AMDGPU/valu-i1.ll | 2 +- llvm/test/CodeGen/AMDGPU/wave32.ll | 10 +- .../ARM/2011-05-04-MultipleLandingPadSuccs.ll | 3 +- llvm/test/CodeGen/ARM/2014-05-14-DwarfEHCrash.ll | 2 +- llvm/test/CodeGen/ARM/arm-ttype-target2.ll | 2 +- llvm/test/CodeGen/ARM/dwarf-eh.ll | 4 +- llvm/test/CodeGen/ARM/ehabi-filters.ll | 2 +- llvm/test/CodeGen/ARM/global-merge.ll | 2 +- llvm/test/CodeGen/ARM/setjmp_longjmp.ll | 6 +- llvm/test/CodeGen/Hexagon/cfi_offset.ll | 2 +- llvm/test/CodeGen/Hexagon/ehabi.ll | 2 +- .../misaligned_double_vector_store_not_fast.ll | 2 +- llvm/test/CodeGen/Hexagon/packetize-allocframe.ll | 2 +- llvm/test/CodeGen/Hexagon/swp-epilog-phi10.ll | 2 +- llvm/test/CodeGen/Hexagon/swp-order-deps3.ll | 2 +- llvm/test/CodeGen/Hexagon/swp-reuse-phi-4.ll | 2 +- .../CodeGen/PowerPC/2007-11-16-landingpad-split.ll | 2 +- llvm/test/CodeGen/PowerPC/aix-exception.ll | 4 +- llvm/test/CodeGen/SPARC/exception.ll | 8 +- .../test/CodeGen/Thumb2/2009-08-04-CoalescerBug.ll | 2 +- llvm/test/CodeGen/X86/2007-05-05-Personality.ll | 8 +- llvm/test/CodeGen/X86/2010-08-04-MingWCrash.ll | 2 +- .../CodeGen/X86/2012-01-10-UndefExceptionEdge.ll | 3 +- llvm/test/CodeGen/X86/basic-block-sections-eh.ll | 2 +- llvm/test/CodeGen/X86/code-model-kernel.ll | 2 +- llvm/test/CodeGen/X86/dwarf-eh-prepare.ll | 2 +- llvm/test/CodeGen/X86/gcc_except_table-multi.ll | 10 +- .../CodeGen/X86/indirect-branch-tracking-eh2.ll | 4 +- llvm/test/CodeGen/X86/select-prof-codegen.ll | 23 ++ llvm/test/MC/RISCV/rvv/compare.s | 21 +- .../Transforms/CorrelatedValuePropagation/basic.ll | 129 ++++++++++++ ...{illegal-calls.ll => illegal-indirect-calls.ll} | 23 +- llvm/test/Transforms/IROutliner/outlining-calls.ll | 93 ++++++++ llvm/test/Transforms/InstSimplify/gep.ll | 32 +++ .../uncomputable-backedge-taken-count.ll | 86 ++++++++ .../uncomputable-backedge-taken-count.ll | 103 +++++++++ .../LoopVectorize/remarks-multi-exit-loops.ll | 28 +++ .../SLPVectorizer/X86/shrink_after_reorder.ll | 61 ++++++ .../Transforms/SimplifyCFG/switch-dead-default.ll | 3 +- llvm/test/Transforms/SimplifyCFG/wc-widen-block.ll | 2 +- llvm/tools/llvm-nm/llvm-nm.cpp | 5 +- llvm/tools/llvm-objcopy/COFF/Object.cpp | 10 +- llvm/tools/opt/opt.cpp | 2 +- .../Analysis/IRSimilarityIdentifierTest.cpp | 204 +++++++++++++++++- llvm/unittests/IR/PassManagerTest.cpp | 4 + llvm/unittests/Transforms/Utils/LocalTest.cpp | 6 +- llvm/utils/TableGen/CodeGenRegisters.cpp | 3 +- llvm/utils/TableGen/CodeGenTarget.cpp | 6 +- llvm/utils/TableGen/FixedLenDecoderEmitter.cpp | 2 +- llvm/utils/TableGen/GlobalISel/GIMatchTree.h | 5 +- mlir/include/mlir/Dialect/ArmSVE/ArmSVE.td | 2 +- mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td | 7 +- mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td | 10 +- mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td | 4 +- mlir/include/mlir/IR/OpBase.td | 61 +++--- mlir/lib/IR/AffineMap.cpp | 2 +- mlir/test/Dialect/Affine/canonicalize.mlir | 12 ++ 108 files changed, 1967 insertions(+), 856 deletions(-) create mode 100644 clang/test/CXX/class/class.init/class.copy.elision/p3.cpp create mode 100644 llvm/test/Analysis/LoopAccessAnalysis/uncomputable-backedge-tak [...] create mode 100644 llvm/test/CodeGen/X86/select-prof-codegen.ll rename llvm/test/Transforms/IROutliner/{illegal-calls.ll => illegal-indirect-calls [...] create mode 100644 llvm/test/Transforms/IROutliner/outlining-calls.ll create mode 100644 llvm/test/Transforms/LoopDistribute/uncomputable-backedge-taken [...] create mode 100644 llvm/test/Transforms/LoopLoadElim/uncomputable-backedge-taken-count.ll create mode 100644 llvm/test/Transforms/LoopVectorize/remarks-multi-exit-loops.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/shrink_after_reorder.ll