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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig in repository toolchain/ci/llvm-project.
from 0680a3d56d8 [Power10] Enable the heuristic for Power10 and switch the s [...] adds 6c8041aa0ff [AST][FPEnv] Keep FP options in trailing storage of CastExpr adds 0ece51c60c5 Add raw_fd_stream that supports reading/seeking/writing adds 19531a81f1d Add raw_fd_stream_test.cpp into CMakeLists.txt adds 9c651c231f3 Missing change from previous commit adds b3f364e8561 Add a header file to support ssize_t for windows adds de044f75628 Revert "[AST][FPEnv] Keep FP options in trailing storage of [...] adds 4ede83c0683 [gn build] Port 19531a81f1d adds 35dc91aee20 [X86][SSE] lowerShuffleAsDecomposedShuffleBlend - support d [...] adds 36e2e2e12ef [InstCombine] Fix incorrect SimplifyWithOpReplaced transfor [...] adds c437446d90b [ARM] Recognize "double extend" reduction patterns adds 50ee0b99ec2 [InstCombine][X86] getNegativeIsTrueBoolVec - use ConstantE [...] adds 3a8ea8609b8 [Intrinsics] define semantics for experimental fmax/fmin ve [...] adds 6cfd38d03d5 [ARM] Fixup single source mla reductions. adds d030aad7893 [InstCombine][X86] Add tests for masked load/stores with co [...] adds 78de7297abe Reland [AssumeBundles] Use operand bundles to encode alignm [...] adds 2e61cd1295e [MachineScheduler] Fix operand scheduling for pre/post-incr [...] adds a874d633440 [Clang] Add option to allow marking pass-by-value args as noalias. adds 3170d548426 [InstCombine][X86] Covert masked load/stores with (sign ext [...] adds 8ce75e2778d TableGen: change a couple of member names to clarify their use. adds 74760bb00fb [LV][ARM] Add preferInloopReduction target hook. adds 3de9e3e493b [DSE] Precommit test case with loop carried dependence. adds e082dee2b58 [DSE] Bail out on MemoryPhis when deleting stores at end of [...] adds d85ac6d577a [DSE] Adjust coroutines test after e082dee2b588. adds ad3d6f993d9 [SelectionDAG][X86][ARM][AArch64] Add ISD opcode for __buil [...] adds cc76965b190 [MinGW] Use lib prefix for libraries adds bb613044b68 [MinGW][clang-shlib] Build by default on MinGW adds 7da94193990 [MinGW][libclang] Allow simultaneous shared and static lib adds c34a99fe589 [InstCombine] Add extra use tests for abs canonicalization (NFC) adds c55c14837e1 [gcov] Clean up by getting llvm.dbg.cu earlier adds 412c9c0bf2a [gcov] emitProfileArcs: iterate over GCOVFunction's instead [...] adds 7d3825ed954 Revert "[gcov] emitProfileArcs: iterate over GCOVFunction's [...] adds e8e3693ceaa Change range operator from deprecated '-' to '...' adds 93b4f853826 Update TableGen test files to use the new '...' range punctuation. adds bdd1eba37b6 [ARM] Add additional vecreduce float legalization test (NFC) adds d6fadc49e3d [gcov] Process .gcda immediately after the accompanying .gc [...] adds 04febd30a8d [lld][WebAssembly] Error on import/export of mutable global [...] adds c2f8bc986fb [ARM] Add tests for fmin/max + inf folds (NFC) adds cc2da5554b5 [lld][WebAssembly] Add initial support for -Map/--print-map adds 70daa353e2a [gn build] Port cc2da5554b5 adds 9d300bc8d2f [Hexagon] Avoid widening vectors with non-HVX element types adds 758732a34ed [X86] Use ISD::PARITY directly instead of emitting CTPOP an [...] adds 61d29e0dff0 [LegalizeTypes] Remove a few cases from SplitVectorOperand [...] new 0fb2203cd6c [Docs] Fix --print-supported-cpus option rendering new 8cf1ac97cec [llvm-cov gcov] Improve accuracy when some edges are not measured new f086e85eea9 [gcov] Assign names to some types and loaded values used in [...]
The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: clang/docs/CommandGuide/clang.rst | 6 +- clang/include/clang/Basic/CodeGenOptions.def | 4 + clang/include/clang/Driver/Options.td | 3 + clang/lib/CodeGen/CGCall.cpp | 7 + clang/lib/CodeGen/CodeGenFunction.cpp | 36 +- clang/lib/Driver/ToolChains/WebAssembly.cpp | 21 + clang/lib/Frontend/CompilerInvocation.cpp | 2 + clang/test/CodeGen/align_value.cpp | 30 +- clang/test/CodeGen/alloc-align-attr.c | 44 +- .../assume-aligned-and-alloc-align-attributes.c | 8 +- clang/test/CodeGen/builtin-align-array.c | 32 +- clang/test/CodeGen/builtin-align.c | 24 +- clang/test/CodeGen/builtin-assume-aligned.c | 32 +- ...-assumption-attribute-align_value-on-lvalue.cpp | 8 +- ...ssumption-attribute-align_value-on-paramvar.cpp | 2 +- ...-attribute-alloc_align-on-function-variable.cpp | 10 +- ...ssumption-attribute-alloc_align-on-function.cpp | 2 +- ...ibute-assume_aligned-on-function-two-params.cpp | 10 +- ...mption-attribute-assume_aligned-on-function.cpp | 2 +- ...uiltin_assume_aligned-three-params-variable.cpp | 10 +- ...umption-builtin_assume_aligned-three-params.cpp | 10 +- ...ssumption-builtin_assume_aligned-two-params.cpp | 8 +- .../CodeGen/catch-alignment-assumption-openmp.cpp | 8 +- clang/test/CodeGen/code-coverage.c | 6 +- .../CodeGen/non-power-of-2-alignment-assumptions.c | 13 +- clang/test/CodeGen/pass-by-value-noalias.c | 16 + clang/test/CodeGenCXX/pass-by-value-noalias.cpp | 73 + clang/test/CodeGenObjC/pass-by-value-noalias.m | 22 + clang/test/Driver/wasm-toolchain.c | 11 + clang/test/OpenMP/simd_codegen.cpp | 16 - clang/test/OpenMP/simd_metadata.c | 117 +- ..._teams_distribute_parallel_for_simd_codegen.cpp | 5 +- clang/tools/CMakeLists.txt | 2 +- clang/tools/libclang/CMakeLists.txt | 4 +- compiler-rt/test/profile/gcov-basic.c | 2 + lld/test/ELF/map-file.s | 2 +- lld/test/wasm/Inputs/undefined-globals.s | 4 +- lld/test/wasm/early-exit-for-bad-paths.s | 8 +- lld/test/wasm/emit-relocs-fpic.s | 4 +- lld/test/wasm/gc-imports.s | 6 +- lld/test/wasm/map-file.s | 47 + lld/test/wasm/mutable-globals.s | 13 + lld/test/wasm/pie.ll | 2 +- lld/test/wasm/shared.ll | 2 +- lld/wasm/CMakeLists.txt | 1 + lld/wasm/Config.h | 1 + lld/wasm/Driver.cpp | 7 +- lld/wasm/InputChunks.h | 4 +- lld/wasm/MapFile.cpp | 148 ++ lld/wasm/MapFile.h | 21 + lld/wasm/Options.td | 6 + lld/wasm/OutputSections.cpp | 7 +- lld/wasm/OutputSections.h | 20 +- lld/wasm/Symbols.h | 2 +- lld/wasm/Writer.cpp | 27 + lldb/source/API/CMakeLists.txt | 4 +- llvm/cmake/modules/AddLLVM.cmake | 2 +- llvm/docs/LangRef.rst | 14 +- llvm/include/llvm/Analysis/InstructionSimplify.h | 6 + llvm/include/llvm/Analysis/TargetTransformInfo.h | 10 + .../llvm/Analysis/TargetTransformInfoImpl.h | 5 + llvm/include/llvm/CodeGen/BasicTTIImpl.h | 4 - llvm/include/llvm/CodeGen/ISDOpcodes.h | 1 + llvm/include/llvm/IR/IRBuilder.h | 28 +- llvm/include/llvm/ProfileData/GCOV.h | 2 + llvm/include/llvm/Support/raw_ostream.h | 64 +- llvm/include/llvm/TableGen/Record.h | 21 +- .../Transforms/Scalar/AlignmentFromAssumptions.h | 6 +- llvm/lib/Analysis/AssumeBundleQueries.cpp | 13 +- llvm/lib/Analysis/InstructionSimplify.cpp | 50 +- llvm/lib/Analysis/TargetTransformInfo.cpp | 5 + llvm/lib/CodeGen/ExpandReductions.cpp | 16 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 19 + llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 26 + .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 21 +- llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h | 3 +- .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 26 +- .../CodeGen/SelectionDAG/SelectionDAGDumper.cpp | 1 + llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 9 +- llvm/lib/CodeGen/TargetLoweringBase.cpp | 1 + llvm/lib/IR/IRBuilder.cpp | 77 +- llvm/lib/IR/Verifier.cpp | 23 +- llvm/lib/ProfileData/GCOV.cpp | 11 +- llvm/lib/Support/raw_ostream.cpp | 36 +- llvm/lib/TableGen/Record.cpp | 4 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 2 - llvm/lib/Target/AArch64/AArch64InstrFormats.td | 8 +- .../Target/AArch64/AArch64TargetTransformInfo.h | 5 - llvm/lib/Target/ARM/ARMISelLowering.cpp | 51 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 14 + llvm/lib/Target/ARM/ARMTargetTransformInfo.h | 9 +- llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp | 28 +- llvm/lib/Target/Hexagon/HexagonSubtarget.h | 13 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 246 +-- llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp | 108 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 15 +- .../Transforms/InstCombine/InstCombineSelect.cpp | 55 +- .../Transforms/Instrumentation/GCOVProfiling.cpp | 387 ++-- .../Transforms/Scalar/AlignmentFromAssumptions.cpp | 121 +- .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 10 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 10 +- llvm/test/CodeGen/AArch64/parity.ll | 161 ++ .../AArch64/vecreduce-fmax-legalization-nan.ll | 20 +- .../CodeGen/AArch64/vecreduce-fmax-legalization.ll | 2 +- llvm/test/CodeGen/ARM/fminmax-folds.ll | 256 +++ llvm/test/CodeGen/ARM/parity.ll | 162 ++ .../ARM/vecreduce-fadd-legalization-soft-float.ll | 39 + .../Generic/expand-experimental-reductions.ll | 40 +- .../autohvx/isel-widen-truncate-illegal-elem.ll | 34 + llvm/test/CodeGen/Thumb2/mve-vecreduce-fminmax.ll | 1307 +++--------- llvm/test/CodeGen/Thumb2/mve-vecreduce-loops.ll | 30 +- llvm/test/CodeGen/Thumb2/mve-vecreduce-mla.ll | 1100 +--------- llvm/test/CodeGen/Thumb2/mve-vecreduce-mlapred.ll | 2244 ++------------------ llvm/test/CodeGen/X86/parity.ll | 189 +- llvm/test/CodeGen/X86/vector-reduce-fmax-nnan.ll | 348 ++- llvm/test/CodeGen/X86/vector-reduce-fmax.ll | 1088 ++++++++-- llvm/test/CodeGen/X86/vector-reduce-fmin-nnan.ll | 358 +++- llvm/test/CodeGen/X86/vector-reduce-fmin.ll | 1078 ++++++++-- llvm/test/CodeGen/X86/vector-reduce-xor-bool.ll | 12 +- llvm/test/CodeGen/X86/vector-shuffle-128-v16.ll | 32 +- llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll | 114 +- llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll | 37 +- llvm/test/CodeGen/X86/vector-shuffle-512-v32.ll | 10 +- llvm/test/TableGen/AllowDuplicateRegisterNames.td | 2 +- llvm/test/TableGen/BigEncoder.td | 12 +- llvm/test/TableGen/BitOffsetDecoder.td | 16 +- llvm/test/TableGen/BitsInit.td | 6 +- llvm/test/TableGen/DAGDefaultOps.td | 16 +- llvm/test/TableGen/ForeachLoop.td | 4 +- llvm/test/TableGen/HwModeEncodeDecode.td | 14 +- llvm/test/TableGen/JSON.td | 4 +- llvm/test/TableGen/ListSlices.td | 4 +- llvm/test/TableGen/UnsetBitInit.td | 4 +- llvm/test/TableGen/cond-let.td | 14 +- llvm/test/TableGen/dag-isel-regclass-emit-enum.td | 2 +- llvm/test/TableGen/defset.td | 2 +- llvm/test/TableGen/foreach-variable-range.td | 32 +- llvm/test/TableGen/if.td | 12 +- llvm/test/TableGen/ifstmt.td | 6 +- llvm/test/TableGen/list-element-bitref.td | 4 +- llvm/test/TableGen/range-lists.td | 3 +- llvm/test/TableGen/simplify-patfrag.td | 2 +- llvm/test/TableGen/trydecode-emission3.td | 4 +- .../Transforms/AlignmentFromAssumptions/simple.ll | 75 +- .../AlignmentFromAssumptions/simple32.ll | 114 +- llvm/test/Transforms/Coroutines/ArgAddr.ll | 9 +- .../MSSA/multiblock-loop-carried-dependence.ll | 143 ++ .../MSSA/multiblock-malloc-free.ll | 1 + .../MSSA/multiblock-memintrinsics.ll | 18 + llvm/test/Transforms/Inline/align.ll | 15 +- llvm/test/Transforms/Inline/byref-align.ll | 9 +- .../InstCombine/X86/x86-masked-memops.ll | 107 +- llvm/test/Transforms/InstCombine/abs-1.ll | 103 +- llvm/test/Transforms/InstCombine/assume.ll | 1 + llvm/test/Transforms/InstCombine/select.ll | 7 +- .../LoopVectorize/ARM/mve-reduction-types.ll | 42 +- .../Transforms/LoopVectorize/ARM/mve-reductions.ll | 168 +- .../inlining-alignment-assumptions.ll | 27 +- llvm/test/Verifier/assume-bundles.ll | 16 +- llvm/test/tools/llvm-cov/gcov-8.c | 6 +- llvm/test/tools/llvm-mca/AArch64/Exynos/load.s | 10 +- llvm/tools/llvm-config/llvm-config.cpp | 1 + .../unittests/Analysis/AssumeBundleQueriesTest.cpp | 38 + llvm/unittests/Support/CMakeLists.txt | 1 + llvm/unittests/Support/raw_fd_stream_test.cpp | 67 + llvm/utils/gn/secondary/lld/wasm/BUILD.gn | 1 + .../gn/secondary/llvm/unittests/Support/BUILD.gn | 1 + 167 files changed, 6138 insertions(+), 6194 deletions(-) create mode 100644 clang/test/CodeGen/pass-by-value-noalias.c create mode 100644 clang/test/CodeGenCXX/pass-by-value-noalias.cpp create mode 100644 clang/test/CodeGenObjC/pass-by-value-noalias.m create mode 100644 lld/test/wasm/map-file.s create mode 100644 lld/test/wasm/mutable-globals.s create mode 100644 lld/wasm/MapFile.cpp create mode 100644 lld/wasm/MapFile.h create mode 100644 llvm/test/CodeGen/AArch64/parity.ll create mode 100644 llvm/test/CodeGen/ARM/parity.ll create mode 100644 llvm/test/CodeGen/Hexagon/autohvx/isel-widen-truncate-illegal-elem.ll create mode 100644 llvm/test/Transforms/DeadStoreElimination/MSSA/multiblock-loop- [...] create mode 100644 llvm/unittests/Support/raw_fd_stream_test.cpp