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from ab9fc70149d libgcc: xtensa: remove stray symbols from X*HAL macro definitions new 2f187e98939 range-op-float: Fix up frange_arithmetic [PR107967] new 8d4f007398b arm: fix mve intrinsics scan body tests for C++
The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: gcc/range-op-float.cc | 39 ++++++++++++++-- gcc/testsuite/gcc.dg/pr107967-1.c | 35 ++++++++++++++ gcc/testsuite/gcc.dg/pr107967-2.c | 35 ++++++++++++++ gcc/testsuite/gcc.dg/pr107967-3.c | 53 ++++++++++++++++++++++ .../gcc.target/arm/mve/intrinsics/vabavq_p_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabavq_p_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabavq_p_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabavq_p_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabavq_p_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabavq_p_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabavq_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabavq_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabavq_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabavq_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabavq_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabavq_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabdq_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabdq_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabdq_m_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabdq_m_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabdq_m_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabdq_m_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabdq_m_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabdq_m_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabdq_m_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabdq_m_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabdq_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabdq_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabdq_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabdq_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabdq_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabdq_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabdq_x_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabdq_x_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabdq_x_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabdq_x_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabdq_x_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabdq_x_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabdq_x_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabdq_x_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabsq_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabsq_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabsq_m_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabsq_m_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabsq_m_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabsq_m_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabsq_m_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabsq_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabsq_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabsq_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabsq_x_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabsq_x_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabsq_x_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabsq_x_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vabsq_x_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vaddlvaq_p_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vaddlvaq_p_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vaddlvaq_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vaddlvaq_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vaddlvq_p_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vaddlvq_p_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vaddlvq_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vaddlvq_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vaddq_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vaddq_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vaddq_m_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vaddq_m_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c | 8 ++++ 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| 8 ++++ .../gcc.target/arm/mve/intrinsics/vcmpcsq_m_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vcmpcsq_m_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vcmpcsq_m_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vcmpcsq_n_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vcmpcsq_n_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vcmpcsq_n_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vcmpcsq_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vcmpcsq_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vcmpcsq_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vcmpeqq_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vcmpeqq_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vcmpeqq_m_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vcmpeqq_m_f32.c | 8 ++++ .../arm/mve/intrinsics/vcmpeqq_m_n_f16.c | 8 ++++ .../arm/mve/intrinsics/vcmpeqq_m_n_f32.c | 8 ++++ .../arm/mve/intrinsics/vcmpeqq_m_n_s16.c | 8 ++++ .../arm/mve/intrinsics/vcmpeqq_m_n_s32.c | 8 ++++ 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++++ .../gcc.target/arm/mve/intrinsics/vmaxnmaq_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxnmaq_m_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxnmavq_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxnmavq_f32.c | 8 ++++ .../arm/mve/intrinsics/vmaxnmavq_p_f16.c | 8 ++++ .../arm/mve/intrinsics/vmaxnmavq_p_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxnmq_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxnmq_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxnmq_x_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxnmq_x_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxnmvq_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxnmvq_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxq_m_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxq_m_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxq_m_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxq_m_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxq_m_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxq_m_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxq_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxq_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxq_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxq_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxq_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxq_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxq_x_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxq_x_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxq_x_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxq_x_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxq_x_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxq_x_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxvq_p_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxvq_p_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxvq_p_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxvq_p_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxvq_p_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxvq_p_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxvq_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxvq_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxvq_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxvq_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxvq_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmaxvq_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminaq_m_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminaq_m_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminaq_m_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminaq_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminaq_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminaq_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminavq_p_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminavq_p_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminavq_p_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminavq_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminavq_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminavq_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminnmaq_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminnmaq_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminnmaq_m_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminnmaq_m_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminnmavq_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminnmavq_f32.c | 8 ++++ .../arm/mve/intrinsics/vminnmavq_p_f16.c | 8 ++++ .../arm/mve/intrinsics/vminnmavq_p_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminnmq_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminnmq_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminnmq_x_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminnmq_x_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminnmvq_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminnmvq_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminnmvq_p_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminnmvq_p_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminq_m_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminq_m_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminq_m_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminq_m_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminq_m_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminq_m_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminq_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminq_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminq_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminq_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminq_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminq_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminq_x_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminq_x_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminq_x_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminq_x_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminq_x_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminq_x_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminvq_p_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminvq_p_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminvq_p_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminvq_p_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminvq_p_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminvq_p_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminvq_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminvq_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminvq_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminvq_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminvq_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vminvq_u8.c | 8 ++++ .../arm/mve/intrinsics/vmladavaq_p_s16.c | 8 ++++ .../arm/mve/intrinsics/vmladavaq_p_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmladavaq_p_s8.c | 8 ++++ .../arm/mve/intrinsics/vmladavaq_p_u16.c | 8 ++++ .../arm/mve/intrinsics/vmladavaq_p_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmladavaq_p_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmladavaq_s16.c | 32 ++++++++++--- .../gcc.target/arm/mve/intrinsics/vmladavaq_s32.c | 32 ++++++++++--- .../gcc.target/arm/mve/intrinsics/vmladavaq_s8.c | 32 ++++++++++--- .../gcc.target/arm/mve/intrinsics/vmladavaq_u16.c | 44 +++++++++++++++--- .../gcc.target/arm/mve/intrinsics/vmladavaq_u32.c | 44 +++++++++++++++--- .../gcc.target/arm/mve/intrinsics/vmladavaq_u8.c | 44 +++++++++++++++--- .../arm/mve/intrinsics/vmlaldavaxq_p_s16.c | 8 ++++ .../arm/mve/intrinsics/vmlaldavaxq_p_s32.c | 8 ++++ .../arm/mve/intrinsics/vmlaldavaxq_s16.c | 8 ++++ .../arm/mve/intrinsics/vmlaldavaxq_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmlasq_m_n_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmlasq_m_n_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmlasq_m_n_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmlasq_m_n_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmlasq_m_n_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmlasq_m_n_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmlasq_n_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmlasq_n_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmlasq_n_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmlasq_n_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmlasq_n_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmlasq_n_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_m_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_m_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_m_n_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_m_n_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_m_n_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_m_n_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_m_n_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_m_n_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_m_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_m_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_m_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_m_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_m_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_m_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_n_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_n_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_n_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_n_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_n_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_n_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_n_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_n_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_x_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_x_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_x_n_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_x_n_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_x_n_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_x_n_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_x_n_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_x_n_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_x_n_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_x_n_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_x_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_x_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_x_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_x_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_x_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vmulq_x_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqaddq_m_n_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqaddq_m_n_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqaddq_m_n_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqaddq_m_n_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqaddq_m_n_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqaddq_m_n_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqaddq_m_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqaddq_m_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqaddq_m_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqaddq_m_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqaddq_m_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqaddq_m_u8.c | 8 ++++ .../arm/mve/intrinsics/vqdmlahq_m_n_s16.c | 8 ++++ .../arm/mve/intrinsics/vqdmlahq_m_n_s32.c | 8 ++++ .../arm/mve/intrinsics/vqdmlahq_m_n_s8.c | 8 ++++ .../arm/mve/intrinsics/vqdmulhq_m_n_s16.c | 8 ++++ .../arm/mve/intrinsics/vqdmulhq_m_n_s32.c | 8 ++++ .../arm/mve/intrinsics/vqdmulhq_m_n_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqdmulhq_m_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqdmulhq_m_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqdmulhq_m_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqdmulhq_n_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqdmulhq_n_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqdmulhq_n_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqdmulhq_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqdmulhq_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqdmulhq_s8.c | 8 ++++ .../arm/mve/intrinsics/vqdmullbq_m_n_s16.c | 8 ++++ .../arm/mve/intrinsics/vqdmullbq_m_n_s32.c | 8 ++++ .../arm/mve/intrinsics/vqdmullbq_m_s16.c | 8 ++++ .../arm/mve/intrinsics/vqdmullbq_m_s32.c | 8 ++++ .../arm/mve/intrinsics/vqdmullbq_n_s16.c | 8 ++++ .../arm/mve/intrinsics/vqdmullbq_n_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqdmullbq_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqdmullbq_s32.c | 8 ++++ .../arm/mve/intrinsics/vqdmulltq_m_n_s16.c | 8 ++++ .../arm/mve/intrinsics/vqdmulltq_m_n_s32.c | 8 ++++ .../arm/mve/intrinsics/vqdmulltq_m_s16.c | 8 ++++ .../arm/mve/intrinsics/vqdmulltq_m_s32.c | 8 ++++ .../arm/mve/intrinsics/vqdmulltq_n_s16.c | 8 ++++ .../arm/mve/intrinsics/vqdmulltq_n_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqdmulltq_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqdmulltq_s32.c | 8 ++++ .../arm/mve/intrinsics/vqrdmlahq_m_n_s16.c | 8 ++++ .../arm/mve/intrinsics/vqrdmlahq_m_n_s32.c | 8 ++++ .../arm/mve/intrinsics/vqrdmlahq_m_n_s8.c | 8 ++++ .../arm/mve/intrinsics/vqrdmlahq_n_s16.c | 8 ++++ .../arm/mve/intrinsics/vqrdmlahq_n_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqrdmlahq_n_s8.c | 8 ++++ .../arm/mve/intrinsics/vqrdmlashq_m_n_s16.c | 8 ++++ .../arm/mve/intrinsics/vqrdmlashq_m_n_s32.c | 8 ++++ .../arm/mve/intrinsics/vqrdmlashq_m_n_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqsubq_m_n_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqsubq_m_n_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqsubq_m_n_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqsubq_m_n_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqsubq_m_n_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqsubq_m_n_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqsubq_m_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqsubq_m_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqsubq_m_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqsubq_m_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqsubq_m_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqsubq_m_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqsubq_n_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqsubq_n_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqsubq_n_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqsubq_n_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqsubq_n_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqsubq_n_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqsubq_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqsubq_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqsubq_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqsubq_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqsubq_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vqsubq_u8.c | 8 ++++ .../arm/mve/intrinsics/vrmlaldavhaq_p_s32.c | 8 ++++ .../arm/mve/intrinsics/vrmlaldavhaq_p_u32.c | 8 ++++ .../arm/mve/intrinsics/vrmlaldavhaq_s32.c | 24 +++++++++- .../arm/mve/intrinsics/vrmlaldavhaq_u32.c | 36 ++++++++++++++- .../gcc.target/arm/mve/intrinsics/vrshlq_m_n_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vrshlq_m_n_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vrshlq_m_n_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vrshlq_m_n_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vrshlq_m_n_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vrshlq_m_n_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vrshlq_m_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vrshlq_m_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vrshlq_m_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vrshlq_m_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vrshlq_m_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vrshlq_m_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vrshlq_n_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vrshlq_n_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vrshlq_n_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vrshlq_n_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vrshlq_n_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vrshlq_n_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vrshlq_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vrshlq_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vrshlq_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vrshlq_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vrshlq_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vrshlq_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vrshlq_x_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vrshlq_x_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vrshlq_x_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vrshlq_x_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vrshlq_x_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vrshlq_x_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_m_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_m_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_m_n_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_m_n_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_m_n_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_m_n_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_m_n_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_m_n_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_m_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_m_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_m_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_m_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_m_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_m_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_n_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_n_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_n_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_n_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_n_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_n_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_n_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_n_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_x_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_x_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_x_n_f16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_x_n_f32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_x_n_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_x_n_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_x_n_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_x_n_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_x_n_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_x_n_u8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_x_s16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_x_s32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_x_s8.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_x_u16.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_x_u32.c | 8 ++++ .../gcc.target/arm/mve/intrinsics/vsubq_x_u8.c | 8 ++++ 789 files changed, 6623 insertions(+), 43 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/pr107967-1.c create mode 100644 gcc/testsuite/gcc.dg/pr107967-2.c create mode 100644 gcc/testsuite/gcc.dg/pr107967-3.c