[Tcwg-commits] [llvm] branch testing updated (2002e49 -> fff778a)

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from 2002e49 Updating branches/google/testing to r275480 adds 9c52409 [GVN] Fold constant expression in GVN. adds 323f789 llvm-objdump: handle stubbed and malformed dylibs better adds 81a5520 [LoopDist] Fix typo in diagnostic adds db85662 [X86][AVX2] Allow VPERMPD/VPERMQ shuffles to call combineShuf [...] adds 520a6ed llvm-objdump: extend __mh_execute_header handling to other sp [...] adds c61d5f4 [codeview] Shrink inlined call site line info tables adds f7f8380 [AArch64] Set COPY ZR isAsCheapAsAMove when needed. adds 435a446 AMDGPU: Fix splitting kill blocks with defs before kill adds 011dcf3 AMDGPU: Fix trying to skip from a block with no successors adds beff7fe AMDGPU: Fix not expanding control flow after some kill blocks adds 7b18a76 [Coverage] Mark a few more methods const (NFC) adds b9d9ab2 [llvm-cov] Clean up an awkward capture-by-reference (NFC) adds 343b271 [llvm-cov] Fix a use-after-free adds 8e1c20f [Kaleidoscope][BuildingAJIT] Start filling in text for chapter 3. adds b972a0f [llvm-cov] Improve error messages adds 58d6ea4 [llvm-cov] Relax a test for Windows adds 1bd4284 [IR] andIRFlags and copyIRFlags needs to handle GEP adds 498a8f9 XFAIL two SeparateConstOffsetFromGEP tests adds decaafe [ARM] Prefer indirect calls in minsize mode adds c30ebec [ARM] Followup to r275537 addressing review comments adds cf85ddc [Thumb-1] Select post-increment load and store where possible adds d7bfcba [ARM] Fix build after r275540 adds be745b9 [X86][AVX2] Improve lowerShuffleAsRepeatedMaskAndLanePermute [...] adds 02e653e [X86][AVX2] Added a memory version of test_mm256_broadcastsi1 [...] adds c08f35c [X86][AVX] Added shuffle tests for UNPCK+PERMUTE adds d64a2c4 [LLVM][MIPS] Fix createStubFunction to emit JR encoding based [...] adds 9c2e9dc code hoisting pass based on GVN adds 92e694c Revert r275141 - Mips: Avoid implicit iterator conversions, NFC adds fe39292 Re-submit r272891 "Prevent dangling pointer problems in Branc [...] adds 48ed4ab Rename AnalyzeBranch* to analyzeBranch*. adds 6b0141c [AMDGPU] Add metadata for runtime adds 53352c3 [LV] Swap A and B in interleaved access analysis (NFC) adds 6e06ef3 In dag-optnone.ll, use varargs instead of win64 to fast SDIsel. adds 733cec8 [Hexagon] Improve patterns with stack-based addressing adds 2ca934e [DSE]Enhance shorthening MemIntrinsic based on OverlapIntervals adds 76ebfff [Hexagon] Fixes/changes to instruction selection adds a3d02c7 IR: Sort generic intrinsics before target specific ones adds ca28eb1 [PM] Convert LoopInstSimplify Pass to new PM adds bd8bfbd [Hexagon] Update instruction itineraries adds af8dbbc [AliasAnalysis] Give back AA results for fence instructions adds 3d1f237 [libFuzzer] add ThreadedLeakTest adds f8cec99 [OptRemark,LDist] RFC: Add hotness attribute adds 5e3461e [Hexagon] Add a scheduling DAG mutation adds 7818b96 fix documentation comments; NFC adds 0922b28 [PGO] IRPGO pre-cleanup pass changes adds 14fc45e [CodeGen] Take a MachineMemOperand::Flags in MachineFunction: [...] adds b2d6ad7 [SelectionDAG] Get rid of bool parameters in SelectionDAG::ge [...] adds df5741e [SCCP] Merge two conditions into one. NFCI. adds a3bb4fa add tests for associative ops blocked by a cast adds aafccf0 [MBP] Clean up of the comments, and a first attempt to better [...] adds 9f7e6d2 [ReassociateGEP] Update tests to allow missing "inbounds" on [...] adds d5ecd00 [Hexagon] Replace postprocessDAG with a more elaborate DAG mutation adds a6cb710 Revert "[AMDGPU] Add metadata for runtime" adds 17ea6c1 Fix calls to SelectionDAG::getStore adds 723a3ff [CFLAA] Add an initial CFLAnders implementation. adds c700450 [PowerPC] Set kill flag for scratch register when spilling th [...] adds 2347de1 [CFLAA] Add attributes handling for CFLAnders. adds 866d448 [Hexagon] Make MI scheduler check for stalls in previous pack [...] adds 2cef100 Teach fast isel about the win64 calling convention. adds 32cf292 [pdb] Introduce MsfBuilder for laying out PDB files. adds bf4114e Make processInstruction from LCSSA.cpp externally available. adds 1083a52 CodeGen: avoid emitting unnecessary CFI adds db823e2 DebugInfo: reorder some initializers adds 8a9af26 AMDGPU/R600: Delete dead code. adds 7150fbf AMDGPU: Remove legacy rsq.clamped intrinsic adds a47e87a AMDGPU: Remove AMDGPU.ldexp adds 5fecfa2 AMDGPU: Fix TargetPrefix for remaining r600 intrinsics adds 35290cc AMDGPU: Remove brev intrinsic adds 1b5d21e [Hexagon] Handle instruction latency for 0 or 2 cycles adds 0d9b855 StructurizeCFG: Fix inverting constantexpr conditions adds 6be3e7c [pdb] Use MsfBuilder to handle the writing PDBs. adds 93a8d14 [pdb] Round trip the NameMap data structure to YAML. adds 9b30e73 [pdb] Teach MsfBuilder and other classes about the Free Page Map. adds 6417b3c [lanai] Fix build by updating calls to getLoad & getStore. adds 36b9c09 BPF: Use official ELF e_machine value adds 4672601 ExpandPostRAPseudos should transfer implicit uses, not only i [...] adds e066e58 AMDGPU: Fix verifier error from partially undef copy adds 0207ca8 [lanai] Small cleanup: remove/comment out unused args adds 2e7b0c9 Minor code cleanups. NFC. adds b203f80 [Support] Fix a doxygen comment (NFC) adds a5ec41d [llvm-cov] Document a few private fields of CodeCoverageTool (NFC) adds 13ca1cc [llvm-cov] Optionally use a symbol demangler when preparing reports adds 84b5112 [llvm-cov] Attempt to appease Windows bots adds 7e877ba Reapply "Mips: Avoid implicit iterator conversions, NFC" adds 91aa2f6 bugpoint: add flag -verbose-errors adds eb1556c [llvm-cov] Attempt to appease an older builder adds 730992d [libFuzzer] add hooks for strstr, strcasestr, strcasecmp, str [...] adds 0616793 Don't do uint64_t(1) << 64 in maxUIntN. adds 8f1ea71 Fix modules buildbot after r275633. adds 4d5c34d MIParser: reject subregister indexes on physregs adds 01f8f57 Reword comment to be more clear. adds 05b523a ARM: Initialize LoadStore passes in TargetMachine adds 7e0a8cb ARM/MIR: Move test from MIR to CodeGen/ARM directory adds 4bd6d7f llc: Move pass query/add code into an own function; NFC adds 3346c15 llc: Add support for -run-pass none adds 108967b [AVX512] Remove CodeGenOnly VBROADCAST m_Int instructions. Th [...] adds 384c642 Re-commit [AMDGPU] Add metadata for runtime adds aa47729 Disable this-return argument forwarding on ARM/AArch64 adds 4fe9cc7 Revert "Revert r275027 - Let FuncAttrs infer the 'returned' a [...] adds 05d1283 [InstCombine] reassociate logic ops with constants separated [...] adds 2913e8c auto-ggenerate checks adds dbf9b41 auto-generate checks adds 32507fc update test to use FileCheck adds 5de5eb9 update tests to use FileCheck, consolidate tests, fix comments adds bf11cc7 IPRA: avoid double query to the map (NFC) adds 713ceaf add vector test to show missing transform adds 2e9433d [InstCombine] allow X + signbit --> X ^ signbit for vector splats adds 78ee4b6 [PM] Convert IVUsers analysis to new pass manager. adds 562b267 X86: Updated a test file. NFC. adds 6118908 test commit adds c64254e Refactor indirect call promotion profitability analysis (NFC) adds 350718e Address review comments. adds e2f3426 [ThinLTO] Perform profile-guided indirect call promotion adds 4397329 [X86][SSE] lowerVectorShuffleAsPermuteAndUnpack tidyup. NFCI. adds 506afb8 [X86] Regenerated popcnt scalar tests for 32/64-bit targets w [...] adds 0aff5d2 [X86] Regenerated ctlz/cttz scalar tests for 32/64-bit target [...] adds 5bf69d8 [X86][AVX] Added VBROADCASTF128/VBROADCASTI128 tests adds bac9a5d Fix warnings in ImmutableSetTest and SequenceTest. adds a0a6942 Use a faster implementation of maxUIntN. adds c71e199 Fix isShiftedInt and isShiftedUint for widths > 32. adds 495097a Add assertions checking SignExtend{32,64}'s bit width. adds 61e00f9 Clean up some comments in MathExtras.h. adds f36e869 Avoid UB in maxIntN(64). adds 5e704c7 Add tests for max/minIntN(64). adds 08df0eb [X86] Add CTPOP/CTLZ/CTTZ scalar cost tests adds 998d310 Strip trailing whitespace adds 9cffe5e [GVN] Use FileCheck instead of grep for tests. adds c2a1d89 [GVN] Move the PRE/LOADPRE test in a subdirectory. adds 7f32109 [GVN] Move other PRE tests to a subdirectory. adds 326770a [GVNHoist] Some small cleanups adds a6f9e21 [GVNHoist] Sink HoistedCtr into GVNHoist adds 7358595 Revert r275678, "Revert "Revert r275027 - Let FuncAttrs infer [...] adds 4893e1f [llvm-cov] Attempt to fix a test failure on Windows adds 93324fe [GVNHoist] Change the key for VNtoInsns to a pair adds 92763c0 [X86] Fix 80-column violations. NFC adds 0c4677f [AVX512] Use VMOVAPSZ128rr/VMOVAPS256rr for VR128X/VR256X phy [...] adds e70f2b6 [X86] Add more opcodes to isFrameLoadOpcode/isFrameStoreOpcod [...] adds 3305a40 [X86] Add AVX512 load opcodes and a couple AVX load opcodes t [...] adds 224d146 [X86] Add more AVX512 instructions to X86InstrInfo::isHighLat [...] adds 4388ffc [X86] Add AVX512 instructions to X86InstrInfo::isAssociativeA [...] adds 81c3344 [X86] Add floating point packed logical ops to X86InstrInfo:: [...] adds fefffbf [X86] Add VPADD instructions to X86InstrInfo::isAssociativeAn [...] adds ad7e1da [X86] Add VPMULLW/D/Q instructions to X86InstrInfo::isAssocia [...] adds b06a386 [AVX512] Add KADD/KAND/KOR/KXOR to X86InstrInfo::isAssociativ [...] adds d504c85 [ARM] Honour ABI for rem under -O0 for EABI, GNUEABI, Android [...] adds 4052e72 [X86] Fix test checks to include leading 'v' on avx mnemonic names. adds c9ba7aa [AVX512] Add EVEX versions of scalar ADD/SUB/MUL/DIV to load [...] adds ef2833b [ARM] Skip inline asm memory operands in DAGToDAGISel adds 7e13fe0 [ARM] Update test to use CHECK-LABEL. NFCI. adds 0c05ce4 AMDGPU: Disable AMDGPUPromoteAlloca pass for shader calling c [...] adds 5ebefb8 [inlineasm] Propagate operand constraints to the backend adds 0537d4b [SLPVectorizer][X86] Added sqrt vectorization tests adds 46f9c27 Fixed errors in docs. adds 9547556 [Hexagon] Fix zero latency instructions with multiple predecessors adds 98b655f [Hexagon] HexagonMachineScheduler should account for resources adds 56af121 [Hexagon] Use timing class info as tie-breaker in machine scheduler adds 5646cdb [MC] Cleanup Error Handling in AsmParser adds fe4ad6d [PowerPC] Remove redundant direct moves when extracting integ [...] adds c47beda [Hexagon] Add verbose debugging mode to Hexagon MI Scheduler adds 71c0ef5 Revert "r275571 [DSE]Enhance shorthening MemIntrinsic based o [...] adds a7c00b1 [Hexagon] Enable .cur formation in MISched for Hexagon V60 adds 2cdac89 [Hexagon] Misc changes to HexagonMachineScheduler, NFC adds 00a0a78 [X86][AVX2] Added tests that demonstrate duplicate broadcasts adds c476e17 Sort include headers adds c7b8b5e [OptRemarkEmitter] Port to new PM adds 9b7ecbe [LoopDist] Port to new PM adds 7778b11 [LoopDist] This test does not require ASSERTS adds a9c9423 [MathExtras] Fix UB in minIntN adds f94271d [X86] Accept SELECT op code for x86-64 fp128 type adds 4cb51c5 [Hexagon] Handle returning small structures by value adds c91180f [X86][AVX] Add target shuffle decode support for VBROADCAST adds b3b8a5a [Hexagon] Revert r275822: mistake in commit message adds 44217e1 [Hexagon] Handle returning small structures by value adds 5337a14 Bump the trunk version to 4.0.0svn. adds a3ff212 [llvm-cov] Clean up error reporting (NFC) adds 98c7b9a [llvm-cov] Place anchors around line numbers in html reports adds e046459 Trunk release notes now refer to 4.0.0 adds ee86574 [llvm-cov] Re-write a very opaque comment (NFC) adds d7c16ef CodeGenPrep: use correct function to determine Global's alignment. adds 5e89a80 [ThinLTO] Address review comments from PGO indirect call prom [...] adds 797b9ee AMDGPU: Remove dead code and redundant check adds 865e2fa AMDGPU: Remove dead check in AMDGPUPromoteAlloca adds 40ca91a AMDGPU/R600: Replace barrier intrinsics adds bb09cfd AMDGPU: Add intrinsic for s_flbit_i32/v_ffbh_i32 adds 9a118f0 Regenerate test adds dddc530 AMDGPU: Fix missing switch case warning adds d57926e [X86][SSE] Regenerate truncate+extension memop tests adds 6bb6adf [X86][SSE] Regenerate extraction+store memop tests adds 93695a4 [X86][SSE] Regenerate extraction from promotion test adds a554d40 Fix -Wmicrosoft-enum-value in GVNHoist.cpp adds 1b96f3c AMDGPU: Remove pointless dyn_cast_or_null adds a2def1b [LCSSA] Post-process PHI-nodes created by SSAUpdate when cons [...] adds cf907e0 [GVNHoist] Remove a home-grown version of replaceUsesOfWith adds 8c78205 [MC] Separate non-parsing operations from conditional chains. NFC. adds 8b25cc9 Revert "[ARM] Update test to use CHECK-LABEL. NFCI." adds 2d1ffcc Revert "[ARM] Skip inline asm memory operands in DAGToDAGISel" adds 1bf3e6c [LoopSimplify] Update LCSSA after separating nested loops. adds 67e73ac [NVPTX] Force minimum alignment of 4 for byval arguments of d [...] adds 394b671 Revert r273099 "If the revision number starts with r, drop it [...] adds 52f3fd0 auto-generate checks adds 9beed53 build_llvm_package.bat: update version to 4.0.0 adds cc7cb1c add tests for missed sext transform adds dd7a28e Write isUInt using template specializations to work around an [...] adds dba9c32 refactor SimplifySelectInst; NFCI adds 1938056 Use uniforms set to populate VecValuesToIgnore. adds fba236f Revert rL275912. adds 385d706 [PM] Port FunctionImport Pass to new PM adds 829ba42 Update doxygen description for `WriteBitcodeToFile()` API (NFC) adds e7eb2d5 [PM] Convert Loop Strength Reduce pass to new PM adds 09080a9 [NVPTX] Make sure we adjust alignment at all call sites adds 94471e3 [llvm-profdata] Speed up merging by using a thread pool adds ec2cddd Fix -Wreturn-type with gcc 4.8 and libc++ adds 27e3ea1 [utils] Generate html reports with the code coverage utility script adds f36ea23 AMDGPU: Fix test name and broken CHECK-LABEL adds 2d37e25 TableGen: Allow custom register operand decoder method adds aaf3f19 [LoopReroll] Reroll loops with unordered atomic memory accesses adds 5a04b09 [Kaleidoscope][BuildingAJIT] More work on the text for Chapter 3. adds 4cead0b AMDGPU: Expand register indexing pseudos in custom inserter adds 530f0c2 AMDGPU/SI: Fix SI scheduler refcount issue adds 92a8d60 Recommit the patch "Use uniforms set to populate VecValuesToIgnore". adds 40a2c52 Revert "[llvm-profdata] Speed up merging by using a thread pool" adds d91d378 Retry: [llvm-profdata] Speed up merging by using a thread pool adds dbee0bf [X86] Rename VINSERTzrr to use a capital Z to match other ins [...] adds 9906b88 [MemorySSA] Update to the new shiny walker. adds b120dcd [X86] Remove superfluous parameter from a multiclass. All ins [...] adds c61cf90 [AVX512] Give priority to EVEX encoded PSHUFB over the VEX versions. adds 87a7905 AVX-512: Fixed BT instruction selection. adds 3666281 Style: drop some unnecessary ';' [NFC] adds 0f7fca9 [InstCombine] Minor cleanup of cast simplification code [NFC] adds 6019c79 [mips] Recognise the triple used by Debian stretch for mips64el. adds 0f320a4 [mips] Correct label prefixes for N32 and N64. adds 6b209b8 [mips][ias] R_MIPS_GOT_(PAGE|OFST) do not need symbols adds 3c62668 Get rid of VS2015 operator precedence warning. NFCI. adds e927841 [AARCH64] Enable AARCH64 lit tests on windows dev machines adds c964a66 [AARCH64] Fix linu triple typo adds ca1d6a6 Add support for tlsldm assembler operator to ARM target adds 7f3b304 [AArch64] PredictableSelectIsExpensive for Vulcan. adds aa39b55 [ARM] Refactor Thumb2 Mul and Mla instr descs adds 0f9cdd2 [X86][SSE] Reimplement SSE fp2si conversion intrinsics instea [...] adds 1ce58d7 AMDGPU: Only use legal inline immediates with kill pseudo adds 65165b2 [InstCombine] Enable cast-folding in logic(cast(icmp), cast(icmp)) adds 779845c add missing test for simplifySelectBitTest() adds 33f9159 [DSE] Add additional debug output. NFC. adds 5d55323 [X86][AVX] Fixed typo in test names adds 259dd35 [X86][AVX512] Added AVX512 subvector broadcast tests adds d9f3c5e add tests related to PR28466 adds ce04fe5 This code block breaks the docs build (http://lab.llvm.org:80 [...] adds 55bd48f [LoopPass] Some minor cleanups adds 2666c82 [RegionPass] Some minor cleanups adds a05b1c3 [RegionInfo] Some cleanups adds 3c8951d Add a testcase for r275581 adds fbab381 [DSE] Add additional debug output. NFC. adds 3487192 [libFuzzer] properly intercept memmem adds bd77322 [SCCP] Improve assert messages. NFCI. adds baf88b3 [FunctionAttrs] Correct the safety analysis for inference of [...] adds e627715 [GlobalISel] Simplify more RegClassOrRegBank is+get. NFC. adds 98d2ab3 [GlobalISel] Mark newly-created gvregs as having a bank. adds b2e69d9 ARM: move feature for Thumb2 pkhbt/pkhtb onto architectures. adds ea47fc5 [tsan] Don't instrument __llvm_gcov_global_state_pred or __ll [...] adds 75cca7a Use posix_fallocate instead of ftruncate. adds de4fbfe This code block breaks the docs build (http://lab.llvm.org:80 [...] adds 058f700 [CFLAA] Teach CFLAnders to distinguish reads from writes. adds 5f33cbe add even more missing tests for simplifySelectBitTest() adds fa90761 Next step along the way to getting good error messages for ba [...] adds 1caa063 [CFLAA] Add some interproc. analysis to CFLAnders. adds bfc5803 [CFLAA] Make a test tell the truth. NFC. adds 5012465 [AMDGPU] Remove dead code. adds f36cce1 [AMDGPU] Remove spurious line (should've been removed in r276029). adds fed9fd5 Attempt to appease MSVC buildbots. adds 11faea3 [InstCombine] fold add(zext(xor X, C), C) --> sext X when C i [...] adds bc05d15 [AArch64] Properly validate the reciprocal estimation. adds 6f62be2 regenerate checks adds e07c066 RegisterScavenger: Introduce backward() mode. adds c5e14e0 RegScavenging: Add scavengeRegisterBackwards() adds df36f1c Add AIX support to Path.inc, Host.h, and CMake. adds aee8a35 Make MemorySSA::dominates/locallydominates constant time adds 9ab6316 Make GVN Hoisting obey optnone/bisect. adds e37b4fd Fix unused variable adds 63be720 AMDGPU: Change fdiv lowering based on !fpmath metadata adds 1f0a7ed [libFuzzer] extend the messages printed by afl_driver adds b2c3189 [LSV] Add detail to correct-order.ll test. adds 7e9ef3a [LSV] Nix two global (ish) variables in the LoadStoreVectoriz [...] adds abcf914 [LSV] Use make_range, and reformat a DEBUG message. NFC adds 85ee7e9 [LSV] Insert stores at the right point. adds 7d84cf3 Get rid of call to StringRef::substr that's never used. adds 00d973e [ADT] Warn on unused results from ArrayRef and StringRef func [...] adds 9871423 This code block breaks the docs build (http://lab.llvm.org:80 [...] adds ebd8d9a Codegen: Factor out canTailDuplicate adds d8c90ea [PM] Port LoopUnroll. adds 98e46ef Revert r275883 and r275891. They seem to cause PR28608. adds 3d7281b Codegen: Tail Duplication: Only duplicate into layout pred if [...] adds e3d8cd8 Revert "RegScavenging: Add scavengeRegisterBackwards()" adds 30f6cf7 Fixing a few places in this doc which look like obvious typos. adds dbf6ad3 [LSV] Don't assume that loads/stores appear in address order [...] adds ddff628 llvm-readobj: add some more aliases adds 11bf1ab Revert "Revert r275883 and r275891. They seem to cause PR28608." adds dc062ef [LV] Add hotness attribute to missed-optimization remarks adds 9c5be76 Revert "Disable this-return argument forwarding on ARM/AArch64" adds 476169b Forgot to add a test for r276008. adds f5da138 [X86] Create some wrapper multiclasses to create AVX and SSE [...] adds b83989e [X86] Create some multiclasses to reduce the repeated pattern [...] adds c269039 [X86] Use 'HasAVX1Only' to properly give priority to the AVX2 [...] adds 69842b3 [AVX512] Add a missing NoVLX to give priority to the AVX512 v [...] adds 69d7e1c [docs] GitHub Proposal for LLVM adds 0aa76a9 [docs] Add proposals to index file adds f12c36b [docs] fix cmake code-block warning adds ab726d9 [ARM] Skip inline asm memory operands in DAGToDAGISel adds 002e4b5 [X86][SSE] Add cost model values for CTPOP of vectors adds 90e252f [InstCombine] Provide more test cases for cast-folding [NFC] adds 3ac7591 Revert "[InstCombine] Enable cast-folding in logic(cast(icmp) [...] adds 88ea57f [docs] Fixing Sphinx warnings to unclog the buildbot adds 59e8cab AMDGPU: Fix bug causing crash due to invalid opencl version m [...] adds 20e6e25 AMDGPU: Add missing test coverage for control flow breaks adds 475ddcc fix documentation comments; NFC adds fe11fa4 Use ValueOffsetPair to enhance value reuse during SCEV expansion. adds edd8aa0 Fix test/Analysis/ScalarEvolution/scev-expander-existing-valu [...] adds 402ec84 move decomposeBitTestICmp() to Transforms/Utils; NFC adds e4f2c83 minimize tests and auto-generate checks adds e422546 [cpu-detection] Cleanup of Host.cpp. adds 5f9c124 [OptDiag] Fix function comment adds 86d9bce [NVPTX] Improve lowering of byval args of device functions. adds 6de1b85 [NVPTX] deal with all aggregate return types. adds c5f802f Properly ifdef the use of cpuid. adds 4951996 GlobalISel: implement low-level type with just size & vector lanes. adds 6d11357 GlobalISel: properly conditionalize LLT use. adds e30c989 [pdbdump] Use the "flow" style to print out a sequence of uint32_t. adds bd986a7 [MSSA] Add an overload for getClobberingMemoryAccess. adds 05fc242 [LSV] Vectorize up to side-effecting instructions. adds 0cd5bfa [LSV] Don't move stores across may-load instrs, and loosen re [...] adds c2a8447 [SCCP] Zap multiple return values. adds 991d814 [GVNHoist] Don't hoist PHI nodes adds e212aa9 [AArch64][FastISel] Select atomic stores into STLR. adds 5181825 [AArch64][FastISel] Select -O0 legal cmpxchg. adds 6f08925 GlobalISel: implement Legalization querying framework. adds d05d253 [Profile] support directory reading in profile merging adds 5001c92 [NVPTX] Renamed NVPTXLowerKernelArgs -> NVPTXLowerArgs. NFC. adds 9ce2fff [OptDiag] Wrap a long line adds ef4767c [OptDiag] Take the IR Value as a const pointer adds 957976e [OptDiag,LV] Add hotness attribute to analysis remarks adds 265e149 [AArch64] Register AArch64LoadStoreOptimizer so it can be run [...] adds 64865df Revert r276185 -- build bot failure adds e1e2162 [NVPTX] Enable the load-store vectorizer on nvptx. adds 30a3883 Reapply r276185 adds efcefc9 [utils] Add script to check for code coverage regressions adds 7a905f9 [CFLAA] Add offset tracking in CFLGraph. adds a0113c2 Fix test failure on Win adds cd88743 GlobalISel: Remove explicit enumerator values from .def file. adds 6b817ea Make help text more consistent. NFC. adds 4c8b3b4 [InstSimplify][InstCombine] don't crash when folding vector s [...] adds cebe016 [OptDiag,LV] Add hotness attribute to the derived analysis remarks adds a2db716 [InstCombine] LogicOpc (zext X), C --> zext (LogicOpc X, C) ( [...] adds 956e075 X86InstrInfo: No need for liveness analysis in classifyLEAReg() adds 42a372e [OptDiag,LV] Add hotness attribute to applied-optimization remarks adds 20e7162 [OptDiag] Missed these when making the IR Value a const pointer adds fc02f97 IPRA: Fix RegMask calculation for alias registers adds 8fad356 Expose AttributeSetNode, use it to provide aggregate getter f [...] adds 83833ac Add missing import to fix the build adds 724a2ec [MergedLoadStoreMotion] Remove out of date comment adds 2839fb6 [GVNHoist] Don't wrongly preserve TBAA adds 00101d6 [GVNHoist] Preserve optimization hints which agree adds a999406 AMDGPU: Fix phis from blocks split due to register indexing adds e657dbc [docs] Update release docs adds 367e93b [GCOV] Remove a layer of indirection. adds a264c85 ExecutionDepsFix - Fix bug in clearance calculation adds 50e9ffb [AMDGPU] Some code cleaning in SIRegisterInfo.td adds b11b352 Rename StringMap::emplace_second to try_emplace. adds 1a324fd [DenseMap] Add a C++17-style try_emplace method. adds ffecbde [DemandedBits] Reduce number of duplicated DenseMap lookups. adds 50248af [X86][AVX] Added support for lowering to VBROADCASTF128/VBROA [...] adds d31d3eb [profdata] Remove constructor that MSVC 2013 pretends to not [...] adds 4f07d11 [X86][SSE] Pull out duplicate EXTRW lowering code. NFCI. adds cf72104 Fixed line endings adds 54eb8ad [X86][SSE] Allow folding of store/zext with PEXTRW of 0'th element adds 59e5ecf Weaken ThreadSafeRefCountedBase atomics. adds eeadb67 [AArch64] Load/store opt: Don't count transient instructions [...] adds 33649d7d AMDGPU/SI: Add support for R_AMDGPU_ABS32 adds 513679d [IRTranslator] Add G_AND opcode. adds 82910c8 [AMDGPU] Emit read-only data to .rodata for hsa adds b2e96ce Adding RELEASE_TESTERS.TXT adds ec559e1 [InstCombine] break up visitICmpInstWithInstAndIntCst(); NFCI adds 368a8a2 [IRTranslator] Add comments to explain the ordering of the sw [...] adds 92934fa [CMake][GlobalISel] Turn LLVM_BUILD_GLOBAL_ISEL into an option. NFC. adds b6237e4 [llvm-config][GlobalISel] Canonicalize LLVM_HAS_GLOBAL_ISEL o [...] adds 9abf24c [IRTranslator] Add G_SUB opcode. adds 12a672e Avoid a string copy, NFC adds 990df03 make InstCombine compare helper functions private; NFC adds 4227f92 Invariant start/end intrinsics overloaded for address space adds e50f54b [IndVars] Reflow oddly formatted condition; NFC adds d89a69b Revert "Invariant start/end intrinsics overloaded for address space" adds 2e6126a Transfer ownership of the XCore backend. adds 568aa32 [docs] Move GitHub to GitHubSubMod adds d1938d1 add vector tests and a simpler version of the negative tests adds 8dbdfe6 [PGO] Make needsComdatForCounter() available (NFC) adds d0a4a04 Normalize file docs. NFC. adds 09577f3 Fix the clang-cl self-host with VS 2013 headers adds 0414f48 [LV] Move vector int induction update to end of latch adds 4d4b609 [OptDiag,LDist] Convert remaining opt remarks to use the new API adds 32995b5 [InstSimplify] recognize trunc + icmp sgt/slt variants of sel [...] adds f517b9f [cmake] Move the including of utils/unittests under LLVM_INCL [...] adds 477502e [AArch64][Inline-Asm] Return the 32-bit floating point regist [...] adds 366a2ca [InstSimplify] don't crash handling a pointer or aggregate type adds 39008ac [X86] Do not use AND8ri8 in AVX512 pattern adds a2132ba [MIRTesting] Abort when failing to parse a function. adds 3a4fa31 [PM] Port NaryReassociate to the new PM adds f593e4d [lit] Bump version number. adds 5a06a46 [Profile] deprecate __llvm_profile_override_default_filename adds fe1bb06 [lit] Use full config path in diagnostics. adds 0eeda09 GVH-hoist: only clone GEPs (PR28606) adds 6aa68be [llvm-cov] Use relative paths to the stylesheet (for html reports) adds ff2ae48 [InstCombine] break up foldICmpEqualityWithConstant(); NFCI adds 4f9c571 [Sparc]: Fix bug in LowerSTORE due to r275592 adds 23553e9 [llvm-cov] Strengthen a test case adds 96c53f4 GVN-hoist: add missing check for all GEP operands available adds a8d06be [AArch64] Cleanup sign extend in genAlternativeCodeSequence adds 09d947a GVN-hoist: move check before mutating the IR adds 304682f [IRCE] Add an option to skip profitability checks adds b00a405 [IRCE] Don't misuse CHECK-LABEL; NFC adds cb5c574 Fix detection of stack-use-after scope for char arrays. adds 59023bf Avoid dsymutil calls to getFileNameByIndex. adds 632eb53 Fix r276380 for targets without REALPATH. adds 4e19f6e Sync up InstrProfData.inc with compiler-rt adds ffdd480 Revert 276386 adds 9fb35fc Sync up InstrProfData.inc with compiler-rt with fixes to references adds 1483472 Don't remove side effecting instructions due to ConstantFoldI [...] adds 71a0540 [AVX512] Update X86InstrInfo::foldMemoryOperandCustom to hand [...] adds 55cd727 [AVX512] Add load folding for some AVX512VL logic and arithme [...] adds 44eb5c2 [AVX512] Fix the ExeDomain for some packed fp instructions. adds f876acd [AVX512] Add initial support for the Execution Domain fixing [...] adds 22cd3ed [AVX512] Add ExeDomain to vector extend and truncate instructions. adds 389773f [mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS3 [...] adds 2a04c1e This refactoring of ARM machine block size computation create [...] adds bb5cae8 test commit adds 9b5c51d [llvm-cov] - Improve llvm-cov error message adds 964a86a Revert "[X86][AVX] Added support for lowering to VBROADCASTF1 [...] adds 3d6f513 [llvm-profdata] Bring back reading profile data from STDIN. adds d6931b1 [llvm-cov] - Add the coverage of lines in the summary report. adds e01551d [FastISel] Ignore @llvm.assume. adds 370589a [X86][AVX] Added support for lowering to VBROADCASTF128/VBROA [...] adds 12e1ff6 Use INT64_MAX instead of LLONG_MAX adds 262370b [Hexagon] Use loop data prefetch on Hexagon adds 6406b60 [pdb] Round-trip module & file info to/from YAML. adds 44bd3bd [pdb] Move file layout header structs to RawTypes.h adds 0998606 [RDF] Make the graph construction/use less expensive adds 7809543 [Support] Make ErrorAsOutParameter take an Error* rather than [...] adds 7528433 [Profile] Cleanup: remove unused interface adds 85f2423 [SelectionDAG] Optimization of BITREVERSE legalization for po [...] adds 04e7d3c GlobalISel: implement alloca instruction adds 7c8be6e AMDGPU: Don't reinvent transferSuccessorsAndUpdatePHIs adds 7488ab3 AMDGPU: Fix i1 fp_to_int adds c28b821 AMDGPU: Delete more dead code adds 30f0e3e AMDGPU: Add HSA dispatch id intrinsic adds 9da217e AMDGPU: Fix groupstaticsize for large LDS adds c5a5706 AMDGPU: Remove redundant test adds 6a2251e [Hexagon] Make HexagonCodeGen depend on Scalar adds 1085c3b [utils] Update coverage regression checking script adds 80ee170 Invariant start/end intrinsics overloaded for address space adds a6c7a03 [PM] Port BreakCriticalEdges to the new PM. adds 9493a84 [ThinLTO/gold] Support for getting list of included objects f [...] adds f9e61b6 add tests for vector bit manipulation intrinsics adds 0618303 Recommit - [DSE]Enhance shorthening MemIntrinsic based on Ove [...] adds 13bed94 [ThinLTO/gold] Remove thin archive part of new test due to bo [...] adds 1dc6ec2 [llvm-ar] Document 'T' thin archive modifier (NFC) adds 4ab13f5 [msf] Create LLVMDebugInfoMsf adds 9a3129a [pdb] Have builders share a single BumpPtrAllocator. adds 428d4aa Make PDBFile store an msf::Layout. adds ea26cb1 GlobalISel: implement legalization pass, with just one transf [...] adds c42c8e2 Make DebugInfoMsf a dependency of DebugInfoPDBTests. adds 86728a0 add tests for icmp vector folds adds aede87e Fix include case. NFC. adds e61393a update to use FileCheck and auto-generate checks adds c119b4e [SCEV] Extract out a helper function; NFC adds d12f372 [llvm-cov] Don't copy stylesheets into index files adds 2b421e1 Use RValue refs in APInt add/sub methods. adds 3b6613c Add invariant start call creation in IRBuilder.NFC adds b5911c2 add tests for icmp vector folds adds 759cf24 [Coverage] Mark more methods const (NFC) adds 2215e9b add tests for icmp vector folds adds 7416201 add tests for icmp vector folds adds e5b8fbc [SLPVectorizer] Vectorize reverse-order loads in horizontal r [...] adds 9909951 Add flag to PassManagerBuilder to disable GVN Hoist Pass. adds ecefac9 Unpoison stack before resume instruction adds 3921674 GlobalISel: allow multiple types on MachineInstrs. adds 6176c36 add tests for icmp vector folds adds 3dba903 [CFLAA] Add more offset-sensitivity tracking. adds 4758a25 [LoopDataPrefetch] Sort headers adds 5781107 [LoopDataPrefetch] Include hotness of region in opt remark adds 3f4fdc9 [LoopDataPrefetch] Fix unused variable in release build adds a6b9e20 Revert "[AMDGPU] Emit read-only data to .rodata for hsa" adds c9b262b auto-generate checks adds f03395d [InstCombine] move udiv+cmp fold over with other BinOp+cmp fo [...] adds d38e8e7 [SCEV] Change the interface of computeConstantDifference; NFC adds 18768c9 [cmake] Use a sane default for LLVM_PROFILE_DATA_DIR adds fa29211 [SCEV] Make isImpliedCondOperandsViaRanges smarter adds add1047 [LoopUnrollAnalyzer] Handle out of bounds accesses in visitLoad adds e48bbc4 [coroutines] Part 1 of N: Documentation adds 9486968 Avoid using a raw AssumptionCacheTracker in various inliner f [...] adds 52e0b0d [Profile] Use explicit flag to enable IR PGO adds 36cfd1c AMDGPU: Delete dead code adds a1f64c9 [X86] Fix switch statement indentation per coding standards. adds 0937f7e [X86] Make one of the FMA3 commuting methods static. Remove a [...] adds 6381dfd [AVX512] Implement commuting support for EVEX encoded FMA3 in [...] adds a73dfe8 Fix a GCC error due to this member name also being a type nam [...] adds 6928c3c [InstCombine] allow icmp (bit-manipulation-intrinsic(), C) fo [...] adds a0a5960 [X86][SSE] Regenerated uitofp <2 x i32> -> <2 x float> conver [...] adds 55a640e [X86][SSE] Added tests where we should be trying to widen a l [...] adds 391e1bc [X86] Fix typo in comment. adds 17fe024 CODE_OWNERS: Take ownership of the MIPS backend adds e88c598 Removes a warning about duplicate label named _strings from C [...] adds 570a51e Switching the highlighting from llvm to none in an attempt to [...] adds 5b9e6bf Change some more llvm highlighting instances to be text inste [...] adds ada7d32 [X86][SSE] Added more widened broadcast tests adds 9c7a6d9 [X86][SSE] Added float widened broadcast tests adds 946f2ae [MSSA] Remove useless assert. NFC. adds 21c0ab8 [MSSA] Make EXPENSIVE_CHECKS check more. adds ba55955 [Loop Vectorizer] Handling loops FP induction variables. adds 3a58acf [X86] Replace CodeGenOnly VPSRAVW/D/Q_Int instructions with p [...] adds f2a1f86 [X86] Make the FMA3 instruction names consistent between VEX [...] adds 5e00cf6 [X86][AVX512VL] Added AVX512VL half2float vector conversions [...] adds da2666e [X86][SSE] Regenerate SSE copysign tests adds 7fe63eb [X86][SSE] Regenerate shifts tests adds c3b4153 [X86] Regenerate shift by parts tests adds 9ca3a14 [X86] Add SHRD shift combine tests adds 69d888e [X86] Add 'FeatureSlowSHLD' to cpu 'bdver4' adds 6b81c4d [X86] Add shift double tests for PR14593 adds 5c5b255 [X86][SSE] Added PR27854 tests adds d5f5e9f [CommandLine] Use Process::GetEnv instead of _wgetenv adds b78624d Trailing whitespace. adds 6b25086 Untabify. adds 2d83d8a [Utils] Simplify combineMetadata adds 304ec47 [GVNHoist] Properly merge alignments when hoisting adds 664a7d8 [GVNHoist] Merge metadata on hoisted instructions less conser [...] adds 3d0336e [InstSimplify] Fold trunc([zs]ext(%V)) -> %V adds 4cd3494 Fix : Partial Inliner requires AssumptionCacheTracker adds 9728cbe Cleanup : Reformat PartialInliner.cpp to have current LLVM st [...] adds 4631a8f [AVX512] Cleanup FMA operand order in patterns to match the V [...] adds f7a9781 [AVX512] Add some additional patterns so that we can fold bro [...] adds 70e4702 [AVX512] Add load folding support for the unmasked forms of t [...] adds 161eae5 [ARM] Enable ISel of SMMLS for ARM and Thumb2 adds bd88ec1 [ARM] Small refactor of Thumb2 SMLA insts adds 7c2e5df [mips] Optimize materialization of i64 constants adds d23d98f [ARM] Improve longMAC codegen test adds 94d4517 [Hexagon] Add target feature to generate long calls adds feca1db Remove useless pass from the pipeline in test/Analysis/Domina [...] adds 2dc29c8 AVX-512: Fixed [US]INT_TO_FP selection for i1 vectors. It fai [...] adds 04a8697 StringSwitch cannot be copied or moved. adds 8a39975 MC] Provide an MCTargetOptions to implementors of MCAsmBacken [...] adds 480806f NFC: Refactor GVNHoist class so not everything is public adds 9ad9fd4 Fix N^2 instruction ordering comparisons in GVNHoist. This fi [...] adds c0eeb4b Revert "StringSwitch cannot be copied or moved." adds d1e02cb NFC: Make a few asserts in GVNHoist do the same thing, but cheaper. adds 3757ea8 [X86][SSE] Added 2048-bit vector comparison tests adds 7e6a258 cmake: When adding lit testsuites, ignore Output directories adds 875b0da Don't use iplist in SymbolRewriter. NFC. adds 731237c Add a modulemap for LLVMDebugInfoMsf. adds 5b3d02d Revert NewGVN N^2 behavior patch adds 569213a StringSwitch cannot be copied (take 2). adds 8969e2c Attempt to pacify windows bots. adds 568d841 [PGO] Fix profile mismatch in COMDAT function with pre-inliner adds 5895e79 AMDGPU: Delete dead code adds 4791de8 Fix invalid iterator use in safestack coloring. adds 065de94 MachineVerifier: Fix printing nonsense for physical registers adds 6724293 LiveIntervals: Return index from replaceMachineInstrInMaps adds 9b4a967 AMDGPU: Fix missing verify-machineinstrs in control flow test adds 21e0aa8 AMDGPU: Make skip threshold an option adds dc848c2 Scalarizer: Support scalarizing intrinsics adds 4a44da0 AMDGPU: Remove read_workdim intrinsic adds cb3d8af Fix r276671 to not use a defaulted move constructor. adds dc02554 Next step along the way to getting good error messages for ba [...] adds b339184 [PM] Port SymbolRewriter to the new PM adds dad4827 GlobalISel[AArch64]: support pointer types in argument lowering. adds 967b508 GlobalISel: add generic casts to IRTranslator adds fcc0edc [X86] Regenerate i64 shift legalization tests adds adc4490 [X86] Regenerate v2i256 shift legalization tests adds 795e327 [WebAssembly] Update for Target API (TargetRegistry::Register [...] adds 66e75f3 [InstSimplify] Add support for bitcasts adds f6fdf20 Revert "[InstSimplify] Add support for bitcasts" adds c5c6574 [ARM] Saturation instructions are DSP-only adds efd299c Attempt to pacify windows bots, again. adds 4aaf0b6 [lit] Don't match tool names within new PM's <> markers adds 6f3aeb5 [CMake] Support feeding DYLD_LIBRARY_PATH into archiver calls adds 6f1298e [safestack] Fix stack guard live range. adds 4df990e GVN-hoist: limit hoisting depth (PR28670) adds 2970c22 GVN-hoist: use a DFS numbering of instructions (PR28670) adds a6b4cd4 [CMake] Updating Xcode Toolchain creation to support Xcode 7 adds 6ba6032 GlobalISel: remove redundant ';'s. NFC adds bb936d2 LiveIntervalAnalysis: Fix handleMoveDown() problem adds 7f21dd5 Propery format doccomment in lto.h . NFC adds e37fa0b Reapply: [InstSimplify] Add support for bitcasts" adds b98adc8 Remove obsolete XFAIL for a test that used to sometimes misco [...] adds 70baa1d [AVX512] Don't mark ADDSSZr_Int or MULSSZr_Int as commutable. [...] adds 2e40e16 [X86] Remove isCommutable=1 from instructions that also load. [...] adds 38a44a8 [mips] sgtu, s[rl]l, sra, dnegu, neg instruction aliases adds ae09a87 [tblgen] Compare const char * with strcmp instead of creating [...] adds 2b0c195 Fixed spelling in comment adds edf7e07 [mips] MIPS64R6 compact branch support adds 9c00fcc [X86][SSE] Fixed issue with memory folding of (v)cvtsd2ss intrinsics adds 2396770 [X86][SSE] Added extra memory folding tests for cvtsd2ss intrinsic adds 26a5022 [lit] Document the 'available_features' member of the config object. adds b8014e1 [ARM] Implement -mimplicit-it assembler option adds 7263e3e [ARM] Improve error messages for .arch_extension directive adds c4320ab [Hexagon] Update store offset when not packetizing it with al [...] adds 4768f3d [mips] Fix typos in spelling of lowerRETURNADDR. adds 1123323 GlobalISel: give MachineInstrBuilder a uniform interface. NFC. adds 27d9a7f GlobalISel: add specialized buildCopy function to MachineInst [...] adds ee4cdb7 AMDGPU: Add fp legacy instruction intrinsics adds cc67a0a AMDGPU: Add missing tests for xnack option for HSA adds d506595 AMDGPU: Make AMDGPUMachineFunction fields private adds 04defbc Re-committing r275284: add support to inline __builtin_mempcpy adds d96170e GlobalISel: omit braces on MachineInstr types when there's only one. adds b450d54 [Hexagon] Add support for proper handling of H and L constraints adds c48a054 GlobalISel: add correct operand type to G_FRAME_INDEX instrs. adds 0f30994 [LoopUtils] Sort headers adds 5d321c1 [InstSimplify] Cast folding can be made more generic adds 98a069f [CMAKE] Find ld64 using xcrun adds e20e4c1 [MC] Don't crash when trying to emit a relocation against .bss. adds 7fdf5b1 MIRParser: Use shorter cfi identifiers adds 2b8ecef Fix NVPTX/call-with-alloca-buffer.ll after r276777. adds 17a4225 [Hexagon] Bitwise operations for insert/extract word not simplified adds f39cea0 Add link to the Hexagon documentation adds aa3e2e6 [Hexagon] Rerun bit tracker on new instructions in RIE adds a628d04 [Hexagon] Gracefully handle reg class mismatch in HexagonLoop [...] adds 50e5cbc [X86] Split out absdiff detection from SAD combine. NFC. adds 2deff15 GlobalISel: add generic load and store instructions. adds 43492b2 [Hexagon] Post-increment loads/stores enhancements adds 7aeb3e4 AMDGPU: Minor AsmPrinter cleanups adds 252b5eb AMDGPU/R600: Remove dead custom inserters adds 315f732 Fix docs/Coroutines.rst syntax highlighting on Linux adds f57cf2f [llvm-cov] Add support for exporting coverage data to JSON adds ad0f5f6 MIRParser: Use dot instead of colon to mark subregisters adds 63d80be Revert "[llvm-cov] Add support for exporting coverage data to JSON" adds aaba6ed docs: Add reference to type metadata to langref. adds 53397d1 Retry: [llvm-cov] Add support for exporting coverage data to JSON adds 8cbfb09 AMDGPU: Use implicit_def for selecting anyext adds c1cc7ba9 [docs] Fix a sphinx error in llvm-cov.rst adds c43677a AMDGPU: Add more tests for LDS size with occupancy adds df483ab Revert r276136 "Use ValueOffsetPair to enhance value reuse du [...] adds f799c70 AMDGPU: Use rcp for fdiv 1, x with fpmath metadata adds e60e6f6 Reverting r276771 due to MSan failures. adds 00429d5 [ConstantFolding] Correctly handle failures in ConstantFoldCo [...] adds 064517f [llvm-go] parameterize $GOPATH construction adds a49a3e1 Move assert as early as possible adds c380ddf [llvm-cov] Escape '' in strings when emitting JSON adds 5960086 refactor code in verifyLoop: NFC. adds fde7c9d add function isLoopLatch adds 906c5ef add a verbose mode to Loop->print() to print all the basic bl [...] adds af5d051 [coroutines] Part 2 of N: Adding Coroutine Intrinsics adds c58cbcd GVN-hoist: use DFS numbers instead of walking the instruction stream adds 7c4932c GVN-hoist: improve code generation for recursive GEPs adds 8a6d1ad [MC] Add command-line option to choose the max nest level in [...] adds c53e16c Fix Coroutines doc example adds 7963f42 [GVNHoist] Fix typo in assert. adds 9968808 Refactor - CodeExtractor : Move check for valid block to stat [...] adds 23ce797 [MBP] Added some more debug messages and some clean ups /NFC adds af18ad3 [mips] Update the link to the MIPS documentation in CompilerW [...] adds 18e7325 Removed unusued template function declaration that has no def [...] adds 36a9d65 [DAGCombiner] Use APInt directly to detect out of range shift [...] adds 1a61c31 Adjust Registry interface to not require plugins to export a [...] adds 5682750 Revert r276856 "Adjust Registry interface to not require plug [...] adds f689bed [ARM] Adds test for immediate encoding adds b9c61f0 [ARM] Set a non-conflicting comment character for assembly in [...] adds 8b87628 [test/gold] Add gold test subdirectory tests needing v1.12 (o [...] adds f5be002 PowerPC: Avoid implicit iterator conversions, NFC adds d7d539d [PowerPC] Fix typo in PPCHazardRecognizers.cpp adds 1f35f2f [mips][ias] Check '$rs = $rd' constraints when both registers [...] adds 60367c5 GlobalISel: remove variable_ops from output list. adds 8968942 [AArch64] Define AArch64RegisterInfo as a class, not a struct. NFC. adds cd0d4b0 [AArch64] Mark various *Info classes as 'final'. NFC. adds f15a020 [GlobalISel] Introduce an instruction selector. adds a772715 [ARM] Check that the thumb COFF segment flag gets set on thum [...] adds 5a1c38a Typo fix. NFC adds 30428b1 [X86][SSE] Updated test so that both are applying the post-multiply adds 12e910f Remove MCAsmInfo.h include from TargetOptions.h adds 41bc5c2 Make bugpoint transform conditional jumps into unconditional jumps. adds f2ff85c [Hexagon] Add saved callee-saved registers as live-in in non- [...] adds 3655e65 [DSE] Fix bug in updating MadeChange flag adds 27b2476 [MC][X86] Fix Intel Operand assembly parsing for .set ids adds 331274d GlobalISel: support zero-sized allocas adds 67e13d6 Revert EH-specific checks in BranchFolding that were causing [...] adds cfc6fb4 XCore: Avoid implicit iterator conversions, NFC adds aa32a0d Fix the build for libstdc++ 4.7 adds fe912bf CodeGen: Make iterator-to-pointer conversion explicit, NFC adds 81494d6 [Hexagon] Handle extended versions of restore routines adds 2be4b41 Initialize PreserveAsmComments in MCTargetOptions adds afafefe [llvm-cov] Minor aesthetic improvements for html reports adds 627477d Revert "[llvm-cov] Minor aesthetic improvements for html reports" adds 3fcba98 Codegen: IfConversion: add const qualifier. NFC adds efe4c05 Codegen: IfConversion: Factor out a function to count dup instrs. adds 549ec08 test commit adds da34deb build_llvm_package.bat: try tests three times adds 6d5ee09 [Hexagon] Do not optimize volatile stack spill slots adds 47fb865 [Hexagon] Add option to bisect spill slot optimization adds 3e611f8 [X86] Factor out another piece of the SAD combine. NFCI. adds ca740c1 [Hexagon] Find speculative loop preheader in hardware loop ge [...] adds d4f04da [LSV] Don't assume that bitcast ops are Instructions. adds e201775 [llvm-cov] Add a debug mode for source range highlighting (in html) adds b3f897d [LVI] Use DenseMap::find_as in LazyValueInfo. adds 741862c [LSV] Use Instruction*s rather than Value*s where possible. adds aa6ca74 [CFLAA] Add getModRefBehavior to CFLAnders. adds 79e7020 Add verifyAnalysis for LCSSA. adds 6d9563a Don't invoke getName() from Function::isIntrinsic(). adds 8d876fc Fix the assertion error in collectLoopUniforms caused by empt [...] adds b5a809e AMDGPU: Remove analyzeImmediate adds 96ddf54 AMDGPU: Turn dead checks into asserts adds 20c394c [InstCombine] Handle failures from ConstantFoldConstantExpression adds 22e3ed1 Add EP_CGSCCOptimizerLate extension point to PassManagerBuilder adds 556fada [CodeView] Don't crash on functions without subprograms adds b87ab2e Add unittests to {ARM | AArch64}TargetParser. adds fd8b386 [ConstantFolding] Don't bail on folding if ConstantFoldConsta [...] adds 35df7fd R276957 broke bot clang-ppc64be-linux-multistage,try to fix it. adds 0bab80e fix some typos in the doc adds edcbf6e Remove two tests added in r276957. adds 2b43353 [modules] Add missing includes. adds b18ca96 AMDGPU: add execfix flag to SI_ELSE adds b1bee51 Reapply r276856 "Adjust Registry interface to not require plu [...] adds 3fa868e Fix signed/unsigned warning. adds 0e9859b Removed unused variables adds 04cc0ad AMDGPU/SI: Don't use reserved VGPRs for SGPR spilling adds 5604769 [mips][fastisel] Handle 0-4 arguments without SelectionDAG. adds e49e334 [mips] Reword debug message as should have been done before c [...] adds 1314c16 [X86] Remove CustomInserter for FMA3 instructions. Looks like [...] adds d1a7ed8 Revert r276982 and r276984: [mips][fastisel] Handle 0-4 argum [...] adds b27edd5 [mips] Fix a warning that occurs on some gcc 4.9.2's but not [...] adds 7b78e6e TargetInstrInfo: rename GetInstSizeInBytes to getInstSizeInBy [...] adds ee8c4ca AMDGPU : Add intrinsics for compare with the full wavefront result adds d59b26e [AArch64][GlobalISel] Remove 'alignment' from MIR tests. NFC. adds e27b94c [GlobalISel] Remove types on selected insts instead of using LLT(). adds 8686feb [AArch64][GlobalISel] Select GPR G_AND. adds 70d6529 [AArch64][GlobalISel] Select GPR G_SUB. adds e4fd36e [MIRParser] Accept unsized generic instructions. adds e2c6755 [AArch64][GlobalISel] Select G_BR. adds a0fb2b6 Revert r276973 "Adjust Registry interface to not require plug [...] adds c39e246 Fix dangling reference to temporary in use of ArrayRef adds f79c57a MachineFunction: Return reference for getFrameInfo(); NFC adds 0c78d1d Get rid of IMsfStreamData class. adds 0c7a213 [pdb] Refactor library to more clearly separate reading/writing adds 18fcd7f [Hexagon] Insert CFI instructions before throwing calls adds a5c0a14 [pdb] Fix some warnings that break -Werror builds. adds 1749ba1 [pdb] Fix an ambiguity when writing size_t on x64 platforms. adds a88b440 [pdb] Fix another narrowing conversion on x64 builds. adds a07e32d Fix DbgValue handling in SelectionDAG. adds 5559171 [Hexagon] Implement MI-level constant propagation adds 681961f Missed updating a GlobalISel bit in my last commit adds 1c394fc Fix build breaks after r277028 adds 1bd1f14 [docs] Add sub-mod example by Chris to GitHub proposal adds 8801905 [coroutines] Part 3 of N: Adding Boilerplate for Coroutine Passes adds 69388b7 Try to passify the builders adds 41856d9 Really try to pacify the build bots :/ adds 9d612c3 Remove TargetBaseAlign. Keep alignment for stack adjustments. adds 1ba8ec6 Revert r277038 until clearing why tests fail. adds 912dfc3 Fix some sign compare warnings breaking the -Werror build adds 093715a [PM] Port LowerGuardIntrinsic to the new PM. adds ad0220c Rework CFG simplification in bugpoint adds e0d8738 range adds 1e88bca maned adds bbc7125 Do not remove empty lifetime.start/lifetime.end ranges adds 34ad8f0 [asan] Add const into few methods adds 3ec908d Should be committed as one CL. adds 2328afe Do not remove empty lifetime.start/lifetime.end ranges adds 539fec5 AMDGPU/SI: Don't handle a loop if there is no loop at all for [...] adds b17a45c [BPI] Add new LazyBPI analysis adds 1c20b71 [IR] Introduce a non-integral pointer type adds b57cbbd [sanitizer] Simplify and future-proof maybeMarkSanitizerLibra [...] adds 24dbd38 Revert "Don't invoke getName() from Function::isIntrinsic()." [...] adds d7e3771 Added ThinLTO inlining statistics adds 81266f6 Fixed comment adds 88a5c80 Capture stderr when checking for gold version adds ec9f7e3 Add LLVM_ENABLE_LLD option to use LLD as C/C++ linker. adds 450453a [CFLAA] Check for pointer types in more places. adds c6c1814 [AVX512] Remove the intrinsic forms of VMOVSS/VMOVSD. We don' [...] adds e43ff14 [ConstnatFolding] Teach the folder how to fold ConstantVector adds 8065d77 [ConstantFolding] Use ConstantExpr::getWithOperands adds 6b87ada [ConstantFolding] Remove an unused ConstantFoldInstOperands overload adds b9bd76d [ConstantFolding] Fold bitcasts of vectors w/ undef elements adds b9ddc3d [EarlyCSE] Correctly handle simplified, but live, instructions adds 9e64e8e [AVX512] Add AVX512 run lines to some tests for scalar fma/ad [...] adds 8e82677 [AVX512] Copy the patterns that recognize scalar arimetic ope [...] adds f7938da [AVX512] Mark EVEX VMOVSSrm and VMOVSDrm as canFoldAsLoad and [...] adds c464798 TargetInstrInfo: add virtual function getInstSizeInBytes adds 3b7839b [lanai] Update for Target API (TargetRegistry::RegisterMCAsmB [...] adds 322f342 [Thumb] Emit Thumb move in both Thumb modes for struct_byval [...] adds 7d72920 Fix for commit rL277126 that broke a build. adds bf172ec Fixed MSVC out of range shift warning adds e6abaac [X86][SSE] Optimize the truncation of vector comparison resul [...] adds 5b79590 Cleanup TransferDbgValues adds e2a16fd Re-commit: [mips][fastisel] Handle 0-4 arguments without Sele [...] adds 4f328be [Hexagon] Implement DFA based hazard recognizer adds 6b032c6 Add missing files to r277143 adds ee2728b Fix license information in the file header adds 9167c0e [MC] When emitting output hash comments always use standard l [...] adds af3f28b Avoid unnecessary 32-bit to 64-bit zero extensions following [...] adds 2710958 Fix inline-comment-2.ll triple adds 1f44345 [Hexagon] Improve balancing of address calculation adds a517bf8 Remove inline-comment-2.ll until I can debug why it fails on [...] adds f6b677f Reinstate optnone test for GVN Hoisting, removed in r276479. adds 1147bf6 [GlobalISel] Add unittests for LowLevelType. adds ade60aa [GlobalISel] Fix LLT::unsized to match LLT(LabelTy). adds eda1b46 [GlobalISel] Add LLT::operator!=(). adds 8ad8fd6 [GlobalISel] Auto-brief LowLevelType. NFC. adds bbbcccb Initial support for vectorization using svml (short vector ma [...] adds a6ad276 [Hexagon] Custom lower VECTOR_SHUFFLE and EXTRACT_SUBVECTOR for HVX adds c1359c9 MachinePipeliner pass that implements Swing Modulo Scheduling adds c9b195c [GlobalISel] Add LLT raw_ostream operator<< overload. adds 8d4e8d2 [AArch64][GlobalISel] Select G_LOAD/G_STORE. adds d8a8826 [GlobalISel] Add G_XOR. adds a4174a2 [AArch64][GlobalISel] Select G_XOR. adds 0c332fd CodeGen: improve MachineInstrBuilder & MachineIRBuilder interface adds 2a71517 The next step along the way to getting good error messages fo [...] adds 36b1b46 [Hexagon] Misaligned loads and stores are not fast adds 227b764 Revert r277178, the actual change had already been applied adds 83fd8fe [Hexagon] Testcase for not merging stores into a misaligned store adds 57c3cc8 GlobalISel: add generic conditional branch. adds 02e5963 Tests: Add branch weights to non-layout tests. adds 9f1f15e Codegen: MachineBlockPlacement Improve probability layout. adds bbdb447 GlobalISel: make translate* functions take the most specializ [...] adds 2f75f99 Recommitting r275284: add support to inline __builtin_mempcpy adds 4d1557f [msf] Rename Msf to MSF. adds cc8a2a6 Fixing broken MSVS builds adds 85c3e3e Revert "[msf] Rename Msf to MSF." adds 72b444d Fixed MSVC out of range shift warning adds b2cc749 Remove the test/tools/llvm-objdump/malformed-archives.test fo [...] adds 7e8508b [ConstantFolding] Handle bitcasts of undef fp vector elements adds 2695301 Fixed (incorrectly firing) MSVC unused variable warning adds ee3cf6f Fixed line endings adds 422520d [GlobalISel] Add missing link components to r277160 unittest. NFC. adds c4f6d8c [LoopUnroll] Include hotness of region in opt remark adds e66318d Add a REQUIRES: assert on a Lanai test that uses a -debug-only flag adds 9c9955b CodeGen: add new "intrinsic" MachineOperand kind. adds 5e11785 [msf] Resubmit "Rename Msf -> MSF". adds 6b00b5f [X86][AVX] Fix VBROADCASTF128 selection bug (PR28770) adds a8209f7 pdbdump: Dump Free Page Map contents. adds 9d2d439 [Hexagon] Fix test that uses -debug-only to require asserts. adds 53c51fa [X86] Match PSADBW in straight-line code adds 33bf01e [Hexagon] Referencify MachineInstr in HexagonInstrInfo, NFC adds ebd8336 Think this will fix issues with the error messages generated [...] adds 0f15518 GlobalISel: support translation of intrinsic calls. adds d6e3a65 GlobalISel: translate "unreachable" (into nothing) adds 17beea7 [Support] Add storage specifier for MachO::NListType. adds 7420263 DAG: avoid duplicated truncating for sign extended operand adds a66064f Remove empty DebugInfo/Msf dirs. It seems these were left ove [...] adds e36db68 [Orc] Add support for updating stub targets to CompileOnDemandLayer. adds 2ce8293 AMDGPU: Remove unused pattern adds 40d057e AMDGPU: Set s_setpc_b64 as a terminator adds 4fd45eb AMDGPU: Fix shouldConvertConstantLoadToIntImm behavior adds 7ed559c [AMDGPU] Fix lifetime of SmallVector temporaries. adds e4a63cb [X86] Fix lifetime of SMRange temporaries. adds 4b6011e Update modulemap for Msf -> MSF rename. adds 90978a6 [Hexagon] Perform bit arithmetic on unsigned to avoid acciden [...] adds f84abb4 MathExtras.h: add LLVM_CONSTEXPR where simple adds b80ca86 TrailingObjects::FixedSizeStorage constexpr fixes + tests adds 7ee24bd [X86][SSE] Let 64-bit targets use the fast 2i32-2f32 UINT_TO_ [...] adds 852791a [X86][X87] Add vector arithmetic tests for targets with sse disabled adds 15bce78 [X86][AVX] Added signum example test functions from PR13248 adds efee4ec [SLPVectorizer][X86] Added SITOFP/UITOFP vectorization tests adds cf26c4f [X86][SSE] Regenerate vshift tests adds ffbeb40 [X86] Use peekThroughOneUseBitcasts helper function adds 3575d76 Strip trailing whitespace adds 8a08e7b [SLPVectorizer][X86] Added vXi8/vXi16 sitofp/uitofp tests adds ab4a20c [Support] Add doxygen @code tags to example code in Error comments. adds f796352 [ARMConstantIslandPass] Remove dead code. adds b976678 [HexagonBitSimplify] Remove dead code. adds 48f202f [HexagonConstPropagation] Remove dead code. adds d9a7752 [ADT] Add 'consume_front' and 'consume_back' methods to Strin [...] adds d71fdd1 AVX-512: Removed AssertZext node before TRUNCATE Removed Asse [...] adds 67b0099 Fixed "copy-paste" mistake from revision 255245. adds 0ffabf1 [X86] Add tests for the lowering SHLD/SHRD from manual patterns adds ed98854 [AVX-512] Don't let ExeDependencyFix pass convert VPANDD/Q to [...] adds ba6e43d [X86] Add tests for the lowering SHLD/SHRD from manual patter [...] adds 5494cee [bugpoint] Add a -Os option adds e2fac43 [COFF] Remove a duplicate import_directory_table_entry definition adds 081d3f1 [COFF] Expose iterators for ImportAddressTableRVA adds bc139df [X86] Improve 64-bit shifts on 32-bit targets (PR14593) adds 7882ecb [AVX512] Add X86::VR512RegClassID to X86RegisterInfo::getLarg [...] adds b08f1f3 [AVX512] Stop treating VR512 specially in getLoadStoreRegOpco [...] adds 64e2873 [AVX512] Move FR32X/FR64X handling in getLoadStoreRegOpcode i [...] adds f015e11 [AVX512] Add VLX packed move instructions to the execution de [...] adds 4022678 [AVX512] Always use EVEX encodings for 128/256-bit move instr [...] adds d29f9a0 [X86] Simplify code for determing GR or FR reg classes by que [...] adds 9ee47fc Comment fixes to MemorySSA.h adds cdbca76 Fix the MemorySSA updating API to enable people to create mem [...] adds 7059fca [X86][SSE] Regenerate fpext tests adds 91f112f [X86][SSE] Regenerate frem tests adds 0f7cbe1 CodeExtractor : Add ability to preserve profile data. adds 837f6c0 Add the tests for r277313 adds 980a4b4 Fix - CodeExtractor : Inherit Target Dependent Attributes fro [...] adds fa714f9 Move this test to x86-specific directory. adds 04c0c68 Revert r277313 and r277314. adds 8b3212e [X86] Move mask register handling into the main switch of get [...] adds e0f68ac [AVX-512] Use FR32X/FR64X/VR128X/VR256X register classes in a [...] adds b9a7f22 [AVX512] Replace scalar fp arithmetic intrinsics with native [...] adds 87efa54 [AVX-512] Teach X86InstrInfo::getLargestLegalSuperClass to in [...] adds 5bfb1b8 [AArch64] Register passes so they can be run by llc adds 5c02c44 [mips] Clang generates unaligned offset for MSA instruction s [...] new fff778a Updating branches/google/testing to r277323

The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: CMakeLists.txt | 46 +- CODE_OWNERS.TXT | 16 +- RELEASE_TESTERS.TXT | 57 + cmake/config-ix.cmake | 16 +- cmake/modules/AddLLVM.cmake | 10 +- cmake/modules/HandleLLVMOptions.cmake | 12 +- docs/AMDGPUUsage.rst | 2 +- docs/BitCodeFormat.rst | 4 +- docs/BranchWeightMetadata.rst | 6 +- docs/CMakePrimer.rst | 8 +- docs/CodeGenerator.rst | 6 +- docs/CommandGuide/FileCheck.rst | 8 +- docs/CommandGuide/bugpoint.rst | 8 + docs/CommandGuide/lit.rst | 3 + docs/CommandGuide/llvm-cov.rst | 41 + docs/CommandGuide/llvm-nm.rst | 4 +- docs/CommandGuide/llvm-profdata.rst | 5 + docs/CommandGuide/opt.rst | 12 +- docs/CompilerWriterInfo.rst | 7 +- docs/Coroutines.rst | 1214 ++++ docs/CoverageMappingFormat.rst | 2 +- docs/DeveloperPolicy.rst | 3 +- docs/ExceptionHandling.rst | 8 +- docs/Extensions.rst | 2 +- docs/FAQ.rst | 2 +- docs/GarbageCollection.rst | 2 +- docs/GetElementPtr.rst | 10 +- docs/HowToReleaseLLVM.rst | 245 +- docs/HowToUseInstrMappings.rst | 8 +- docs/InAlloca.rst | 2 +- docs/LangRef.rst | 162 +- docs/MIRLangRef.rst | 42 +- docs/MarkedUpDisassembly.rst | 2 +- docs/MergeFunctions.rst | 6 +- docs/NVPTXUsage.rst | 2 +- docs/Proposals/GitHubSubMod.rst | 273 + docs/ReleaseNotes.rst | 96 +- docs/SegmentedStacks.rst | 2 +- docs/SourceLevelDebugging.rst | 10 +- docs/Statepoints.rst | 12 +- docs/TableGen/BackEnds.rst | 9 +- docs/TableGen/LangIntro.rst | 28 +- docs/TableGen/index.rst | 10 +- docs/WritingAnLLVMBackend.rst | 62 +- docs/WritingAnLLVMPass.rst | 2 +- docs/conf.py | 4 +- docs/index.rst | 23 + docs/tutorial/BuildingAJIT3.rst | 149 +- .../BuildingAJIT/Chapter3/KaleidoscopeJIT.h | 7 +- .../BuildingAJIT/Chapter4/KaleidoscopeJIT.h | 11 +- .../BuildingAJIT/Chapter5/KaleidoscopeJIT.h | 13 +- include/llvm-c/Core.h | 6 + include/llvm-c/lto.h | 8 +- include/llvm/ADT/APInt.h | 83 +- include/llvm/ADT/ArrayRef.h | 8 + include/llvm/ADT/DenseMap.h | 72 +- include/llvm/ADT/IntrusiveRefCntPtr.h | 4 +- include/llvm/ADT/StringMap.h | 8 +- include/llvm/ADT/StringRef.h | 34 + include/llvm/ADT/StringSwitch.h | 15 + include/llvm/ADT/Triple.h | 6 +- include/llvm/ADT/ilist.h | 6 +- include/llvm/Analysis/BranchProbabilityInfo.h | 21 + include/llvm/Analysis/CFLAndersAliasAnalysis.h | 83 +- include/llvm/Analysis/ConstantFolding.h | 24 +- include/llvm/Analysis/IVUsers.h | 56 +- include/llvm/Analysis/InlineCost.h | 16 +- include/llvm/Analysis/InstructionSimplify.h | 119 +- include/llvm/Analysis/LazyBlockFrequencyInfo.h | 13 +- include/llvm/Analysis/LazyBranchProbabilityInfo.h | 109 + include/llvm/Analysis/LoopAccessAnalysis.h | 8 +- include/llvm/Analysis/LoopInfo.h | 22 +- include/llvm/Analysis/LoopInfoImpl.h | 58 +- include/llvm/Analysis/OptimizationDiagnosticInfo.h | 189 + include/llvm/Analysis/RegionInfo.h | 9 +- include/llvm/Analysis/RegionInfoImpl.h | 187 +- include/llvm/Analysis/ScalarEvolution.h | 12 +- include/llvm/Analysis/TargetFolder.h | 5 +- include/llvm/Analysis/TargetLibraryInfo.def | 3 + include/llvm/Analysis/TargetLibraryInfo.h | 7 +- include/llvm/Analysis/TargetTransformInfoImpl.h | 9 + include/llvm/Bitcode/ReaderWriter.h | 7 +- include/llvm/CodeGen/CallingConvLower.h | 2 +- include/llvm/CodeGen/GlobalISel/GISelAccessor.h | 8 + include/llvm/CodeGen/GlobalISel/IRTranslator.h | 37 +- .../llvm/CodeGen/GlobalISel/InstructionSelect.h | 39 + .../llvm/CodeGen/GlobalISel/InstructionSelector.h | 63 + include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h | 133 +- .../CodeGen/GlobalISel/MachineLegalizeHelper.h | 92 + .../llvm/CodeGen/GlobalISel/MachineLegalizePass.h | 50 + include/llvm/CodeGen/GlobalISel/MachineLegalizer.h | 146 + include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h | 53 +- include/llvm/CodeGen/LiveIntervalAnalysis.h | 4 +- include/llvm/CodeGen/LowLevelType.h | 206 + include/llvm/CodeGen/MachineFunction.h | 9 +- include/llvm/CodeGen/MachineInstr.h | 14 +- include/llvm/CodeGen/MachineInstrBuilder.h | 20 + include/llvm/CodeGen/MachineInstrBundleIterator.h | 4 +- include/llvm/CodeGen/MachineModuleInfo.h | 2 - include/llvm/CodeGen/MachineOperand.h | 25 +- include/llvm/CodeGen/MachineRegisterInfo.h | 4 + include/llvm/CodeGen/Passes.h | 3 + include/llvm/CodeGen/RegisterScavenging.h | 28 +- include/llvm/CodeGen/ScheduleDAGInstrs.h | 2 +- include/llvm/CodeGen/SelectionDAG.h | 42 +- include/llvm/CodeGen/SlotIndexes.h | 8 +- include/llvm/CodeGen/TailDuplicator.h | 2 + include/llvm/CodeGen/TargetPassConfig.h | 18 + include/llvm/Config/config.h.cmake | 2 + include/llvm/DebugInfo/CodeView/ByteStream.h | 58 - include/llvm/DebugInfo/CodeView/CVRecord.h | 15 +- include/llvm/DebugInfo/CodeView/CodeViewOStream.h | 39 - include/llvm/DebugInfo/CodeView/ModuleSubstream.h | 30 +- .../DebugInfo/CodeView/ModuleSubstreamVisitor.h | 102 +- include/llvm/DebugInfo/CodeView/StreamArray.h | 271 - include/llvm/DebugInfo/CodeView/StreamInterface.h | 55 - include/llvm/DebugInfo/CodeView/StreamReader.h | 111 - include/llvm/DebugInfo/CodeView/StreamRef.h | 104 - include/llvm/DebugInfo/CodeView/StreamWriter.h | 86 - include/llvm/DebugInfo/CodeView/SymbolRecord.h | 11 +- include/llvm/DebugInfo/CodeView/TypeRecord.h | 2 +- include/llvm/DebugInfo/DWARF/DWARFDebugLine.h | 2 + include/llvm/DebugInfo/MSF/ByteStream.h | 160 + include/llvm/DebugInfo/MSF/IMSFFile.h | 44 + include/llvm/DebugInfo/MSF/MSFBuilder.h | 140 + include/llvm/DebugInfo/MSF/MSFCommon.h | 91 + include/llvm/DebugInfo/MSF/MSFError.h | 47 + include/llvm/DebugInfo/MSF/MSFStreamLayout.h | 35 + include/llvm/DebugInfo/MSF/MappedBlockStream.h | 139 + include/llvm/DebugInfo/MSF/StreamArray.h | 277 + include/llvm/DebugInfo/MSF/StreamInterface.h | 53 + include/llvm/DebugInfo/MSF/StreamReader.h | 110 + include/llvm/DebugInfo/MSF/StreamRef.h | 130 + include/llvm/DebugInfo/MSF/StreamWriter.h | 85 + include/llvm/DebugInfo/PDB/PDBTypes.h | 10 +- include/llvm/DebugInfo/PDB/Raw/DbiStream.h | 79 +- include/llvm/DebugInfo/PDB/Raw/DbiStreamBuilder.h | 44 +- .../llvm/DebugInfo/PDB/Raw/DirectoryStreamData.h | 37 - include/llvm/DebugInfo/PDB/Raw/IPDBFile.h | 44 - include/llvm/DebugInfo/PDB/Raw/IPDBStreamData.h | 38 - include/llvm/DebugInfo/PDB/Raw/IndexedStreamData.h | 34 - include/llvm/DebugInfo/PDB/Raw/InfoStream.h | 14 +- include/llvm/DebugInfo/PDB/Raw/InfoStreamBuilder.h | 30 +- include/llvm/DebugInfo/PDB/Raw/MappedBlockStream.h | 68 - include/llvm/DebugInfo/PDB/Raw/ModInfo.h | 19 +- include/llvm/DebugInfo/PDB/Raw/ModStream.h | 17 +- include/llvm/DebugInfo/PDB/Raw/NameHashTable.h | 14 +- include/llvm/DebugInfo/PDB/Raw/NameMap.h | 9 +- include/llvm/DebugInfo/PDB/Raw/NameMapBuilder.h | 45 + include/llvm/DebugInfo/PDB/Raw/PDBFile.h | 81 +- include/llvm/DebugInfo/PDB/Raw/PDBFileBuilder.h | 33 +- include/llvm/DebugInfo/PDB/Raw/PublicsStream.h | 26 +- include/llvm/DebugInfo/PDB/Raw/RawConstants.h | 2 + include/llvm/DebugInfo/PDB/Raw/RawError.h | 3 + include/llvm/DebugInfo/PDB/Raw/RawSession.h | 5 +- include/llvm/DebugInfo/PDB/Raw/RawTypes.h | 194 + include/llvm/DebugInfo/PDB/Raw/SymbolStream.h | 9 +- include/llvm/DebugInfo/PDB/Raw/TpiStream.h | 26 +- .../ExecutionEngine/Orc/CompileOnDemandLayer.h | 26 + include/llvm/ExecutionEngine/Orc/LogicalDylib.h | 10 + .../ExecutionEngine/Orc/OrcRemoteTargetClient.h | 2 +- include/llvm/IR/Attributes.h | 1 + include/llvm/IR/DataLayout.h | 18 + include/llvm/IR/DiagnosticInfo.h | 57 +- include/llvm/IR/Function.h | 4 +- include/llvm/IR/IRBuilder.h | 5 + include/llvm/IR/InlineAsm.h | 23 +- include/llvm/IR/InstrTypes.h | 4 +- include/llvm/IR/Instruction.h | 17 + include/llvm/IR/Instructions.h | 8 +- include/llvm/IR/Intrinsics.td | 46 +- include/llvm/IR/IntrinsicsAMDGPU.td | 92 +- include/llvm/IR/IntrinsicsX86.td | 16 +- include/llvm/IR/LLVMContext.h | 7 + include/llvm/IR/ModuleSummaryIndex.h | 9 + include/llvm/InitializePasses.h | 23 +- include/llvm/LinkAllPasses.h | 1 + include/llvm/MC/MCAsmBackend.h | 3 +- include/llvm/MC/MCAsmInfo.h | 9 +- include/llvm/MC/MCParser/MCTargetAsmParser.h | 11 + include/llvm/MC/MCTargetOptions.h | 8 + include/llvm/Object/Archive.h | 82 +- include/llvm/Object/COFF.h | 26 +- include/llvm/Object/ELFObjectFile.h | 5 + include/llvm/Object/RelocVisitor.h | 13 + include/llvm/Passes/PassBuilder.h | 4 +- .../llvm/ProfileData/Coverage/CoverageMapping.h | 19 +- include/llvm/ProfileData/InstrProf.h | 12 +- include/llvm/ProfileData/InstrProfData.inc | 7 +- include/llvm/ProfileData/InstrProfWriter.h | 2 + include/llvm/Support/AArch64TargetParser.def | 2 + include/llvm/Support/AlignOf.h | 2 +- include/llvm/Support/ELF.h | 6 + include/llvm/Support/ELFRelocs/BPF.def | 9 + include/llvm/Support/Error.h | 34 +- include/llvm/Support/Host.h | 2 + include/llvm/Support/MachO.h | 2 +- include/llvm/Support/MathExtras.h | 169 +- include/llvm/Support/Program.h | 2 +- include/llvm/Support/TargetParser.h | 7 + include/llvm/Support/TargetRegistry.h | 12 +- include/llvm/Support/TrailingObjects.h | 70 +- include/llvm/Target/GenericOpcodes.td | 120 + include/llvm/Target/Target.td | 8 +- include/llvm/Target/TargetInstrInfo.h | 49 +- include/llvm/Target/TargetIntrinsicInfo.h | 7 +- include/llvm/Target/TargetLowering.h | 5 + include/llvm/Target/TargetOpcodes.def | 104 +- include/llvm/Target/TargetOpcodes.h | 2 +- include/llvm/Target/TargetOptions.h | 1 - include/llvm/Target/TargetSubtargetInfo.h | 15 + include/llvm/Transforms/Coroutines.h | 38 + include/llvm/Transforms/IPO/FunctionImport.h | 12 + include/llvm/Transforms/IPO/InlinerPass.h | 17 +- include/llvm/Transforms/IPO/PartialInlining.h | 3 - include/llvm/Transforms/IPO/PassManagerBuilder.h | 7 + include/llvm/Transforms/Scalar.h | 7 + include/llvm/Transforms/Scalar/GVN.h | 15 +- include/llvm/Transforms/Scalar/LoopDistribute.h | 30 + include/llvm/Transforms/Scalar/LoopInstSimplify.h | 29 + .../llvm/Transforms/Scalar/LoopStrengthReduce.h | 37 + include/llvm/Transforms/Scalar/LoopUnrollPass.h | 28 + .../llvm/Transforms/Scalar/LowerGuardIntrinsic.h | 28 + include/llvm/Transforms/Scalar/NaryReassociate.h | 174 + include/llvm/Transforms/Utils/BreakCriticalEdges.h | 29 + include/llvm/Transforms/Utils/Cloning.h | 8 +- include/llvm/Transforms/Utils/CmpInstAnalysis.h | 27 +- include/llvm/Transforms/Utils/CodeExtractor.h | 6 + .../Utils/ImportedFunctionsInliningStatistics.h | 125 + include/llvm/Transforms/Utils/LoopUtils.h | 72 +- include/llvm/Transforms/Utils/MemorySSA.h | 39 +- include/llvm/Transforms/Utils/SymbolRewriter.h | 60 +- include/llvm/Transforms/Utils/UnrollLoop.h | 4 +- include/llvm/Transforms/Vectorize/LoopVectorize.h | 5 +- include/llvm/module.modulemap | 8 + lib/Analysis/AliasAnalysis.cpp | 3 + lib/Analysis/AliasAnalysisSummary.cpp | 2 +- lib/Analysis/AliasAnalysisSummary.h | 82 +- lib/Analysis/Analysis.cpp | 4 +- lib/Analysis/BranchProbabilityInfo.cpp | 9 + lib/Analysis/CFLAndersAliasAnalysis.cpp | 940 ++- lib/Analysis/CFLGraph.h | 177 +- lib/Analysis/CFLSteensAliasAnalysis.cpp | 28 +- lib/Analysis/CMakeLists.txt | 2 + lib/Analysis/ConstantFolding.cpp | 154 +- lib/Analysis/DemandedBits.cpp | 9 +- lib/Analysis/IVUsers.cpp | 96 +- lib/Analysis/InlineCost.cpp | 58 +- lib/Analysis/InstructionSimplify.cpp | 304 +- lib/Analysis/IteratedDominanceFrontier.cpp | 2 +- lib/Analysis/LazyBlockFrequencyInfo.cpp | 15 +- lib/Analysis/LazyBranchProbabilityInfo.cpp | 63 + lib/Analysis/LazyValueInfo.cpp | 52 +- lib/Analysis/Lint.cpp | 6 +- lib/Analysis/LoopAccessAnalysis.cpp | 15 +- lib/Analysis/LoopInfo.cpp | 11 + lib/Analysis/LoopPass.cpp | 12 +- lib/Analysis/LoopUnrollAnalyzer.cpp | 14 +- lib/Analysis/ModuleSummaryAnalysis.cpp | 34 +- lib/Analysis/OptimizationDiagnosticInfo.cpp | 141 + lib/Analysis/RegionPass.cpp | 6 +- lib/Analysis/ScalarEvolution.cpp | 52 +- lib/Analysis/TargetLibraryInfo.cpp | 72 + lib/Bitcode/Writer/BitcodeWriter.cpp | 73 +- lib/CodeGen/AggressiveAntiDepBreaker.cpp | 4 +- lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 14 +- lib/CodeGen/AsmPrinter/CodeViewDebug.cpp | 20 +- lib/CodeGen/AsmPrinter/CodeViewDebug.h | 3 + lib/CodeGen/AsmPrinter/DwarfCFIException.cpp | 9 +- lib/CodeGen/AsmPrinter/LLVMBuild.txt | 2 +- lib/CodeGen/AsmPrinter/WinException.cpp | 6 +- lib/CodeGen/BranchFolding.cpp | 34 +- lib/CodeGen/CMakeLists.txt | 2 + lib/CodeGen/CodeGen.cpp | 1 + lib/CodeGen/CodeGenPrepare.cpp | 2 +- lib/CodeGen/CriticalAntiDepBreaker.cpp | 4 +- lib/CodeGen/EarlyIfConversion.cpp | 2 +- lib/CodeGen/ExecutionDepsFix.cpp | 2 - lib/CodeGen/ExpandPostRAPseudos.cpp | 20 +- lib/CodeGen/GCRootLowering.cpp | 8 +- lib/CodeGen/GlobalISel/CMakeLists.txt | 5 + lib/CodeGen/GlobalISel/GlobalISel.cpp | 2 + lib/CodeGen/GlobalISel/IRTranslator.cpp | 203 +- lib/CodeGen/GlobalISel/InstructionSelect.cpp | 99 + lib/CodeGen/GlobalISel/InstructionSelector.cpp | 56 + lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 115 +- lib/CodeGen/GlobalISel/MachineLegalizeHelper.cpp | 98 + lib/CodeGen/GlobalISel/MachineLegalizePass.cpp | 72 + lib/CodeGen/GlobalISel/MachineLegalizer.cpp | 129 + lib/CodeGen/GlobalISel/RegBankSelect.cpp | 4 +- lib/CodeGen/GlobalISel/RegisterBankInfo.cpp | 73 +- lib/CodeGen/IfConversion.cpp | 118 +- lib/CodeGen/ImplicitNullChecks.cpp | 2 +- lib/CodeGen/InlineSpiller.cpp | 4 +- lib/CodeGen/LLVMTargetMachine.cpp | 19 +- lib/CodeGen/LiveIntervalAnalysis.cpp | 2 + lib/CodeGen/LivePhysRegs.cpp | 4 +- lib/CodeGen/LocalStackSlotAllocation.cpp | 56 +- lib/CodeGen/LowLevelType.cpp | 52 + lib/CodeGen/MIRParser/MILexer.cpp | 38 +- lib/CodeGen/MIRParser/MILexer.h | 4 + lib/CodeGen/MIRParser/MIParser.cpp | 156 +- lib/CodeGen/MIRParser/MIRParser.cpp | 2 +- lib/CodeGen/MIRPrinter.cpp | 41 +- lib/CodeGen/MachineBasicBlock.cpp | 6 +- lib/CodeGen/MachineBlockPlacement.cpp | 183 +- lib/CodeGen/MachineFunction.cpp | 13 +- lib/CodeGen/MachineFunctionAnalysis.cpp | 6 +- lib/CodeGen/MachineFunctionPass.cpp | 2 +- lib/CodeGen/MachineInstr.cpp | 109 +- lib/CodeGen/MachineLICM.cpp | 4 +- lib/CodeGen/MachinePipeliner.cpp | 3942 +++++++++++++ lib/CodeGen/MachineRegisterInfo.cpp | 21 +- lib/CodeGen/MachineSink.cpp | 2 +- lib/CodeGen/MachineVerifier.cpp | 25 +- lib/CodeGen/PrologEpilogInserter.cpp | 153 +- lib/CodeGen/RegAllocFast.cpp | 4 +- lib/CodeGen/RegUsageInfoCollector.cpp | 13 +- lib/CodeGen/RegisterScavenging.cpp | 109 +- lib/CodeGen/RegisterUsageInfo.cpp | 5 +- lib/CodeGen/SafeStack.cpp | 2 +- lib/CodeGen/SafeStackColoring.cpp | 4 +- lib/CodeGen/SafeStackLayout.cpp | 3 +- lib/CodeGen/ScheduleDAGInstrs.cpp | 12 +- lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 201 +- lib/CodeGen/SelectionDAG/FastISel.cpp | 10 +- lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp | 16 +- lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 265 +- lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp | 33 +- lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 75 +- lib/CodeGen/SelectionDAG/LegalizeTypes.cpp | 7 +- lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp | 32 +- lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp | 33 +- lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 176 +- lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 200 +- lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 145 +- lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h | 1 + lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 14 +- lib/CodeGen/SelectionDAG/StatepointLowering.cpp | 16 +- lib/CodeGen/SelectionDAG/TargetLowering.cpp | 128 +- lib/CodeGen/ShrinkWrap.cpp | 6 +- lib/CodeGen/StackColoring.cpp | 2 +- lib/CodeGen/StackMapLivenessAnalysis.cpp | 2 +- lib/CodeGen/StackMaps.cpp | 6 +- lib/CodeGen/StackSlotColoring.cpp | 2 +- lib/CodeGen/TailDuplicator.cpp | 38 +- lib/CodeGen/TargetFrameLoweringImpl.cpp | 8 +- lib/CodeGen/TargetInstrInfo.cpp | 6 +- lib/CodeGen/TargetLoweringBase.cpp | 4 +- lib/CodeGen/TargetOptionsImpl.cpp | 2 +- lib/CodeGen/TargetRegisterInfo.cpp | 4 +- lib/CodeGen/VirtRegMap.cpp | 6 +- lib/DebugInfo/CMakeLists.txt | 3 +- lib/DebugInfo/CodeView/ByteStream.cpp | 79 - lib/DebugInfo/CodeView/CMakeLists.txt | 3 - lib/DebugInfo/CodeView/CVTypeVisitor.cpp | 1 + lib/DebugInfo/CodeView/LLVMBuild.txt | 2 +- lib/DebugInfo/CodeView/ModuleSubstream.cpp | 11 +- lib/DebugInfo/CodeView/ModuleSubstreamVisitor.cpp | 30 +- lib/DebugInfo/CodeView/StreamReader.cpp | 93 - lib/DebugInfo/CodeView/StreamWriter.cpp | 77 - lib/DebugInfo/CodeView/TypeDumper.cpp | 6 +- lib/DebugInfo/CodeView/TypeStreamMerger.cpp | 1 - lib/DebugInfo/DWARF/DWARFDebugLine.cpp | 17 +- lib/DebugInfo/LLVMBuild.txt | 2 +- lib/DebugInfo/MSF/CMakeLists.txt | 10 + lib/DebugInfo/MSF/LLVMBuild.txt | 22 + lib/DebugInfo/MSF/MSFBuilder.cpp | 279 + lib/DebugInfo/MSF/MSFCommon.cpp | 48 + lib/DebugInfo/MSF/MSFError.cpp | 70 + lib/DebugInfo/MSF/MappedBlockStream.cpp | 380 ++ lib/DebugInfo/MSF/StreamReader.cpp | 93 + lib/DebugInfo/MSF/StreamWriter.cpp | 78 + lib/DebugInfo/PDB/CMakeLists.txt | 3 +- lib/DebugInfo/PDB/LLVMBuild.txt | 2 +- lib/DebugInfo/PDB/Raw/DbiStream.cpp | 164 +- lib/DebugInfo/PDB/Raw/DbiStreamBuilder.cpp | 243 +- lib/DebugInfo/PDB/Raw/IndexedStreamData.cpp | 25 - lib/DebugInfo/PDB/Raw/InfoStream.cpp | 25 +- lib/DebugInfo/PDB/Raw/InfoStreamBuilder.cpp | 69 +- lib/DebugInfo/PDB/Raw/MappedBlockStream.cpp | 310 - lib/DebugInfo/PDB/Raw/ModInfo.cpp | 65 +- lib/DebugInfo/PDB/Raw/ModStream.cpp | 10 +- lib/DebugInfo/PDB/Raw/NameHashTable.cpp | 10 +- lib/DebugInfo/PDB/Raw/NameMap.cpp | 26 +- lib/DebugInfo/PDB/Raw/NameMapBuilder.cpp | 105 + lib/DebugInfo/PDB/Raw/PDBFile.cpp | 271 +- lib/DebugInfo/PDB/Raw/PDBFileBuilder.cpp | 171 +- lib/DebugInfo/PDB/Raw/PublicsStream.cpp | 8 +- lib/DebugInfo/PDB/Raw/RawError.cpp | 6 + lib/DebugInfo/PDB/Raw/RawSession.cpp | 33 +- lib/DebugInfo/PDB/Raw/SymbolStream.cpp | 8 +- lib/DebugInfo/PDB/Raw/TpiStream.cpp | 17 +- lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp | 5 +- lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp | 6 +- lib/Fuzzer/FuzzerDriver.cpp | 1 + lib/Fuzzer/FuzzerFlags.def | 2 + lib/Fuzzer/FuzzerInternal.h | 3 +- lib/Fuzzer/FuzzerMutate.cpp | 5 +- lib/Fuzzer/FuzzerTraceState.cpp | 48 +- lib/Fuzzer/afl/afl_driver.cpp | 16 +- lib/Fuzzer/test/CMakeLists.txt | 2 + lib/Fuzzer/test/FuzzerUnittest.cpp | 2 +- lib/Fuzzer/test/StrstrTest.cpp | 22 + lib/Fuzzer/test/ThreadedLeakTest.cpp | 18 + lib/Fuzzer/test/fuzzer-leak.test | 5 + lib/Fuzzer/test/fuzzer-traces-hooks.test | 2 + lib/IR/AttributeImpl.h | 69 +- lib/IR/AttributeSetNode.h | 98 + lib/IR/Attributes.cpp | 2 +- lib/IR/AutoUpgrade.cpp | 57 +- lib/IR/Core.cpp | 28 + lib/IR/DataLayout.cpp | 14 + lib/IR/DiagnosticInfo.cpp | 2 + lib/IR/Function.cpp | 44 +- lib/IR/IRBuilder.cpp | 20 + lib/IR/Instruction.cpp | 8 + lib/IR/LLVMContext.cpp | 7 + lib/IR/LLVMContextImpl.cpp | 1 + lib/IR/LLVMContextImpl.h | 3 +- lib/IR/Metadata.cpp | 2 +- lib/IR/Verifier.cpp | 10 + lib/MC/MCAsmStreamer.cpp | 15 +- lib/MC/MCAssembler.cpp | 4 +- lib/MC/MCCodeView.cpp | 16 +- lib/MC/MCParser/AsmLexer.cpp | 2 +- lib/MC/MCParser/AsmParser.cpp | 765 ++- lib/MC/MCParser/DarwinAsmParser.cpp | 1 - lib/MC/MCParser/ELFAsmParser.cpp | 8 + lib/MC/MCTargetOptions.cpp | 2 +- lib/Object/Archive.cpp | 452 +- lib/Object/ArchiveWriter.cpp | 4 +- lib/Object/COFFObjectFile.cpp | 27 +- lib/Object/ELF.cpp | 6 + lib/Object/MachOObjectFile.cpp | 2 +- lib/Object/MachOUniversal.cpp | 2 +- lib/ObjectYAML/ELFYAML.cpp | 4 + lib/Passes/PassBuilder.cpp | 27 +- lib/Passes/PassRegistry.def | 14 + lib/ProfileData/Coverage/CoverageMapping.cpp | 8 +- lib/ProfileData/InstrProf.cpp | 26 + lib/ProfileData/InstrProfWriter.cpp | 8 + lib/Support/APInt.cpp | 54 +- lib/Support/CommandLine.cpp | 29 +- lib/Support/Host.cpp | 99 +- lib/Support/TargetParser.cpp | 99 +- lib/Support/Triple.cpp | 2 + lib/Support/Unix/Path.inc | 14 +- lib/Target/AArch64/AArch64.h | 14 + lib/Target/AArch64/AArch64.td | 1 + lib/Target/AArch64/AArch64A53Fix835769.cpp | 11 +- lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp | 4 - lib/Target/AArch64/AArch64AddressTypePromotion.cpp | 10 +- lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp | 4 - lib/Target/AArch64/AArch64BranchRelaxation.cpp | 22 +- lib/Target/AArch64/AArch64CallLowering.cpp | 12 +- lib/Target/AArch64/AArch64CallingConvention.td | 6 + .../AArch64/AArch64CleanupLocalDynamicTLSPass.cpp | 13 +- lib/Target/AArch64/AArch64CollectLOH.cpp | 4 - lib/Target/AArch64/AArch64ConditionOptimizer.cpp | 12 +- lib/Target/AArch64/AArch64ConditionalCompares.cpp | 12 +- .../AArch64/AArch64DeadRegisterDefinitionsPass.cpp | 4 - lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp | 4 - lib/Target/AArch64/AArch64FastISel.cpp | 108 +- lib/Target/AArch64/AArch64FrameLowering.cpp | 60 +- lib/Target/AArch64/AArch64ISelLowering.cpp | 123 +- lib/Target/AArch64/AArch64ISelLowering.h | 2 +- lib/Target/AArch64/AArch64InstrInfo.cpp | 34 +- lib/Target/AArch64/AArch64InstrInfo.h | 6 +- lib/Target/AArch64/AArch64InstructionSelector.cpp | 238 + lib/Target/AArch64/AArch64InstructionSelector.h | 39 + lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp | 33 +- lib/Target/AArch64/AArch64MachineFunctionInfo.h | 2 +- lib/Target/AArch64/AArch64MachineLegalizer.cpp | 30 + lib/Target/AArch64/AArch64MachineLegalizer.h | 30 + lib/Target/AArch64/AArch64PromoteConstant.cpp | 8 +- .../AArch64/AArch64RedundantCopyElimination.cpp | 9 +- lib/Target/AArch64/AArch64RegisterBankInfo.cpp | 25 + lib/Target/AArch64/AArch64RegisterBankInfo.h | 4 +- lib/Target/AArch64/AArch64RegisterInfo.cpp | 20 +- lib/Target/AArch64/AArch64RegisterInfo.h | 3 +- lib/Target/AArch64/AArch64StorePairSuppress.cpp | 13 +- lib/Target/AArch64/AArch64Subtarget.cpp | 10 + lib/Target/AArch64/AArch64Subtarget.h | 4 +- lib/Target/AArch64/AArch64TargetMachine.cpp | 157 +- lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp | 2 +- lib/Target/AArch64/CMakeLists.txt | 2 + .../AArch64/Disassembler/AArch64Disassembler.cpp | 4 +- .../AArch64/MCTargetDesc/AArch64AsmBackend.cpp | 9 +- .../AArch64/MCTargetDesc/AArch64MCTargetDesc.h | 7 +- lib/Target/AMDGPU/AMDGPU.h | 3 +- lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp | 3 +- lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 277 +- lib/Target/AMDGPU/AMDGPUAsmPrinter.h | 8 +- lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp | 123 +- lib/Target/AMDGPU/AMDGPUFrameLowering.cpp | 12 +- lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 21 +- lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 203 +- lib/Target/AMDGPU/AMDGPUISelLowering.h | 12 +- lib/Target/AMDGPU/AMDGPUInstrInfo.td | 16 + lib/Target/AMDGPU/AMDGPUInstructions.td | 3 +- lib/Target/AMDGPU/AMDGPUIntrinsicInfo.cpp | 53 +- lib/Target/AMDGPU/AMDGPUIntrinsicInfo.h | 14 +- lib/Target/AMDGPU/AMDGPUIntrinsics.td | 16 +- lib/Target/AMDGPU/AMDGPUMachineFunction.cpp | 44 +- lib/Target/AMDGPU/AMDGPUMachineFunction.h | 43 +- lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp | 60 +- lib/Target/AMDGPU/AMDGPURuntimeMetadata.h | 138 + lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 26 - lib/Target/AMDGPU/AMDGPUSubtarget.h | 43 +- lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 18 + lib/Target/AMDGPU/AMDGPUTargetMachine.h | 9 +- .../AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 5 + lib/Target/AMDGPU/EvergreenInstructions.td | 7 +- .../AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp | 3 +- .../AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp | 1 + .../AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h | 4 +- lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp | 2 +- lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp | 79 - lib/Target/AMDGPU/R600ISelLowering.cpp | 321 +- lib/Target/AMDGPU/R600ISelLowering.h | 3 +- lib/Target/AMDGPU/R600InstrInfo.cpp | 75 +- lib/Target/AMDGPU/R600InstrInfo.h | 18 +- lib/Target/AMDGPU/R600Instructions.td | 11 +- lib/Target/AMDGPU/R600Intrinsics.td | 94 +- lib/Target/AMDGPU/R600MachineFunctionInfo.cpp | 4 - lib/Target/AMDGPU/R600MachineFunctionInfo.h | 7 +- lib/Target/AMDGPU/SIAnnotateControlFlow.cpp | 2 + lib/Target/AMDGPU/SIFrameLowering.cpp | 12 +- lib/Target/AMDGPU/SIISelLowering.cpp | 553 +- lib/Target/AMDGPU/SIISelLowering.h | 4 +- lib/Target/AMDGPU/SIInstrInfo.cpp | 79 +- lib/Target/AMDGPU/SIInstrInfo.h | 4 +- lib/Target/AMDGPU/SIInstrInfo.td | 50 +- lib/Target/AMDGPU/SIInstructions.td | 150 +- lib/Target/AMDGPU/SIIntrinsics.td | 9 +- lib/Target/AMDGPU/SILowerControlFlow.cpp | 354 +- lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 26 +- lib/Target/AMDGPU/SIMachineFunctionInfo.h | 12 +- lib/Target/AMDGPU/SIMachineScheduler.cpp | 3 + lib/Target/AMDGPU/SIRegisterInfo.cpp | 32 +- lib/Target/AMDGPU/SIRegisterInfo.h | 3 +- lib/Target/AMDGPU/SIRegisterInfo.td | 67 +- lib/Target/AMDGPU/SIShrinkInstructions.cpp | 6 +- lib/Target/AMDGPU/SIWholeQuadMode.cpp | 3 + lib/Target/ARM/ARM.h | 9 + lib/Target/ARM/ARM.td | 46 +- lib/Target/ARM/ARMBaseInstrInfo.cpp | 22 +- lib/Target/ARM/ARMBaseInstrInfo.h | 4 +- lib/Target/ARM/ARMBaseRegisterInfo.cpp | 22 +- lib/Target/ARM/ARMBasicBlockInfo.h | 110 + lib/Target/ARM/ARMComputeBlockSize.cpp | 72 + lib/Target/ARM/ARMConstantIslandPass.cpp | 174 +- lib/Target/ARM/ARMExpandPseudoInsts.cpp | 6 +- lib/Target/ARM/ARMFastISel.cpp | 16 +- lib/Target/ARM/ARMFrameLowering.cpp | 88 +- lib/Target/ARM/ARMISelDAGToDAG.cpp | 92 +- lib/Target/ARM/ARMISelLowering.cpp | 365 +- lib/Target/ARM/ARMISelLowering.h | 6 + lib/Target/ARM/ARMInstrInfo.cpp | 4 +- lib/Target/ARM/ARMInstrInfo.td | 12 +- lib/Target/ARM/ARMInstrThumb.td | 18 + lib/Target/ARM/ARMInstrThumb2.td | 480 +- lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 21 +- lib/Target/ARM/ARMSelectionDAGInfo.cpp | 5 +- lib/Target/ARM/ARMTargetMachine.cpp | 4 + lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 377 +- lib/Target/ARM/CMakeLists.txt | 1 + lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp | 21 +- lib/Target/ARM/MCTargetDesc/ARMELFObjectWriter.cpp | 3 + lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp | 1 + lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h | 14 +- lib/Target/ARM/README-Thumb.txt | 2 +- lib/Target/ARM/Thumb1FrameLowering.cpp | 36 +- lib/Target/ARM/Thumb1InstrInfo.cpp | 4 +- lib/Target/ARM/Thumb2InstrInfo.cpp | 4 +- lib/Target/ARM/ThumbRegisterInfo.cpp | 8 +- lib/Target/AVR/AVRInstrInfo.cpp | 8 +- lib/Target/AVR/AVRInstrInfo.h | 4 +- lib/Target/AVR/AVRRegisterInfo.cpp | 6 +- lib/Target/BPF/BPFInstrInfo.cpp | 2 +- lib/Target/BPF/BPFInstrInfo.h | 2 +- lib/Target/BPF/BPFRegisterInfo.cpp | 4 +- lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp | 6 +- lib/Target/BPF/MCTargetDesc/BPFELFObjectWriter.cpp | 2 +- lib/Target/BPF/MCTargetDesc/BPFMCTargetDesc.h | 7 +- lib/Target/Hexagon/BitTracker.cpp | 9 + lib/Target/Hexagon/BitTracker.h | 1 + lib/Target/Hexagon/CMakeLists.txt | 2 + lib/Target/Hexagon/Hexagon.td | 17 +- lib/Target/Hexagon/HexagonAsmPrinter.cpp | 24 +- lib/Target/Hexagon/HexagonBitSimplify.cpp | 145 +- lib/Target/Hexagon/HexagonBitTracker.cpp | 23 +- lib/Target/Hexagon/HexagonBranchRelaxation.cpp | 20 +- lib/Target/Hexagon/HexagonConstPropagation.cpp | 3187 +++++++++++ lib/Target/Hexagon/HexagonCopyToCombine.cpp | 2 +- lib/Target/Hexagon/HexagonEarlyIfConv.cpp | 138 +- lib/Target/Hexagon/HexagonFixupHwLoops.cpp | 4 +- lib/Target/Hexagon/HexagonFrameLowering.cpp | 333 +- lib/Target/Hexagon/HexagonFrameLowering.h | 3 +- lib/Target/Hexagon/HexagonGenInsert.cpp | 2 +- lib/Target/Hexagon/HexagonHardwareLoops.cpp | 89 +- lib/Target/Hexagon/HexagonHazardRecognizer.cpp | 139 + lib/Target/Hexagon/HexagonHazardRecognizer.h | 78 + lib/Target/Hexagon/HexagonISelDAGToDAG.cpp | 783 ++- lib/Target/Hexagon/HexagonISelLowering.cpp | 293 +- lib/Target/Hexagon/HexagonISelLowering.h | 4 + lib/Target/Hexagon/HexagonInstrFormats.td | 14 +- lib/Target/Hexagon/HexagonInstrFormatsV4.td | 7 +- lib/Target/Hexagon/HexagonInstrInfo.cpp | 938 +-- lib/Target/Hexagon/HexagonInstrInfo.h | 225 +- lib/Target/Hexagon/HexagonInstrInfo.td | 115 +- lib/Target/Hexagon/HexagonInstrInfoV4.td | 624 +- lib/Target/Hexagon/HexagonInstrInfoV60.td | 82 +- lib/Target/Hexagon/HexagonMachineScheduler.cpp | 402 +- lib/Target/Hexagon/HexagonMachineScheduler.h | 19 +- lib/Target/Hexagon/HexagonOperands.td | 70 - lib/Target/Hexagon/HexagonOptAddrMode.cpp | 68 +- lib/Target/Hexagon/HexagonRDFOpt.cpp | 14 +- lib/Target/Hexagon/HexagonScheduleV4.td | 12 +- lib/Target/Hexagon/HexagonScheduleV55.td | 185 +- lib/Target/Hexagon/HexagonScheduleV60.td | 10 - lib/Target/Hexagon/HexagonSelectionDAGInfo.cpp | 7 +- lib/Target/Hexagon/HexagonSplitDouble.cpp | 4 +- lib/Target/Hexagon/HexagonSubtarget.cpp | 250 + lib/Target/Hexagon/HexagonSubtarget.h | 29 +- lib/Target/Hexagon/HexagonTargetMachine.cpp | 18 +- lib/Target/Hexagon/HexagonTargetTransformInfo.cpp | 8 + lib/Target/Hexagon/HexagonTargetTransformInfo.h | 4 + lib/Target/Hexagon/HexagonVLIWPacketizer.cpp | 412 +- lib/Target/Hexagon/HexagonVLIWPacketizer.h | 44 +- lib/Target/Hexagon/LLVMBuild.txt | 25 +- .../Hexagon/MCTargetDesc/HexagonAsmBackend.cpp | 3 +- .../Hexagon/MCTargetDesc/HexagonMCTargetDesc.h | 4 +- lib/Target/Hexagon/RDFGraph.cpp | 14 +- lib/Target/Hexagon/RDFGraph.h | 16 +- lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp | 12 +- .../Lanai/Disassembler/LanaiDisassembler.cpp | 19 +- lib/Target/Lanai/InstPrinter/LanaiInstPrinter.cpp | 8 +- lib/Target/Lanai/LanaiAsmPrinter.cpp | 7 +- lib/Target/Lanai/LanaiDelaySlotFiller.cpp | 2 +- lib/Target/Lanai/LanaiFrameLowering.cpp | 36 +- lib/Target/Lanai/LanaiFrameLowering.h | 2 +- lib/Target/Lanai/LanaiISelDAGToDAG.cpp | 2 +- lib/Target/Lanai/LanaiISelLowering.cpp | 53 +- lib/Target/Lanai/LanaiInstrInfo.cpp | 28 +- lib/Target/Lanai/LanaiInstrInfo.h | 2 +- lib/Target/Lanai/LanaiMCInstLower.h | 2 +- lib/Target/Lanai/LanaiRegisterInfo.cpp | 21 +- lib/Target/Lanai/LanaiSelectionDAGInfo.cpp | 8 +- lib/Target/Lanai/LanaiSubtarget.cpp | 6 +- lib/Target/Lanai/LanaiTargetMachine.cpp | 10 +- lib/Target/Lanai/LanaiTargetMachine.h | 2 +- lib/Target/Lanai/LanaiTargetObjectFile.cpp | 2 +- lib/Target/Lanai/LanaiTargetTransformInfo.h | 3 +- lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp | 29 +- .../Lanai/MCTargetDesc/LanaiELFObjectWriter.cpp | 10 +- lib/Target/Lanai/MCTargetDesc/LanaiMCAsmInfo.cpp | 2 +- .../Lanai/MCTargetDesc/LanaiMCCodeEmitter.cpp | 3 +- lib/Target/Lanai/MCTargetDesc/LanaiMCExpr.h | 2 +- .../Lanai/MCTargetDesc/LanaiMCTargetDesc.cpp | 4 +- lib/Target/Lanai/MCTargetDesc/LanaiMCTargetDesc.h | 4 +- lib/Target/MSP430/MSP430BranchSelector.cpp | 4 +- lib/Target/MSP430/MSP430FrameLowering.cpp | 26 +- lib/Target/MSP430/MSP430ISelLowering.cpp | 38 +- lib/Target/MSP430/MSP430InstrInfo.cpp | 8 +- lib/Target/MSP430/MSP430InstrInfo.h | 6 +- lib/Target/MSP430/MSP430RegisterInfo.cpp | 4 +- lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 143 +- lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp | 1 + lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp | 12 +- .../Mips/MCTargetDesc/MipsELFObjectWriter.cpp | 8 +- lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp | 11 +- lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp | 7 +- lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.h | 13 +- lib/Target/Mips/MicroMips64r6InstrInfo.td | 7 +- lib/Target/Mips/MicroMipsInstrInfo.td | 37 + lib/Target/Mips/Mips16FrameLowering.cpp | 24 +- lib/Target/Mips/Mips16InstrInfo.cpp | 10 +- lib/Target/Mips/Mips16RegisterInfo.cpp | 4 +- lib/Target/Mips/Mips64InstrInfo.td | 31 +- lib/Target/Mips/Mips64r6InstrInfo.td | 39 +- lib/Target/Mips/MipsAsmPrinter.cpp | 6 +- lib/Target/Mips/MipsConstantIslandPass.cpp | 16 +- lib/Target/Mips/MipsDelaySlotFiller.cpp | 12 +- lib/Target/Mips/MipsFastISel.cpp | 164 +- lib/Target/Mips/MipsFrameLowering.cpp | 26 +- lib/Target/Mips/MipsISelDAGToDAG.cpp | 22 +- lib/Target/Mips/MipsISelDAGToDAG.h | 13 +- lib/Target/Mips/MipsISelLowering.cpp | 86 +- lib/Target/Mips/MipsISelLowering.h | 10 +- lib/Target/Mips/MipsInstrInfo.cpp | 45 +- lib/Target/Mips/MipsInstrInfo.h | 10 +- lib/Target/Mips/MipsInstrInfo.td | 178 +- lib/Target/Mips/MipsLongBranch.cpp | 2 +- lib/Target/Mips/MipsMSAInstrInfo.td | 36 +- lib/Target/Mips/MipsMachineFunction.cpp | 6 +- lib/Target/Mips/MipsRegisterInfo.cpp | 6 +- lib/Target/Mips/MipsSEFrameLowering.cpp | 46 +- lib/Target/Mips/MipsSEISelDAGToDAG.cpp | 78 +- lib/Target/Mips/MipsSEISelDAGToDAG.h | 19 +- lib/Target/Mips/MipsSEISelLowering.cpp | 32 +- lib/Target/Mips/MipsSEInstrInfo.cpp | 41 +- lib/Target/Mips/MipsSERegisterInfo.cpp | 59 +- lib/Target/Mips/MipsTargetMachine.cpp | 5 +- lib/Target/NVPTX/CMakeLists.txt | 2 +- lib/Target/NVPTX/LLVMBuild.txt | 2 +- lib/Target/NVPTX/NVPTX.h | 2 +- lib/Target/NVPTX/NVPTXAsmPrinter.cpp | 46 +- lib/Target/NVPTX/NVPTXFrameLowering.cpp | 2 +- lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp | 11 +- lib/Target/NVPTX/NVPTXISelLowering.cpp | 82 +- lib/Target/NVPTX/NVPTXInstrInfo.cpp | 8 +- lib/Target/NVPTX/NVPTXInstrInfo.h | 7 +- lib/Target/NVPTX/NVPTXLowerArgs.cpp | 253 + lib/Target/NVPTX/NVPTXLowerKernelArgs.cpp | 234 - lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp | 52 +- lib/Target/NVPTX/NVPTXRegisterInfo.cpp | 2 +- lib/Target/NVPTX/NVPTXTargetMachine.cpp | 20 +- lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp | 3 +- lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h | 4 +- lib/Target/PowerPC/PPCBranchSelector.cpp | 14 +- lib/Target/PowerPC/PPCCTRLoops.cpp | 8 +- lib/Target/PowerPC/PPCFrameLowering.cpp | 198 +- lib/Target/PowerPC/PPCHazardRecognizers.cpp | 2 +- lib/Target/PowerPC/PPCISelLowering.cpp | 502 +- lib/Target/PowerPC/PPCInstrInfo.cpp | 142 +- lib/Target/PowerPC/PPCInstrInfo.h | 4 +- lib/Target/PowerPC/PPCInstrVSX.td | 43 + lib/Target/PowerPC/PPCRegisterInfo.cpp | 18 +- lib/Target/PowerPC/PPCTLSDynamicCall.cpp | 26 +- lib/Target/PowerPC/PPCVSXCopy.cpp | 28 +- lib/Target/PowerPC/PPCVSXFMAMutate.cpp | 74 +- lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp | 3 +- lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.h | 4 +- lib/Target/Sparc/SparcFrameLowering.cpp | 42 +- lib/Target/Sparc/SparcISelLowering.cpp | 247 +- lib/Target/Sparc/SparcInstrInfo.cpp | 6 +- lib/Target/Sparc/SparcInstrInfo.h | 4 +- .../SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp | 3 +- .../SystemZ/MCTargetDesc/SystemZMCTargetDesc.h | 4 +- lib/Target/SystemZ/SystemZFrameLowering.cpp | 30 +- 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| 2 +- lib/Target/XCore/XCoreMachineFunctionInfo.cpp | 18 +- lib/Target/XCore/XCoreRegisterInfo.cpp | 4 +- lib/Transforms/CMakeLists.txt | 1 + lib/Transforms/Coroutines/CMakeLists.txt | 9 + lib/Transforms/Coroutines/CoroCleanup.cpp | 42 + lib/Transforms/Coroutines/CoroEarly.cpp | 43 + lib/Transforms/Coroutines/CoroElide.cpp | 49 + lib/Transforms/Coroutines/CoroInternal.h | 28 + lib/Transforms/Coroutines/CoroSplit.cpp | 45 + lib/Transforms/Coroutines/Coroutines.cpp | 68 + lib/Transforms/Coroutines/LLVMBuild.txt | 22 + lib/Transforms/IPO/FunctionAttrs.cpp | 51 + lib/Transforms/IPO/FunctionImport.cpp | 99 +- lib/Transforms/IPO/GlobalOpt.cpp | 10 +- lib/Transforms/IPO/IPO.cpp | 2 +- lib/Transforms/IPO/InlineSimple.cpp | 7 +- lib/Transforms/IPO/Inliner.cpp | 112 +- lib/Transforms/IPO/PartialInlining.cpp | 230 +- lib/Transforms/IPO/PassManagerBuilder.cpp | 55 +- lib/Transforms/IPO/SampleProfile.cpp | 4 +- lib/Transforms/InstCombine/InstCombineAddSub.cpp | 23 +- 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| 26 +- test/CodeGen/X86/WidenArith.ll | 2 +- test/CodeGen/X86/avx-intrinsics-fast-isel.ll | 16 +- test/CodeGen/X86/avx-intrinsics-x86-upgrade.ll | 47 +- test/CodeGen/X86/avx-intrinsics-x86.ll | 69 +- test/CodeGen/X86/avx-vbroadcastf128.ll | 231 + test/CodeGen/X86/avx-vperm2x128.ll | 4 +- test/CodeGen/X86/avx2-conversions.ll | 4 +- test/CodeGen/X86/avx2-intrinsics-fast-isel.ll | 26 +- test/CodeGen/X86/avx2-intrinsics-x86.ll | 2 +- test/CodeGen/X86/avx2-vbroadcasti128.ll | 267 + test/CodeGen/X86/avx2-vector-shifts.ll | 4 +- test/CodeGen/X86/avx512-arith.ll | 28 +- test/CodeGen/X86/avx512-bugfix-25270.ll | 2 +- test/CodeGen/X86/avx512-bugfix-26264.ll | 16 +- test/CodeGen/X86/avx512-calling-conv.ll | 25 +- test/CodeGen/X86/avx512-cvt.ll | 347 ++ test/CodeGen/X86/avx512-ext.ll | 12 +- test/CodeGen/X86/avx512-extract-subvector.ll | 6 +- test/CodeGen/X86/avx512-fma-intrinsics.ll | 216 +- test/CodeGen/X86/avx512-fma.ll | 18 +- test/CodeGen/X86/avx512-gather-scatter-intrin.ll | 28 +- test/CodeGen/X86/avx512-insert-extract.ll | 4 +- test/CodeGen/X86/avx512-intel-ocl.ll | 16 +- test/CodeGen/X86/avx512-intrinsics-upgrade.ll | 28 +- test/CodeGen/X86/avx512-intrinsics.ll | 148 +- test/CodeGen/X86/avx512-logic.ll | 16 +- test/CodeGen/X86/avx512-mask-op.ll | 50 +- test/CodeGen/X86/avx512-mask-spills.ll | 40 +- test/CodeGen/X86/avx512-mov.ll | 8 +- test/CodeGen/X86/avx512-select.ll | 6 +- test/CodeGen/X86/avx512-trunc.ll | 15 +- test/CodeGen/X86/avx512-vbroadcast.ll | 8 +- test/CodeGen/X86/avx512-vbroadcasti128.ll | 270 + test/CodeGen/X86/avx512-vbroadcasti256.ll | 138 + test/CodeGen/X86/avx512bw-intrinsics.ll | 84 +- test/CodeGen/X86/avx512bwvl-intrinsics.ll | 524 +- test/CodeGen/X86/avx512dqvl-intrinsics.ll | 68 +- test/CodeGen/X86/avx512ifma-intrinsics.ll | 210 +- test/CodeGen/X86/avx512ifmavl-intrinsics.ll | 32 +- test/CodeGen/X86/avx512vbmi-intrinsics.ll | 57 +- test/CodeGen/X86/avx512vbmivl-intrinsics.ll | 13 +- test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll | 60 +- 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184 +- test/CodeGen/X86/sse-fsignum.ll | 379 ++ .../CodeGen/X86/sse-intrinsics-fast-isel-x86_64.ll | 11 +- test/CodeGen/X86/sse-intrinsics-fast-isel.ll | 18 +- test/CodeGen/X86/sse-scalar-fp-arith.ll | 20 +- .../X86/sse2-intrinsics-fast-isel-x86_64.ll | 11 +- test/CodeGen/X86/sse2-intrinsics-fast-isel.ll | 40 +- test/CodeGen/X86/sse2-intrinsics-x86-upgrade.ll | 13 +- test/CodeGen/X86/sse2-intrinsics-x86.ll | 92 +- test/CodeGen/X86/stack-folding-fp-avx1.ll | 26 +- test/CodeGen/X86/stack-folding-fp-avx512vl.ll | 383 ++ test/CodeGen/X86/trunc-ext-ld-st.ll | 164 +- test/CodeGen/X86/unaligned-spill-folding.ll | 2 +- test/CodeGen/X86/v8i1-masks.ll | 4 +- test/CodeGen/X86/vector-bitreverse.ll | 3082 +++------- test/CodeGen/X86/vector-compare-results.ll | 2451 ++++++-- test/CodeGen/X86/vector-half-conversions.ll | 6003 ++++++++++++++------ test/CodeGen/X86/vector-lzcnt-256.ll | 4 +- test/CodeGen/X86/vector-lzcnt-512.ll | 8 +- test/CodeGen/X86/vector-rem.ll | 43 +- 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test/CodeGen/X86/vshift-1.ll | 104 +- test/CodeGen/X86/vshift-2.ll | 104 +- test/CodeGen/X86/vshift-3.ll | 89 +- test/CodeGen/X86/vshift-4.ll | 145 +- test/CodeGen/X86/vshift-5.ll | 82 +- test/CodeGen/X86/vshift-6.ll | 79 +- test/CodeGen/X86/widen_conv-1.ll | 12 +- test/CodeGen/X86/widen_load-2.ll | 12 +- test/CodeGen/X86/widened-broadcast.ll | 595 ++ test/CodeGen/X86/win64_eh.ll | 4 - test/CodeGen/X86/wineh-coreclr.ll | 43 +- test/CodeGen/X86/x86-32-vector-calling-conv.ll | 24 +- test/CodeGen/X86/x86-64-double-shifts-var.ll | 2 + test/CodeGen/X86/x86-shifts.ll | 317 +- test/DebugInfo/ARM/prologue_end.ll | 1 - test/DebugInfo/COFF/inlining-header.ll | 167 + test/DebugInfo/COFF/inlining-same-name.ll | 2 +- test/DebugInfo/COFF/inlining.ll | 17 +- test/DebugInfo/COFF/pr28747.ll | 44 + test/DebugInfo/MIR/X86/live-debug-values.mir | 4 +- test/DebugInfo/PDB/pdbdump-headers.test | 13 +- test/DebugInfo/PDB/pdbdump-write.test | 10 +- test/DebugInfo/PDB/pdbdump-yaml.test | 83 +- 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