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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allmodconfig in repository toolchain/ci/llvm-project.
from 6e6e24bb09c [ValueTypes] Fix formatting on scalable vector warning (NFC) adds aa280c99f70 [AArch64][SVE] Emit DWARF location expr for SVE (dbg.declare) adds 816dba48af4 [VPlan] Keep start value in VPWidenIntOrFpInductionRecipe (NFC). adds cb0c034edc9 [PowerPC] Fix issue where vsrq is given incorrect shift vector adds dfcb872c3e8 [X86] Add scalar/vector test coverage for D93599 adds 223a6f94c59 [libc] remove modulo from CircularArrayRef iterator adds aa9db51ef69 [libc] Align src buffer instead of dst buffer adds 643e3c90761 [AArch64] Add BRB IALL and BRB INJ instructions adds ce8c59e6af4 Reapply multiple "[clang][cli]" patches adds 37ac4f865fb [Hexagon] Regenerate zext-v4i1.ll tests adds 29d375f5ff2 [OpenCL][NFC] Improve OpenCL test file naming adds 396dd6cd3d8 [ProfileData] Pass Twine by const reference instead of by value. adds df5c2caf0fc [MIPS] MipsAsmParser - Pass Twine by const reference instea [...] adds 26c486c2eb1 [TableGen] RegisterBankEmitter - Pass Twine by const refere [...] adds f60e0a91fbd [MLIR][SPIRV] Add `UnsignedOp` trait. adds 4e0e79dd349 [lldb] Simplify some lldb-server tests adds 494db3816b0 [LoopDeletion] Also consider loops with subloops for deletion. adds 0c41b1c9f93 [Driver][MachineOutliner] Support outlining option with LTO adds 3fa6cedb6be Fix MaterializeTemporaryExpr's type when its an incomplete array. adds 25c78de6d2a [mlir][spirv] Update pass docs adds 46975b5b29e [Hexagon] Wrap functions only used in asserts in ifndef NDEBUG adds b69fe6a85db [X86] Add icmp ne/eq (srl (ctlz x), log2(bw)) test coverage. adds 500864f928c Remove some unused <vector> includes. NFCI. adds 350247a93c0 [AArch64] Rearrange mul(dup(sext/zext)) to mul(sext/zext(dup)) adds 1307e3f6c46 [TargetLowering] Add icmp ne/eq (srl (ctlz x), log2(bw)) ve [...] adds 7809fa20400 [flang][driver] Add support for `-D`, `-U` adds 136f4989195 AMDGPU: Explicitly use SelectionDAG in legacy intrinsic tests adds 0a3cf7f4762 AMDGPU/GlobalISel: Add baseline IR tests for fdiv adds dfd3384feec [InstCombine] Update valueCoversEntireFragment to use TypeSize adds 3e357ecd44a [llvm][NFC] Disallow all warnings in TypeSize tests adds ab3a3f543b1 AMDGPU/GlobalISel: Update fdiv lowering for denormal/ulp in [...] adds b4706309130 [NFC] Removed unused prefixes from CodeGen/AMDGPU adds 2b638ed5a12 [mlir] NFC: fix trivial typos fix typos under docs, test, a [...] adds bd166c813c5 Nit: fix spacing adds 6173d1277be Remove allow-unregistered-dialect from some tests that don' [...] adds 08e5e91e45a [X86] Remove [ER]SP from all CSR lists adds 7ef9139a391 [Clang] Remove unnecessary Attr.isArgIdent checks. adds 3f8c2520c04 [X86] Add commuted patterns test coverage for D93599 adds 90347ab96f2 [NFC] Removed unused prefixes in CodeGen/AMDGPU adds 1ca5e68aa07 [NVPTX] Fix debugging information being added to NVPTX targ [...] adds 7afdc89c205 [sanitizer] Define SANITIZER_GLIBC to refine SANITIZER_LINU [...] adds 7916fd71e94 [lld-macho] Fix GCC -Wunused-variable in -DLLVM_ENABLE_ASSE [...] adds 322e98bc279 [flang][openacc] Add more parsing/sema tests for init and s [...] adds 7fea561eb1c [CGSCC][Coroutine][NewPM] Properly support function splitti [...] adds 5d24089a700 [SLP] reduce code for propagating flags on reductions; NFC adds 4c022b5a41d [SLP] use reduction kind's opcode to create new instructions; NFC adds 8f9da24fa7f [GVN] Regenerate test checks (NFC) adds a6df39236fd [InstSimplify] Fold out-of-bounds shift to poison adds 54c01057b68 Fix non-assert builds after D93828 adds a515342de9c [test] Pin AMDGPU/opt-pipeline.ll to legacy PM adds c68faed041e [RISCV] Return a vXi1 vector type from getSetCCResultType i [...] adds 47fba9e1eae [test] Pin partial-unswitch.ll to legacy PM adds 0bfe1001456 [NFC] Test case refactor adds 7d48eff8ba1 [PowerPC] Avoid call to undef in test (NFC) adds d042f2db5bf [InstSimplify] Fold call null/undef to poison adds 221c3b174b1 [InstSimplify] Canonicalize non-demanded shuffle op to pois [...] adds badc7606b0f [mlir] Remove a number of methods from mlir::OpState that j [...] adds 4fde2b6a0c0 [OpenCL] Add clang extension for function pointers. adds 0e874fc014b [OpenCL] Add clang extension for variadic functions. adds f6f6f6375d1 [BasicAA] Fix BatchAA results for phi-phi assumptions adds 90bf3ecef4b [clang-offload-bundler] Add option -list adds f9190c86813 [mlir][vector] Support unrolling for transfer ops using tensors adds 2a29ce30345 [hip] Fix HIP version parsing. adds e2a623094f6 [OpenMP] Fixed the test environment when building along with LLVM adds 5acdae1f9a7 [OpenMP] Fixed an issue that wrong LLVM headers might be in [...] adds 4726bec8f29 [libc] Add implementation of fmaf. adds e0a93e4b65b [mlir][ODS] Rename several uses of 'description' to 'summary' adds c42cee0c64f [mlir][ODS] Fix the use of cppClassName in Type constraints [...] adds efd05040e13 [mlir] Add hoisting transformation for transfer ops on tensor adds fb1c5285269 [OpenMP] Use c_int/c_size_t in Fortran target memory routin [...] adds 63aeaf754a7 [DominatorTree] Add support for mixed pre/post CFG views. adds a1265690cf6 Fix failing triple test for macOS 11 with non-zero minor versions. adds 41d919aa294 [mlir][TypeDefGen] Remove the need to define parser/printer [...] adds f9e858f5fd7 [libc] Use a wrapper for rand instead of calling std::rand [...] adds 080943f7525 [mlir][vector] Support transfer op on tensor optimizations adds b37de2afa30 [Support] Untie the llvm::Signpost interface from llvm::Timer adds 6d94eeadd28 [lldb] Ad os_signpost support to lldb_private::Timer adds 781c476ce09 [libc++] ADL-proof vector<bool> by adding _VSTD:: qualifica [...] adds 4bdab548266 [PPC] Remove old PPCSubTarget variable. adds 8deaec122ec [analyzer] Update Fuchsia checker to catch releasing unowne [...] adds 8871a4b4cab [Constant] Update ConstantVector::get to return poison if a [...] adds d853bd7a4e8 [lldb/Lua] add support for multiline scripted breakpoints adds 7a8ced43d7e [RISCV] Fix a few section number comments in RISCVInstrInfo [...] adds 37e83bc6db3 [NFC] Move readAPValue/writeAPValue up the inheritance hierarchy adds c95f39891a2 [Constant] Add tests for ConstantVector::get (NFC) adds 3a60a1f1657 [InstSimplify] Fold insertelement vec, poison, idx into vec adds b9bfe8a7530 [lldb] [debugserver] Add stN aliases for stmmN for compatibility adds fbc13e9345c [lldb] Skip scoped enum checks with Dwarf <4 adds 1d0bc055515 [llvm] Use llvm::append_range (NFC) adds 9b228f107d4 [llvm] Use BasicBlock::phis() (NFC)
No new revisions were added by this update.
Summary of changes: .../clangd/unittests/TUSchedulerTests.cpp | 7 +- clang/docs/LanguageExtensions.rst | 77 ++ clang/include/clang/AST/APValue.h | 16 +- clang/include/clang/AST/AbstractBasicReader.h | 34 + clang/include/clang/AST/AbstractBasicWriter.h | 35 + clang/include/clang/AST/PropertiesBase.td | 308 +++++ clang/include/clang/Basic/CodeGenOptions.h | 2 + clang/include/clang/Basic/DiagnosticDriverKinds.td | 2 - .../include/clang/Basic/DiagnosticFrontendKinds.td | 2 - clang/include/clang/Basic/OpenCLExtensions.def | 2 + clang/include/clang/Driver/Options.td | 1368 ++++++++++++-------- .../include/clang/Serialization/ASTRecordReader.h | 2 +- .../include/clang/Serialization/ASTRecordWriter.h | 9 +- clang/include/clang/Serialization/ASTWriter.h | 5 + clang/lib/AST/APValue.cpp | 8 + clang/lib/Basic/Targets/AMDGPU.h | 2 + clang/lib/Basic/Targets/NVPTX.h | 2 + clang/lib/Driver/ToolChains/AMDGPU.cpp | 28 +- clang/lib/Driver/ToolChains/Clang.cpp | 27 +- clang/lib/Driver/ToolChains/CommonArgs.cpp | 36 + clang/lib/Driver/ToolChains/CommonArgs.h | 4 + clang/lib/Driver/ToolChains/Cuda.cpp | 2 +- clang/lib/Driver/ToolChains/Flang.cpp | 14 +- clang/lib/Driver/ToolChains/Flang.h | 9 + clang/lib/Driver/ToolChains/ROCm.h | 2 +- clang/lib/Frontend/CompilerInvocation.cpp | 901 ++----------- clang/lib/Parse/ParseDecl.cpp | 7 +- clang/lib/Sema/SemaDecl.cpp | 16 +- clang/lib/Sema/SemaInit.cpp | 14 +- clang/lib/Sema/SemaType.cpp | 113 +- clang/lib/Serialization/ASTReader.cpp | 159 --- clang/lib/Serialization/ASTWriter.cpp | 138 -- .../Checkers/FuchsiaHandleChecker.cpp | 115 +- clang/test/AST/pr47636.cpp | 26 + clang/test/Analysis/fuchsia_handle.cpp | 21 + clang/test/CodeGenCXX/pr47636.cpp | 12 + ...vector_literals_valid.cl => vector_literals.cl} | 0 ...fflevector_valid.cl => vector_shufflevector.cl} | 0 clang/test/Driver/Inputs/rocm/bin/.hipVersion | 4 +- clang/test/Driver/arm-machine-outliner.c | 9 + clang/test/Driver/clang-offload-bundler.c | 59 +- clang/test/Misc/amdgcn.languageOptsOpenCL.cl | 12 +- clang/test/Misc/nvptx.languageOptsOpenCL.cl | 12 +- clang/test/Misc/r600.languageOptsOpenCL.cl | 12 +- clang/test/Parser/opencl-cxx-virtual.cl | 23 +- clang/test/Profile/c-generate.c | 2 +- clang/test/SemaOpenCL/extension-version.cl | 12 +- clang/test/SemaOpenCL/func.cl | 38 +- ...ipes-1.2-negative.cl => invalid-pipes-cl1.2.cl} | 0 ...erals_invalid.cl => invalid-vector-literals.cl} | 0 .../{vector_conv_invalid.cl => vector-conv.cl} | 0 .../{kernel_invalid.cl => invalid-kernel.cl} | 0 clang/test/SemaOpenCLCXX/members.cl | 29 +- .../clang-offload-bundler/ClangOffloadBundler.cpp | 174 ++- .../unittests/Frontend/CompilerInvocationTest.cpp | 84 +- clang/utils/TableGen/ClangASTPropertiesEmitter.cpp | 12 +- compiler-rt/cmake/Modules/AddCompilerRT.cmake | 1 + compiler-rt/lib/asan/asan_interceptors.h | 6 +- compiler-rt/lib/asan/tests/asan_test.cpp | 4 +- .../lib/interception/interception_linux.cpp | 6 +- compiler-rt/lib/interception/interception_linux.h | 6 +- compiler-rt/lib/msan/tests/msan_test.cpp | 36 +- .../sanitizer_common_interceptors_ioctl.inc | 6 +- .../sanitizer_common/sanitizer_linux_libcdep.cpp | 11 +- .../lib/sanitizer_common/sanitizer_platform.h | 13 + .../sanitizer_platform_interceptors.h | 90 +- .../sanitizer_platform_limits_posix.cpp | 84 +- .../sanitizer_platform_limits_posix.h | 2 + .../sanitizer_procmaps_solaris.cpp | 4 +- .../lib/tsan/rtl/tsan_interceptors_posix.cpp | 8 +- flang/include/flang/Frontend/CompilerInstance.h | 8 + flang/include/flang/Frontend/CompilerInvocation.h | 13 + flang/include/flang/Frontend/PreprocessorOptions.h | 42 + flang/lib/Frontend/CompilerInstance.cpp | 2 + flang/lib/Frontend/CompilerInvocation.cpp | 69 +- flang/test/Flang-Driver/driver-help-hidden.f90 | 2 + flang/test/Flang-Driver/driver-help.f90 | 12 +- flang/test/Flang-Driver/macro_def_undef.f90 | 38 + flang/test/Flang-Driver/macro_multiline.f90 | 22 + flang/test/Semantics/acc-clause-validity.f90 | 28 + libc/benchmarks/LibcBenchmark.h | 8 +- libc/config/linux/aarch64/entrypoints.txt | 1 + libc/config/linux/x86_64/entrypoints.txt | 1 + libc/spec/stdc.td | 2 + libc/src/math/CMakeLists.txt | 11 + libc/src/math/fmaf.cpp | 64 + libc/src/math/fmaf.h | 18 + libc/src/string/memory_utils/memcpy_utils.h | 2 +- libc/test/src/math/CMakeLists.txt | 13 + libc/test/src/math/FmaTest.h | 94 ++ libc/test/src/math/fmaf_test.cpp | 19 + .../src/string/memory_utils/memcpy_utils_test.cpp | 22 +- libc/utils/FPUtil/FPBits.h | 12 +- libc/utils/MPFRWrapper/MPFRUtils.cpp | 121 +- libc/utils/MPFRWrapper/MPFRUtils.h | 24 +- libc/utils/testutils/CMakeLists.txt | 2 + libc/utils/testutils/RandUtils.cpp | 19 + libc/utils/testutils/RandUtils.h | 16 + libcxx/include/__bit_reference | 28 +- libcxx/include/__mutex_base | 8 +- libcxx/include/__tree | 90 +- libcxx/include/array | 6 +- libcxx/include/bitset | 2 +- libcxx/include/functional | 2 +- libcxx/include/future | 12 +- libcxx/include/iomanip | 2 +- libcxx/include/mutex | 2 +- .../sequences/vector/robust_against_adl.pass.cpp | 7 +- lld/MachO/SyntheticSections.cpp | 1 + lldb/include/lldb/Utility/Timer.h | 1 + lldb/source/Plugins/ScriptInterpreter/Lua/Lua.cpp | 17 + lldb/source/Plugins/ScriptInterpreter/Lua/Lua.h | 1 + .../ScriptInterpreter/Lua/ScriptInterpreterLua.cpp | 94 +- .../ScriptInterpreter/Lua/ScriptInterpreterLua.h | 4 + lldb/source/Utility/Timer.cpp | 8 + .../register/register_command/TestRegisters.py | 8 +- lldb/test/API/python_api/type/TestTypeList.py | 45 +- .../tools/lldb-server/TestGdbRemoteAuxvSupport.py | 81 +- .../TestGdbRemoteLibrariesSvr4Support.py | 6 - .../TestGdbRemoteMemoryAllocation.py | 7 +- .../register-reading/TestGdbRemoteGPacket.py | 18 +- .../thread-name/TestGdbRemoteThreadName.py | 3 - lldb/test/CMakeLists.txt | 1 + .../test/Shell/Register/x86-multithread-write.test | 2 +- .../ScriptInterpreter/Lua/breakpoint_callback.test | 12 +- .../ScriptInterpreter/Lua/partial_statements.test | 15 + lldb/test/Shell/lit.cfg.py | 3 + lldb/test/Shell/lit.site.cfg.py.in | 1 + .../source/MacOSX/i386/DNBArchImplI386.cpp | 48 +- .../source/MacOSX/x86_64/DNBArchImplX86_64.cpp | 48 +- llvm/docs/ReleaseNotes.rst | 3 + llvm/include/llvm/ADT/DirectedGraph.h | 2 +- llvm/include/llvm/Analysis/AliasAnalysis.h | 16 +- llvm/include/llvm/Analysis/BasicAliasAnalysis.h | 14 + llvm/include/llvm/Analysis/InlineAdvisor.h | 6 +- llvm/include/llvm/Analysis/LazyCallGraph.h | 33 +- llvm/include/llvm/Analysis/MemorySSAUpdater.h | 7 +- llvm/include/llvm/CodeGen/CodeGenPassBuilder.h | 1 - .../llvm/ExecutionEngine/JITEventListener.h | 1 - llvm/include/llvm/IR/InstrTypes.h | 2 +- llvm/include/llvm/Option/OptParser.td | 18 +- llvm/include/llvm/ProfileData/SampleProfReader.h | 4 +- llvm/include/llvm/Support/CFGDiff.h | 2 +- llvm/include/llvm/Support/GenericDomTree.h | 18 +- llvm/include/llvm/Support/Signposts.h | 11 +- .../llvm/Transforms/Utils/CallGraphUpdater.h | 2 +- llvm/lib/Analysis/BasicAliasAnalysis.cpp | 122 +- llvm/lib/Analysis/CGSCCPassManager.cpp | 16 +- llvm/lib/Analysis/InstructionSimplify.cpp | 34 +- llvm/lib/Analysis/LazyCallGraph.cpp | 260 +++- llvm/lib/Analysis/MemorySSAUpdater.cpp | 17 +- llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 3 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 4 +- llvm/lib/Bitstream/Reader/BitstreamReader.cpp | 3 +- llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp | 7 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 41 +- llvm/lib/DWARFLinker/DWARFLinker.cpp | 2 +- .../Interpreter/ExternalFunctions.cpp | 2 +- llvm/lib/ExecutionEngine/Orc/Core.cpp | 3 +- llvm/lib/IR/Attributes.cpp | 2 +- llvm/lib/IR/BasicBlock.cpp | 8 +- llvm/lib/IR/Constants.cpp | 5 +- llvm/lib/IR/IRBuilder.cpp | 9 +- llvm/lib/MC/MCParser/AsmParser.cpp | 2 +- llvm/lib/MC/MCParser/MasmParser.cpp | 5 +- llvm/lib/MC/WasmObjectWriter.cpp | 4 +- llvm/lib/MCA/HardwareUnits/Scheduler.cpp | 2 +- llvm/lib/ProfileData/Coverage/CoverageMapping.cpp | 3 +- llvm/lib/ProfileData/SampleProfReader.cpp | 4 +- llvm/lib/Support/Signposts.cpp | 38 +- llvm/lib/Support/Timer.cpp | 4 +- llvm/lib/Support/Windows/Program.inc | 2 +- llvm/lib/Support/YAMLParser.cpp | 10 +- llvm/lib/TableGen/Record.cpp | 8 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 143 ++ llvm/lib/Target/AArch64/AArch64InstrInfo.td | 14 + .../Target/AArch64/AsmParser/AArch64AsmParser.cpp | 17 + llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 30 +- .../Target/Hexagon/HexagonLoopIdiomRecognition.cpp | 9 +- llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp | 7 +- llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 8 +- llvm/lib/Target/PowerPC/PPCFastISel.cpp | 2 - llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 2 - llvm/lib/Target/PowerPC/PPCInstrPrefix.td | 41 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 2 + llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 34 +- llvm/lib/Target/X86/X86CallingConv.td | 9 +- llvm/lib/Transforms/Coroutines/CoroSplit.cpp | 56 +- llvm/lib/Transforms/IPO/OpenMPOpt.cpp | 2 +- llvm/lib/Transforms/Scalar/LoopDeletion.cpp | 7 - llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp | 8 +- llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp | 20 +- llvm/lib/Transforms/Scalar/LoopUnswitch.cpp | 5 +- .../Transforms/Scalar/RewriteStatepointsForGC.cpp | 8 +- llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp | 5 +- llvm/lib/Transforms/Utils/CallGraphUpdater.cpp | 5 +- llvm/lib/Transforms/Utils/InlineFunction.cpp | 8 +- llvm/lib/Transforms/Utils/Local.cpp | 16 +- llvm/lib/Transforms/Utils/LoopRotationUtils.cpp | 5 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 47 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 70 +- llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h | 6 +- llvm/lib/Transforms/Vectorize/VPlan.h | 11 +- llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp | 3 +- llvm/test/Analysis/BasicAA/phi-speculation.ll | 11 +- .../CostModel/AArch64/cost-scalable-vector-gep.ll | 2 +- .../gep-induction-operand-typesize-warning.ll | 2 +- .../runtime-pointer-checking-insert-typesize.ll | 2 +- .../CodeGen/AArch64/aarch64-dup-ext-scalable.ll | 327 +++++ llvm/test/CodeGen/AArch64/aarch64-dup-ext.ll | 185 +++ .../dag-combine-lifetime-end-store-typesize.ll | 2 +- .../CodeGen/AArch64/debug-info-sve-dbg-declare.mir | 222 ++++ llvm/test/CodeGen/AArch64/sve-redundant-store.ll | 2 +- llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll | 1249 ++++++++++++++++++ llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll | 979 ++++++++++++++ llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll | 990 ++++++++++++++ llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll | 42 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fdiv.mir | 139 +- llvm/test/CodeGen/AMDGPU/large-alloca-compute.ll | 12 +- llvm/test/CodeGen/AMDGPU/lds-alignment.ll | 2 +- .../AMDGPU/llvm.amdgcn.buffer.store.format.d16.ll | 6 +- .../AMDGPU/llvm.amdgcn.buffer.store.format.ll | 4 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cos.ll | 4 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubeid.ll | 4 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubema.ll | 4 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubesc.ll | 4 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubetc.ll | 4 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll | 4 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.br.ll | 2 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.p.ll | 4 +- .../AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll | 4 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.v.ll | 4 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fract.ll | 4 +- .../CodeGen/AMDGPU/llvm.amdgcn.image.d16.dim.ll | 2 +- .../AMDGPU/llvm.amdgcn.image.gather4.d16.dim.ll | 6 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.ll | 2 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.log.clamp.ll | 2 +- .../AMDGPU/llvm.amdgcn.raw.buffer.atomic.ll | 4 +- .../AMDGPU/llvm.amdgcn.raw.buffer.load.format.ll | 4 +- .../CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.ll | 6 +- .../llvm.amdgcn.raw.buffer.store.format.d16.ll | 4 +- .../AMDGPU/llvm.amdgcn.raw.tbuffer.store.ll | 2 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll | 8 +- .../CodeGen/AMDGPU/llvm.amdgcn.s.memrealtime.ll | 2 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.memtime.ll | 4 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sbfe.ll | 4 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.ll | 6 +- .../CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll | 4 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sin.ll | 4 +- .../AMDGPU/llvm.amdgcn.struct.buffer.atomic.ll | 4 +- .../llvm.amdgcn.struct.buffer.load.format.ll | 4 +- .../AMDGPU/llvm.amdgcn.struct.buffer.load.ll | 4 +- .../llvm.amdgcn.struct.buffer.store.format.d16.ll | 4 +- .../AMDGPU/llvm.amdgcn.struct.tbuffer.load.d16.ll | 2 +- .../AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll | 4 +- .../CodeGen/AMDGPU/llvm.amdgcn.tbuffer.load.d16.ll | 6 +- .../AMDGPU/llvm.amdgcn.tbuffer.load.dwordx3.ll | 4 +- .../CodeGen/AMDGPU/llvm.amdgcn.tbuffer.load.ll | 4 +- .../AMDGPU/llvm.amdgcn.tbuffer.store.d16.ll | 6 +- .../AMDGPU/llvm.amdgcn.tbuffer.store.dwordx3.ll | 2 +- .../CodeGen/AMDGPU/llvm.amdgcn.tbuffer.store.ll | 4 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ubfe.ll | 4 +- .../CodeGen/AMDGPU/llvm.amdgcn.workgroup.id.ll | 12 +- .../test/CodeGen/AMDGPU/llvm.amdgcn.workitem.id.ll | 12 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll | 4 +- llvm/test/CodeGen/AMDGPU/llvm.cos.f16.ll | 6 +- llvm/test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll | 12 +- llvm/test/CodeGen/AMDGPU/llvm.log.f16.ll | 6 +- llvm/test/CodeGen/AMDGPU/llvm.log.ll | 8 +- llvm/test/CodeGen/AMDGPU/llvm.log10.f16.ll | 6 +- llvm/test/CodeGen/AMDGPU/llvm.log10.ll | 8 +- llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll | 6 +- llvm/test/CodeGen/AMDGPU/llvm.mulo.ll | 4 +- .../CodeGen/AMDGPU/llvm.r600.read.local.size.ll | 6 +- llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll | 6 +- llvm/test/CodeGen/AMDGPU/llvm.round.ll | 8 +- llvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll | 6 +- llvm/test/CodeGen/AMDGPU/load-constant-i16.ll | 8 +- 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llvm/test/CodeGen/AMDGPU/mixed-wave32-wave64.ll | 2 +- llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw.ll | 4 +- llvm/test/CodeGen/AMDGPU/mul.i16.ll | 4 +- llvm/test/CodeGen/AMDGPU/nand.ll | 8 +- llvm/test/CodeGen/AMDGPU/nested-calls.ll | 6 +- llvm/test/CodeGen/AMDGPU/nor.ll | 8 +- llvm/test/CodeGen/AMDGPU/omod.ll | 4 +- llvm/test/CodeGen/AMDGPU/opencl-image-metadata.ll | 4 +- llvm/test/CodeGen/AMDGPU/opt-pipeline.ll | 8 +- llvm/test/CodeGen/AMDGPU/pack.v2f16.ll | 6 +- llvm/test/CodeGen/AMDGPU/pack.v2i16.ll | 6 +- llvm/test/CodeGen/AMDGPU/packed-op-sel.ll | 2 +- llvm/test/CodeGen/AMDGPU/partial-shift-shrink.ll | 2 +- llvm/test/CodeGen/AMDGPU/preserve-hi16.ll | 2 +- .../CodeGen/AMDGPU/private-access-no-objects.ll | 8 +- llvm/test/CodeGen/AMDGPU/private-element-size.ll | 6 +- llvm/test/CodeGen/AMDGPU/r600.bitcast.ll | 2 +- .../CodeGen/AMDGPU/reduce-load-width-alignment.ll | 6 +- llvm/test/CodeGen/Hexagon/vect/zext-v4i1.ll | 34 +- llvm/test/CodeGen/PowerPC/p10-vector-shift.ll | 6 + llvm/test/CodeGen/PowerPC/spe.ll | 47 +- llvm/test/CodeGen/X86/avx512-regcall-Mask.ll | 72 +- llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll | 224 ++-- llvm/test/CodeGen/X86/cmp-concat.ll | 124 ++ llvm/test/CodeGen/X86/dynamic-regmask.ll | 8 +- llvm/test/CodeGen/X86/ipra-reg-usage.ll | 2 +- llvm/test/CodeGen/X86/lzcnt-cmp.ll | 177 +++ llvm/test/MC/AArch64/brbe.s | 14 + llvm/test/Transforms/Coroutines/coro-async.ll | 1 + .../Coroutines/coro-retcon-resume-values2.ll | 1 + .../Transforms/Coroutines/coro-split-recursive.ll | 36 + llvm/test/Transforms/GVN/PRE/volatile.ll | 28 +- .../InstCombine/X86/x86-pack-inseltpoison.ll | 6 +- .../Transforms/InstCombine/add-shl-sdiv-to-srem.ll | 2 +- .../InstCombine/debuginfo-scalable-typesize.ll | 36 + .../InstCombine/extractelement-inseltpoison.ll | 3 +- llvm/test/Transforms/InstCombine/extractelement.ll | 3 +- .../gep-can-replace-gep-idx-with-zero-typesize.ll | 2 +- .../InstCombine/out-of-bounds-indexes.ll | 4 +- llvm/test/Transforms/InstCombine/phi-shifts.ll | 2 +- llvm/test/Transforms/InstCombine/shift.ll | 5 +- llvm/test/Transforms/InstSimplify/call.ll | 4 +- llvm/test/Transforms/InstSimplify/insertelement.ll | 3 +- .../Transforms/InstSimplify/shift-knownbits.ll | 8 +- llvm/test/Transforms/InstSimplify/shift.ll | 18 +- llvm/test/Transforms/InstSimplify/undef.ll | 10 +- .../LoopDeletion/noop-loops-with-subloops.ll | 19 +- .../Transforms/LoopDeletion/unreachable-loops.ll | 25 +- llvm/test/Transforms/LoopDeletion/update-scev.ll | 3 + .../Transforms/LoopUnswitch/partial-unswitch.ll | 2 +- .../AArch64/sve-scalable-load-in-loop.ll | 2 +- .../Transforms/PhaseOrdering/X86/scalarization.ll | 2 +- .../X86/alternate-int-inseltpoison.ll | 2 +- .../Transforms/SLPVectorizer/X86/alternate-int.ll | 8 +- .../X86/insert-binop-with-constant.ll | 28 +- .../Transforms/VectorCombine/X86/insert-binop.ll | 2 +- llvm/unittests/ADT/TripleTest.cpp | 8 + llvm/unittests/Analysis/AliasAnalysisTest.cpp | 3 +- llvm/unittests/Analysis/CGSCCPassManagerTest.cpp | 33 +- llvm/unittests/Analysis/LazyCallGraphTest.cpp | 682 ++++++++++ llvm/unittests/IR/ConstantsTest.cpp | 8 + llvm/unittests/Support/Host.cpp | 12 +- llvm/utils/TableGen/RegisterBankEmitter.cpp | 4 +- mlir/docs/CAPI.md | 2 +- mlir/docs/ConversionToLLVMDialect.md | 6 +- mlir/docs/Dialects/LLVM.md | 2 +- mlir/docs/Dialects/TOSA.md | 4 +- mlir/docs/OpDefinitions.md | 247 ++-- mlir/docs/PassManagement.md | 2 +- mlir/include/mlir/Conversion/Passes.td | 38 +- mlir/include/mlir/Dialect/ArmSVE/ArmSVE.td | 6 +- mlir/include/mlir/Dialect/Async/IR/AsyncBase.td | 8 +- mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td | 4 +- .../mlir/Dialect/Linalg/Transforms/Hoisting.h | 9 +- mlir/include/mlir/Dialect/Quant/QuantOpsBase.td | 2 +- .../mlir/Dialect/SPIRV/IR/SPIRVArithmeticOps.td | 4 +- .../mlir/Dialect/SPIRV/IR/SPIRVAtomicOps.td | 4 +- mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td | 2 + mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBitOps.td | 3 +- mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCastOps.td | 10 +- .../mlir/Dialect/SPIRV/IR/SPIRVLogicalOps.td | 14 +- .../mlir/Dialect/SPIRV/IR/SPIRVNonUniformOps.td | 8 +- mlir/include/mlir/Dialect/SPIRV/IR/SPIRVOpTraits.h | 30 + mlir/include/mlir/Dialect/SPIRV/IR/SPIRVOps.h | 1 + mlir/include/mlir/Dialect/Shape/IR/ShapeBase.td | 10 +- mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td | 8 +- .../include/mlir/Dialect/Vector/VectorTransforms.h | 11 +- mlir/include/mlir/Dialect/Vector/VectorUtils.h | 6 + mlir/include/mlir/IR/OpBase.td | 173 ++- mlir/include/mlir/TableGen/Constraint.h | 2 +- mlir/include/mlir/TableGen/OpTrait.h | 2 +- mlir/include/mlir/TableGen/Type.h | 4 +- mlir/include/mlir/TableGen/TypeDef.h | 4 +- .../AffineToStandard/AffineToStandard.cpp | 2 +- .../Conversion/StandardToSPIRV/StandardToSPIRV.cpp | 35 +- mlir/lib/Dialect/Linalg/Transforms/Hoisting.cpp | 139 ++ .../Dialect/Vector/VectorTransferOpTransforms.cpp | 83 +- mlir/lib/Dialect/Vector/VectorTransforms.cpp | 54 +- mlir/lib/Dialect/Vector/VectorUtils.cpp | 13 +- mlir/lib/TableGen/Constraint.cpp | 10 +- mlir/lib/TableGen/OpTrait.cpp | 4 +- mlir/lib/TableGen/Type.cpp | 21 +- mlir/lib/TableGen/TypeDef.cpp | 6 +- .../lower-alloc-to-gpu-runtime-calls.mlir | 2 +- .../lower-launch-func-to-gpu-runtime-calls.mlir | 4 +- .../lower-memcpy-to-gpu-runtime-calls.mlir | 2 +- .../GPUCommon/lower-wait-to-gpu-runtime-calls.mlir | 2 +- .../Async/async-ref-counting-optimization.mlir | 2 +- mlir/test/Dialect/GPU/async-region.mlir | 2 +- mlir/test/Dialect/Linalg/hoisting.mlir | 166 +++ .../Dialect/Vector/vector-transfer-unroll.mlir | 62 + .../test/Dialect/Vector/vector-transferop-opt.mlir | 63 +- mlir/test/Dialect/Vector/vector-transforms.mlir | 57 +- mlir/test/Transforms/buffer-deallocation.mlir | 2 +- mlir/test/Transforms/normalize-memrefs-ops.mlir | 2 +- mlir/test/Transforms/promote-buffers-to-stack.mlir | 2 +- mlir/test/lib/Dialect/Shape/TestShapeFunctions.cpp | 2 +- mlir/test/lib/Dialect/Test/TestPatterns.cpp | 2 +- mlir/test/lib/Dialect/Test/TestTypeDefs.td | 3 - mlir/test/lib/Transforms/TestLinalgHoisting.cpp | 1 + mlir/test/lib/Transforms/TestSparsification.cpp | 2 +- mlir/test/lib/Transforms/TestVectorTransforms.cpp | 11 +- mlir/test/mlir-tblgen/op-attribute.td | 2 +- mlir/test/mlir-tblgen/op-decl.td | 17 + .../mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp | 2 +- mlir/tools/mlir-tblgen/EnumsGen.cpp | 2 +- mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp | 14 +- mlir/tools/mlir-tblgen/OpDocGen.cpp | 12 +- mlir/tools/mlir-tblgen/OpFormatGen.cpp | 2 +- mlir/tools/mlir-tblgen/RewriterGen.cpp | 10 +- mlir/tools/mlir-tblgen/StructsGen.cpp | 2 +- mlir/tools/mlir-tblgen/TypeDefGen.cpp | 48 +- mlir/unittests/TableGen/structs.td | 2 +- openmp/libomptarget/CMakeLists.txt | 22 +- openmp/libomptarget/src/CMakeLists.txt | 8 + openmp/runtime/src/include/omp_lib.f90.var | 68 +- openmp/runtime/src/include/omp_lib.h.var | 97 +- 435 files changed, 11047 insertions(+), 3954 deletions(-) create mode 100644 clang/test/AST/pr47636.cpp rename clang/test/CodeGenOpenCL/{vector_literals_valid.cl => vector_literals.cl} (100%) rename clang/test/CodeGenOpenCL/{vector_shufflevector_valid.cl => vector_shuffleve [...] create mode 100644 clang/test/Driver/arm-machine-outliner.c rename clang/test/SemaOpenCL/{pipes-1.2-negative.cl => invalid-pipes-cl1.2.cl} (100%) rename clang/test/SemaOpenCL/{vector_literals_invalid.cl => invalid-vector-literal [...] rename clang/test/SemaOpenCL/{vector_conv_invalid.cl => vector-conv.cl} (100%) rename clang/test/SemaOpenCLCXX/{kernel_invalid.cl => invalid-kernel.cl} (100%) create mode 100644 flang/include/flang/Frontend/PreprocessorOptions.h create mode 100644 flang/test/Flang-Driver/macro_def_undef.f90 create mode 100644 flang/test/Flang-Driver/macro_multiline.f90 create mode 100644 libc/src/math/fmaf.cpp create mode 100644 libc/src/math/fmaf.h create mode 100644 libc/test/src/math/FmaTest.h create mode 100644 libc/test/src/math/fmaf_test.cpp create mode 100644 libc/utils/testutils/RandUtils.cpp create mode 100644 libc/utils/testutils/RandUtils.h create mode 100644 lldb/test/Shell/ScriptInterpreter/Lua/partial_statements.test create mode 100644 llvm/test/CodeGen/AArch64/aarch64-dup-ext-scalable.ll create mode 100644 llvm/test/CodeGen/AArch64/aarch64-dup-ext.ll create mode 100644 llvm/test/CodeGen/AArch64/debug-info-sve-dbg-declare.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll create mode 100644 llvm/test/CodeGen/X86/cmp-concat.ll create mode 100644 llvm/test/CodeGen/X86/lzcnt-cmp.ll create mode 100644 llvm/test/Transforms/Coroutines/coro-split-recursive.ll create mode 100644 llvm/test/Transforms/InstCombine/debuginfo-scalable-typesize.ll create mode 100644 mlir/include/mlir/Dialect/SPIRV/IR/SPIRVOpTraits.h