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from 22cd98f [InstCombine] update to use FileCheck new f9bcd7b [AMDGPU] Promote uniform i16 ops to i32 ops for targets that [...] new a377afa IfConversion: Add implicit uses for redefined regs with live [...]
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Summary of changes: lib/CodeGen/IfConversion.cpp | 11 + lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp | 237 +++++- lib/Target/AMDGPU/SIISelLowering.cpp | 4 + ...genprepare.ll => amdgpu-codegenprepare-fdiv.ll} | 0 .../AMDGPU/amdgpu-codegenprepare-i16-to-i32.ll | 856 +++++++++++++++++++++ test/CodeGen/AMDGPU/ctlz.ll | 158 ++-- .../AMDGPU/{mul_uint24.ll => mul_uint24-amdgcn.ll} | 151 ++-- test/CodeGen/AMDGPU/mul_uint24-r600.ll | 83 ++ test/CodeGen/Hexagon/ifcvt-live-subreg.mir | 50 ++ 9 files changed, 1400 insertions(+), 150 deletions(-) rename test/CodeGen/AMDGPU/{amdgpu-codegenprepare.ll => amdgpu-codegenprepare-fdiv [...] create mode 100644 test/CodeGen/AMDGPU/amdgpu-codegenprepare-i16-to-i32.ll rename test/CodeGen/AMDGPU/{mul_uint24.ll => mul_uint24-amdgcn.ll} (52%) create mode 100644 test/CodeGen/AMDGPU/mul_uint24-r600.ll create mode 100644 test/CodeGen/Hexagon/ifcvt-live-subreg.mir