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from 7f26e76c984 riscv: Fix scope for memory model calculation new 99bfdb072e6 RISC-V: Eliminate extension after for *w instructions
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Summary of changes: gcc/config/riscv/bitmanip.md | 58 ++++++++-- gcc/config/riscv/riscv-protos.h | 1 + gcc/config/riscv/riscv.cc | 2 +- gcc/config/riscv/riscv.md | 147 ++++++++++++++++++++---- gcc/loop-iv.cc | 28 ++++- gcc/testsuite/gcc.target/riscv/shift-and-2.c | 19 +++ gcc/testsuite/gcc.target/riscv/shift-shift-2.c | 5 +- gcc/testsuite/gcc.target/riscv/sign-extend.c | 81 +++++++++++++ gcc/testsuite/gcc.target/riscv/zbb-rol-ror-03.c | 3 +- 9 files changed, 309 insertions(+), 35 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/sign-extend.c