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from 87ef2e154e1 testsuite: Add a couple of fstack_protector guards new 2c5742304ef [PATCH] RISC-V: Adjust testdata for unsigned vector SAT_SUB new f32d34c2b03 [PATCH] RISC-V: Enable zvfh for vector-scalar half-float run tests new 8877ab269e1 RISC-V: Combine vec_duplicate + vssub.vv to vssub.vx on GR2VR cost new e8bb09a0050 RISC-V: Add test for vec_duplicate + vssub.vv combine case [...] new 503e1680cca RISC-V: Add test for vec_duplicate + vssub.vv combine case [...]
The 5 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: gcc/config/riscv/riscv-v.cc | 1 + gcc/config/riscv/riscv.cc | 1 + gcc/config/riscv/vector-iterators.md | 3 +- .../riscv/rvv/autovec/sat/vec_sat_arith.h | 40 ++++ .../riscv/rvv/autovec/sat/vec_sat_data.h | 252 +++++++++++++++++++++ .../rvv/autovec/sat/vec_sat_u_sub-run-1-u16.c | 70 +----- .../rvv/autovec/sat/vec_sat_u_sub-run-1-u32.c | 70 +----- .../rvv/autovec/sat/vec_sat_u_sub-run-1-u64.c | 70 +----- .../riscv/rvv/autovec/sat/vec_sat_u_sub-run-1-u8.c | 71 +----- .../rvv/autovec/sat/vec_sat_u_sub-run-10-u16.c | 70 +----- .../rvv/autovec/sat/vec_sat_u_sub-run-10-u32.c | 70 +----- .../rvv/autovec/sat/vec_sat_u_sub-run-10-u64.c | 70 +----- .../rvv/autovec/sat/vec_sat_u_sub-run-10-u8.c | 70 +----- .../rvv/autovec/sat/vec_sat_u_sub-run-2-u16.c | 70 +----- .../rvv/autovec/sat/vec_sat_u_sub-run-2-u32.c | 70 +----- .../rvv/autovec/sat/vec_sat_u_sub-run-2-u64.c | 70 +----- .../riscv/rvv/autovec/sat/vec_sat_u_sub-run-2-u8.c | 70 +----- .../rvv/autovec/sat/vec_sat_u_sub-run-3-u16.c | 70 +----- .../rvv/autovec/sat/vec_sat_u_sub-run-3-u32.c | 70 +----- .../rvv/autovec/sat/vec_sat_u_sub-run-3-u64.c | 70 +----- .../riscv/rvv/autovec/sat/vec_sat_u_sub-run-3-u8.c | 70 +----- .../rvv/autovec/sat/vec_sat_u_sub-run-4-u16.c | 70 +----- .../rvv/autovec/sat/vec_sat_u_sub-run-4-u32.c | 70 +----- .../rvv/autovec/sat/vec_sat_u_sub-run-4-u64.c | 70 +----- .../riscv/rvv/autovec/sat/vec_sat_u_sub-run-4-u8.c | 70 +----- .../rvv/autovec/sat/vec_sat_u_sub-run-5-u16.c | 70 +----- .../rvv/autovec/sat/vec_sat_u_sub-run-5-u32.c | 70 +----- .../rvv/autovec/sat/vec_sat_u_sub-run-5-u64.c | 70 +----- .../riscv/rvv/autovec/sat/vec_sat_u_sub-run-5-u8.c | 70 +----- .../rvv/autovec/sat/vec_sat_u_sub-run-6-u16.c | 70 +----- .../rvv/autovec/sat/vec_sat_u_sub-run-6-u32.c | 70 +----- .../rvv/autovec/sat/vec_sat_u_sub-run-6-u64.c | 70 +----- .../riscv/rvv/autovec/sat/vec_sat_u_sub-run-6-u8.c | 70 +----- .../rvv/autovec/sat/vec_sat_u_sub-run-7-u16.c | 70 +----- .../rvv/autovec/sat/vec_sat_u_sub-run-7-u32.c | 70 +----- .../rvv/autovec/sat/vec_sat_u_sub-run-7-u64.c | 70 +----- .../riscv/rvv/autovec/sat/vec_sat_u_sub-run-7-u8.c | 70 +----- .../rvv/autovec/sat/vec_sat_u_sub-run-8-u16.c | 70 +----- .../rvv/autovec/sat/vec_sat_u_sub-run-8-u32.c | 70 +----- .../rvv/autovec/sat/vec_sat_u_sub-run-8-u64.c | 70 +----- .../riscv/rvv/autovec/sat/vec_sat_u_sub-run-8-u8.c | 70 +----- .../rvv/autovec/sat/vec_sat_u_sub-run-9-u16.c | 70 +----- .../rvv/autovec/sat/vec_sat_u_sub-run-9-u32.c | 70 +----- .../rvv/autovec/sat/vec_sat_u_sub-run-9-u64.c | 70 +----- .../riscv/rvv/autovec/sat/vec_sat_u_sub-run-9-u8.c | 70 +----- .../riscv/rvv/autovec/vx_vf/vf_mulop_run.h | 7 +- .../riscv/rvv/autovec/vx_vf/vf_vfmacc-run-1-f16.c | 2 +- .../riscv/rvv/autovec/vx_vf/vf_vfmadd-run-1-f16.c | 2 +- .../riscv/rvv/autovec/vx_vf/vf_vfmsac-run-1-f16.c | 2 +- .../riscv/rvv/autovec/vx_vf/vf_vfmsub-run-1-f16.c | 2 +- .../riscv/rvv/autovec/vx_vf/vf_vfnmacc-run-1-f16.c | 2 +- .../riscv/rvv/autovec/vx_vf/vf_vfnmadd-run-1-f16.c | 2 +- .../riscv/rvv/autovec/vx_vf/vf_vfnmsac-run-1-f16.c | 2 +- .../riscv/rvv/autovec/vx_vf/vf_vfnmsub-run-1-f16.c | 2 +- .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c | 1 + .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c | 1 + .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c | 1 + .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c | 1 + .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c | 1 + .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c | 1 + .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c | 1 + .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c | 1 + .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c | 1 + .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c | 1 + .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c | 1 + .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c | 1 + .../gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c | 2 + .../gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c | 2 + .../gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c | 2 + .../gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c | 2 + .../gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c | 2 + .../gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c | 2 + .../gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c | 2 + .../gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c | 2 + .../gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c | 2 + .../gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c | 2 + .../gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c | 2 + .../gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c | 2 + .../gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h | 21 ++ .../riscv/rvv/autovec/vx_vf/vx_binary_data.h | 196 ++++++++++++++++ .../{vx_vmin-run-2-i16.c => vx_vssub-run-1-i16.c} | 4 +- .../{vx_vmin-run-2-i32.c => vx_vssub-run-1-i32.c} | 4 +- .../{vx_vmin-run-1-i64.c => vx_vssub-run-1-i64.c} | 4 +- .../{vx_vssub-run-1-u8.c => vx_vssub-run-1-i8.c} | 4 +- 84 files changed, 772 insertions(+), 2618 deletions(-) copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/{vx_vmin-run-2-i16.c => vx_v [...] copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/{vx_vmin-run-2-i32.c => vx_v [...] copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/{vx_vmin-run-1-i64.c => vx_v [...] copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/{vx_vssub-run-1-u8.c => vx_v [...]