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from 865288236d8 sim: fr30: delete unused testsuite new fbc09e7af71 RISC-V: Implement support for big endian targets. new f36ce378b46 RISC-V: Fix riscv gas/ld testsuites failures for big endian. new 286d2f2cd79 RISC-V: Mention -mbig-endian and -mlittle-endian in doc
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Summary of changes: bfd/ChangeLog | 29 ++++++ bfd/config.bfd | 14 ++- bfd/configure | 2 + bfd/configure.ac | 2 + bfd/elfnn-riscv.c | 107 ++++++++++++++------- bfd/targets.c | 4 + gas/ChangeLog | 34 +++++++ gas/config/tc-riscv.c | 32 ++++-- gas/config/tc-riscv.h | 2 + gas/configure.tgt | 4 +- gas/doc/as.texi | 1 + gas/doc/c-riscv.texi | 8 ++ gas/testsuite/gas/riscv/li32.d | 2 +- gas/testsuite/gas/riscv/li64.d | 2 +- gas/testsuite/gas/riscv/lla32.d | 2 +- gas/testsuite/gas/riscv/lla64.d | 2 +- gas/testsuite/gas/riscv/march-ok-g2.d | 2 +- gas/testsuite/gas/riscv/march-ok-g2_p1.d | 2 +- gas/testsuite/gas/riscv/march-ok-g2p0.d | 2 +- gas/testsuite/gas/riscv/march-ok-i2p0.d | 2 +- gas/testsuite/gas/riscv/march-ok-i2p0m2_a2f2.d | 2 +- .../gas/riscv/march-ok-nse-with-version.d | 2 +- gas/testsuite/gas/riscv/march-ok-two-nse.d | 2 +- ld/ChangeLog | 33 +++++++ ld/Makefile.am | 12 +++ ld/Makefile.in | 19 ++++ ld/configure.tgt | 25 ++++- ld/emulparams/elf32briscv.sh | 2 + ld/emulparams/elf32briscv_ilp32.sh | 2 + ld/emulparams/elf32briscv_ilp32f.sh | 2 + ld/emulparams/elf64briscv.sh | 2 + ld/emulparams/elf64briscv_lp64.sh | 2 + ld/emulparams/elf64briscv_lp64f.sh | 2 + ld/testsuite/ld-riscv-elf/attr-merge-arch-01.d | 2 +- ld/testsuite/ld-riscv-elf/attr-merge-arch-02.d | 2 +- ld/testsuite/ld-riscv-elf/attr-merge-arch-03.d | 2 +- .../ld-riscv-elf/attr-merge-arch-failed-01.d | 2 +- .../ld-riscv-elf/attr-merge-arch-failed-02.d | 2 +- ld/testsuite/ld-riscv-elf/c-lui-2.d | 2 +- ld/testsuite/ld-riscv-elf/c-lui.d | 2 +- ld/testsuite/ld-riscv-elf/call-relax.d | 2 +- ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp | 39 +++++--- ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2.d | 2 +- ld/testsuite/ld-riscv-elf/pcrel-lo-addend.d | 2 +- ld/testsuite/ld-riscv-elf/weakref32.d | 2 +- ld/testsuite/ld-riscv-elf/weakref64.d | 2 +- 46 files changed, 344 insertions(+), 81 deletions(-) create mode 100644 ld/emulparams/elf32briscv.sh create mode 100644 ld/emulparams/elf32briscv_ilp32.sh create mode 100644 ld/emulparams/elf32briscv_ilp32f.sh create mode 100644 ld/emulparams/elf64briscv.sh create mode 100644 ld/emulparams/elf64briscv_lp64.sh create mode 100644 ld/emulparams/elf64briscv_lp64f.sh