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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-O2 in repository toolchain/ci/llvm-project.
from d39d3a327b13 [OpenMP][test] fix omp_get_wtime.c test to be more accommodating adds f3671a688db2 [clang-format] break after the closing paren of a TypeScri [...] adds cdb391698bb2 [tsan] Do not include <stdatomic.h> from sanitize-thread-d [...] adds 628eaa4cf7a2 [InstrProfiling] Add AIX triple to platform test adds 9577fac0fddf Revert "[InstCombine] generalize subtract with 'not' operands" adds 7872074f2264 [InstCombine] Add reduced sub/negate test from PR51584. adds c2574e63ff71 [openmp][nfc] Refactor GridValues adds 6760e2a7bcb2 [GlobalISel] Translate @llvm.llround.* -> G_LLROUND adds fe51f9098b41 [AArch64][GlobalISel] Legalize G_LLROUND for s64 + s32 adds 43de869d77f7 Implement #pragma clang restrict_expansion adds a2c8e1765808 [AArch64][GlobalISel] Add regbankselect support for G_LLROUND adds e100a41bbe61 Fix fallback code that gets decl file + line. adds 9cdd4ea06f09 [libc][NFC] Add explicit casts to ctype functions adds 469172f3f429 [MLIR][Docs] Fix broken link to tuple type rationale adds 23c19395c085 [lldb][NFC] Remove unused method RichManglingContext::IsFunction adds e4635e6328c8 [mlir][FoldUtils] Ensure the created constant dominates th [...] adds 5d7d2f0d2e7b [InstCombine] improve efficiency of isFreeToInvert adds b575bbd0c78c [PowerPC][AIX] Set the HasAlloca flag in the AIX Traceback [...] adds 401a45c61bac Fix late rematerialization operands check adds 842f875c8b38 [openmp] Use llvm GridValues from devicertl adds f5c288948844 [NFC][clang] Use X86 Features declaration from X86TargetParser adds 2540c7736002 [libc++][NFC] Reindent error message adds e8723abf43c3 [DSE] Check post-dominance for malloc+memset->calloc transform. adds da12d88b1c5f [mlir][NFC] Add inlineRegion overloads that take a block i [...] adds 19dc02e99f80 [MergeICmps] Allow sinking past non-load/store adds 4aeeb91a9249 [mlir][Linalg] Allow all build methods of Structured ops t [...] adds 955c9437fd60 [AArch64] Add Scheduling tests for Load/Store ReadAdv operands. adds 50f4ae58eb13 [AArch64] Correct store ReadAdrBase operand
No new revisions were added by this update.
Summary of changes: clang/docs/LanguageExtensions.rst | 34 + clang/include/clang/Basic/DiagnosticGroups.td | 8 + clang/include/clang/Basic/DiagnosticLexKinds.td | 10 + clang/include/clang/Basic/IdentifierTable.h | 26 +- clang/include/clang/Basic/TargetInfo.h | 11 +- clang/include/clang/Basic/X86Target.def | 51 -- clang/include/clang/Lex/Preprocessor.h | 35 +- clang/lib/Basic/Targets/AMDGPU.cpp | 2 - clang/lib/Basic/Targets/AMDGPU.h | 4 + clang/lib/Basic/Targets/NVPTX.cpp | 2 - clang/lib/Basic/Targets/NVPTX.h | 4 + clang/lib/Basic/Targets/X86.cpp | 34 +- clang/lib/CodeGen/CGBuiltin.cpp | 3 +- clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp | 12 +- clang/lib/Format/ContinuationIndenter.cpp | 7 + clang/lib/Lex/Pragma.cpp | 95 ++- clang/lib/Lex/Preprocessor.cpp | 29 +- clang/test/CodeGen/sanitize-thread-disable.c | 8 +- clang/test/Lexer/Inputs/pedantic-macro-interplay.h | 9 + clang/test/Lexer/Inputs/unsafe-macro-2.h | 70 ++ clang/test/Lexer/Inputs/unsafe-macro.h | 27 + clang/test/Lexer/pedantic-macro-interplay.c | 14 + clang/test/Lexer/unsafe-macro.c | 7 + clang/unittests/Format/FormatTestJS.cpp | 21 + libc/src/__support/ctype_utils.h | 16 +- libc/src/ctype/isalnum.cpp | 4 +- libc/src/ctype/isalpha.cpp | 4 +- libc/src/ctype/isascii.cpp | 4 +- libc/src/ctype/isblank.cpp | 4 +- libc/src/ctype/iscntrl.cpp | 4 +- libc/src/ctype/isdigit.cpp | 4 +- libc/src/ctype/isgraph.cpp | 4 +- libc/src/ctype/islower.cpp | 4 +- libc/src/ctype/isprint.cpp | 4 +- libc/src/ctype/ispunct.cpp | 3 +- libc/src/ctype/isspace.cpp | 4 +- libc/src/ctype/isupper.cpp | 4 +- libc/src/ctype/isxdigit.cpp | 4 +- libc/src/ctype/tolower.cpp | 2 +- libc/src/ctype/toupper.cpp | 2 +- libcxx/include/locale.h | 3 +- lldb/include/lldb/Core/RichManglingContext.h | 3 - lldb/source/Core/RichManglingContext.cpp | 13 - lldb/unittests/Core/RichManglingContextTest.cpp | 8 - llvm/include/llvm/Frontend/OpenMP/OMPGridValues.h | 67 +- llvm/include/llvm/Support/X86TargetParser.def | 87 ++- .../llvm/Transforms/InstCombine/InstCombiner.h | 13 +- llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 2 + llvm/lib/CodeGen/LiveRangeEdit.cpp | 2 +- llvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp | 20 +- llvm/lib/Target/AArch64/AArch64InstrFormats.td | 20 +- llvm/lib/Target/AArch64/AArch64SchedA53.td | 1 + llvm/lib/Target/AArch64/AArch64SchedA55.td | 1 + llvm/lib/Target/AArch64/AArch64SchedA57.td | 1 + llvm/lib/Target/AArch64/AArch64SchedA64FX.td | 1 + llvm/lib/Target/AArch64/AArch64SchedCyclone.td | 1 + llvm/lib/Target/AArch64/AArch64SchedExynosM3.td | 1 + llvm/lib/Target/AArch64/AArch64SchedExynosM4.td | 1 + llvm/lib/Target/AArch64/AArch64SchedExynosM5.td | 1 + llvm/lib/Target/AArch64/AArch64SchedFalkor.td | 1 + llvm/lib/Target/AArch64/AArch64SchedKryo.td | 1 + llvm/lib/Target/AArch64/AArch64SchedTSV110.td | 1 + llvm/lib/Target/AArch64/AArch64SchedThunderX.td | 1 + .../lib/Target/AArch64/AArch64SchedThunderX2T99.td | 1 + .../Target/AArch64/AArch64SchedThunderX3T110.td | 1 + llvm/lib/Target/AArch64/AArch64Schedule.td | 1 + .../Target/AArch64/GISel/AArch64LegalizerInfo.cpp | 4 +- .../AArch64/GISel/AArch64RegisterBankInfo.cpp | 4 +- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 7 +- .../Transforms/InstCombine/InstCombineAddSub.cpp | 10 +- .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 2 +- llvm/lib/Transforms/Scalar/MergeICmps.cpp | 14 +- .../AArch64/GlobalISel/arm64-irtranslator.ll | 13 + .../AArch64/GlobalISel/legalize-llround.mir | 39 + .../GlobalISel/legalizer-info-validation.mir | 5 +- .../CodeGen/AArch64/GlobalISel/regbank-llround.mir | 65 ++ llvm/test/CodeGen/AArch64/pr51516.mir | 208 ++++++ llvm/test/CodeGen/AMDGPU/pr51516.mir | 114 +++ llvm/test/CodeGen/PowerPC/aix-alloca-r31.ll | 96 +++ .../aix-emit-tracebacktable-clobber-register.ll | 3 +- .../Instrumentation/InstrProfiling/platform.ll | 7 + .../Transforms/DeadStoreElimination/noop-stores.ll | 9 +- .../Transforms/InstCombine/minmax-intrinsics.ll | 4 +- .../test/Transforms/InstCombine/reassociate-nuw.ll | 5 +- llvm/test/Transforms/InstCombine/sub.ll | 21 +- .../MergeICmps/X86/split-block-does-work.ll | 2 +- .../llvm-mca/AArch64/Cortex/A55-load-readadv.s | 831 +++++++++++++++++++++ .../llvm-mca/AArch64/Cortex/A55-store-readadv.s | 651 ++++++++++++++++ .../mlir/Dialect/Linalg/IR/LinalgStructuredOps.td | 12 +- mlir/include/mlir/IR/BuiltinTypes.td | 2 +- mlir/include/mlir/Transforms/InliningUtils.h | 13 + mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp | 19 +- mlir/lib/Transforms/Utils/FoldUtils.cpp | 8 + mlir/lib/Transforms/Utils/InliningUtils.cpp | 69 +- mlir/test/Transforms/test-operation-folder.mlir | 12 + mlir/test/lib/Dialect/Test/TestPatterns.cpp | 27 +- .../mlir-linalg-ods-gen/test-linalg-ods-gen.tc | 3 +- .../mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp | 12 +- .../mlir-linalg-ods-yaml-gen.cpp | 8 +- openmp/libomptarget/DeviceRTL/CMakeLists.txt | 11 + openmp/libomptarget/DeviceRTL/src/Mapping.cpp | 16 +- .../libomptarget/deviceRTLs/amdgcn/CMakeLists.txt | 13 +- .../deviceRTLs/amdgcn/src/target_impl.h | 17 +- .../libomptarget/deviceRTLs/nvptx/CMakeLists.txt | 12 +- .../deviceRTLs/nvptx/src/target_impl.h | 17 +- 105 files changed, 2833 insertions(+), 399 deletions(-) create mode 100644 clang/test/Lexer/Inputs/pedantic-macro-interplay.h create mode 100644 clang/test/Lexer/Inputs/unsafe-macro-2.h create mode 100644 clang/test/Lexer/Inputs/unsafe-macro.h create mode 100644 clang/test/Lexer/pedantic-macro-interplay.c create mode 100644 clang/test/Lexer/unsafe-macro.c create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/legalize-llround.mir create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/regbank-llround.mir create mode 100644 llvm/test/CodeGen/AArch64/pr51516.mir create mode 100644 llvm/test/CodeGen/AMDGPU/pr51516.mir create mode 100644 llvm/test/CodeGen/PowerPC/aix-alloca-r31.ll create mode 100644 llvm/test/tools/llvm-mca/AArch64/Cortex/A55-load-readadv.s create mode 100644 llvm/test/tools/llvm-mca/AArch64/Cortex/A55-store-readadv.s