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from 0f194333896 [AArch64] Preserve register flags when promoting a load fro [...] new 7ff8af4ed89 [AMDGPU] SDWA: merge VI and GFX9 pseudo instructions
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Summary of changes: lib/Target/AMDGPU/AMDGPUInstrInfo.cpp | 11 +- lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 23 ++-- .../AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 98 +++++++++----- .../AMDGPU/Disassembler/AMDGPUDisassembler.h | 10 +- .../AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.h | 12 +- lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | 30 ++--- lib/Target/AMDGPU/SIDefines.h | 6 +- lib/Target/AMDGPU/SIInstrInfo.cpp | 71 +++++++++- lib/Target/AMDGPU/SIInstrInfo.h | 3 + lib/Target/AMDGPU/SIInstrInfo.td | 148 +++++++++------------ lib/Target/AMDGPU/SIPeepholeSDWA.cpp | 35 +++-- lib/Target/AMDGPU/VOP1Instructions.td | 16 +-- lib/Target/AMDGPU/VOP2Instructions.td | 33 +---- lib/Target/AMDGPU/VOPCInstructions.td | 28 +--- lib/Target/AMDGPU/VOPInstructions.td | 80 ++++------- 15 files changed, 323 insertions(+), 281 deletions(-)