[Tcwg-commits] [gcc] branch master updated (6c41a912f5e -> 6fbff06f9e3)

10 Dec 2024


      This is an automated email from the git hooks/post-receive script.
unknown user pushed a change to branch master
in repository gcc.
from  6c41a912f5e libstdc++: deprecate is_trivial for C++26 (P3247R2)
       new  a6aa0719aaa RISC-V: Refine unsigned vector SAT_ADD testcase dump check  [...]
       new  aa8c20e32e5 RISC-V: Refine unsigned vector SAT_SUB testcase dump check  [...]
       new  b5c99314b80 RISC-V: Refine unsigned vector SAT_TRUNC testcase dump chec [...]
       new  1850da91610 RISC-V: Refine signed vector SAT_ADD testcase dump check to [...]
       new  75d518100ed RISC-V: Refine signed vector SAT_TRUNC testcase dump check  [...]
       new  6fbff06f9e3 RISC-V: Refine signed vector SAT_SUB testcase dump check to [...]
The 6 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails.  The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-1-s16.c        | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-1-s32.c        | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-1-s64.c        | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-1-s8.c         | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-2-s16.c        | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-2-s32.c        | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-2-s64.c        | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-2-s8.c         | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-3-s16.c        | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-3-s32.c        | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-3-s64.c        | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-3-s8.c         | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-4-s16.c        | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-4-s32.c        | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-4-s64.c        | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_add-4-s8.c         | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i16.c        | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i32.c        | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i64.c        | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-1-i8.c         | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i16.c        | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i32.c        | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i64.c        | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-2-i8.c         | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i16.c        | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i32.c        | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i64.c        | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-3-i8.c         | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i16.c        | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i32.c        | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i64.c        | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_s_sub-4-i8.c         | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i16-to-i8.c           | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i32-to-i16.c          | 4 ++--
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i32-to-i8.c           | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i16.c          | 4 ++--
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i32.c          | 4 ++--
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-1-i64-to-i8.c           | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i16-to-i8.c           | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i32-to-i16.c          | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i32-to-i8.c           | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i16.c          | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i32.c          | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-2-i64-to-i8.c           | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i16-to-i8.c           | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i32-to-i16.c          | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i32-to-i8.c           | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i16.c          | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i32.c          | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-3-i64-to-i8.c           | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i16-to-i8.c           | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i32-to-i16.c          | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i32-to-i8.c           | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i16.c          | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i32.c          | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-4-i64-to-i8.c           | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i16-to-i8.c           | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i32-to-i16.c          | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i32-to-i8.c           | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i16.c          | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i32.c          | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-5-i64-to-i8.c           | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i16-to-i8.c           | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i32-to-i16.c          | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i32-to-i8.c           | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i16.c          | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i32.c          | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-6-i64-to-i8.c           | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i16-to-i8.c           | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i32-to-i16.c          | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i32-to-i8.c           | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i16.c          | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i32.c          | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-7-i64-to-i8.c           | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i16-to-i8.c           | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i32-to-i16.c          | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i32-to-i8.c           | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i16.c          | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i32.c          | 6 +++---
 .../riscv/rvv/autovec/sat/vec_sat_s_trunc-8-i64-to-i8.c           | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-1-u16.c        | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-1-u32.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-1-u64.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-1-u8.c         | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-2-u16.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-2-u32.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-2-u64.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-2-u8.c         | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-3-u16.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-3-u32.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-3-u64.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-3-u8.c         | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-4-u16.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-4-u32.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-4-u64.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-4-u8.c         | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-5-u16.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-5-u32.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-5-u64.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-5-u8.c         | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-6-u16.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-6-u32.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-6-u64.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-6-u8.c         | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-7-u16.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-7-u32.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-7-u64.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-7-u8.c         | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-8-u16.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-8-u32.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-8-u64.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add-8-u8.c         | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-1-u16.c    | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-1-u32.c    | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-1-u64.c    | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-1-u8.c     | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-2-u16.c    | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-2-u32.c    | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-2-u64.c    | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-2-u8.c     | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-3-u16.c    | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-3-u32.c    | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-3-u64.c    | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-3-u8.c     | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-4-u16.c    | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-4-u32.c    | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-4-u64.c    | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_add_imm-4-u8.c     | 4 ++--
 .../riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-1-u16.c     | 4 ++--
 .../riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-1-u32.c     | 4 ++--
 .../riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-1-u64.c     | 4 ++--
 .../riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-1-u8.c      | 4 ++--
 .../riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-2-u16.c     | 4 ++--
 .../riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-2-u32.c     | 4 ++--
 .../riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-2-u64.c     | 4 ++--
 .../riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-2-u8.c      | 4 ++--
 .../riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-3-u16.c     | 4 ++--
 .../riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-3-u32.c     | 4 ++--
 .../riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-3-u64.c     | 4 ++--
 .../riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-3-u8.c      | 4 ++--
 .../riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-4-u16.c     | 4 ++--
 .../riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-4-u32.c     | 4 ++--
 .../riscv/rvv/autovec/sat/vec_sat_u_add_imm_reconcile-4-u8.c      | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-1-u16.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-1-u32.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-1-u64.c        | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-1-u8.c         | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-10-u16.c       | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-10-u32.c       | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-10-u64.c       | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-10-u8.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-2-u16.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-2-u32.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-2-u64.c        | 6 +++---
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-2-u8.c         | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-3-u16.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-3-u32.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-3-u64.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-3-u8.c         | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-4-u16.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-4-u32.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-4-u64.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-4-u8.c         | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-5-u16.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-5-u32.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-5-u64.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-5-u8.c         | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-6-u16.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-6-u32.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-6-u64.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-6-u8.c         | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-7-u16.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-7-u32.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-7-u64.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-7-u8.c         | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-8-u16.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-8-u32.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-8-u64.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-8-u8.c         | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-9-u16.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-9-u32.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-9-u64.c        | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub-9-u8.c         | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_imm-1-u16.c    | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_imm-1-u32.c    | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_imm-1-u64.c    | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_imm-1-u8.c     | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_trunc-1-u16.c  | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_trunc-1-u32.c  | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_trunc-1-u8.c   | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_sub_zip.c          | 8 ++++----
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u16.c      | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u32.c      | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u64.c      | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-1-u8.c       | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u16.c      | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u32.c      | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u64.c      | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-2-u8.c       | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u16.c      | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u32.c      | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u64.c      | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-3-u8.c       | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u16.c      | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u32.c      | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u64.c      | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-4-u8.c       | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u16.c      | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u32.c      | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u64.c      | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-5-u8.c       | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u16.c      | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u32.c      | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u64.c      | 4 ++--
 .../gcc.target/riscv/rvv/autovec/sat/vec_sat_u_trunc-6-u8.c       | 4 ++--
 215 files changed, 512 insertions(+), 512 deletions(-)
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[Tcwg-commits] [gcc] branch master updated (6c41a912f5e -> 6fbff06f9e3)