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from 02972a4b38d [llvm] Remove redundant check-prefix=CHECK from tests. NFC. new 8ab242ce954 [SystemZ] Add support for IBM z14 processor (1/3) new b5bf1de320a [SystemZ] Add support for IBM z14 processor (2/3) new 768246d5dd2 [SystemZ] Add support for IBM z14 processor (3/3)
The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: include/llvm/IR/IntrinsicsSystemZ.td | 43 + lib/Support/Host.cpp | 2 + lib/Target/SystemZ/SystemZFeatures.td | 58 +- lib/Target/SystemZ/SystemZISelLowering.cpp | 104 +- lib/Target/SystemZ/SystemZISelLowering.h | 7 + lib/Target/SystemZ/SystemZInstrFP.td | 88 +- lib/Target/SystemZ/SystemZInstrFormats.td | 330 +- lib/Target/SystemZ/SystemZInstrInfo.cpp | 32 + lib/Target/SystemZ/SystemZInstrInfo.td | 68 +- lib/Target/SystemZ/SystemZInstrSystem.td | 4 + lib/Target/SystemZ/SystemZInstrVector.td | 366 ++- lib/Target/SystemZ/SystemZOperators.td | 20 + lib/Target/SystemZ/SystemZPatterns.td | 7 + lib/Target/SystemZ/SystemZProcessors.td | 3 + lib/Target/SystemZ/SystemZRegisterInfo.td | 14 +- lib/Target/SystemZ/SystemZSchedule.td | 3 +- lib/Target/SystemZ/SystemZScheduleZ14.td | 1611 ++++++++++ lib/Target/SystemZ/SystemZShortenInst.cpp | 40 + lib/Target/SystemZ/SystemZSubtarget.cpp | 4 + lib/Target/SystemZ/SystemZSubtarget.h | 34 + lib/Target/SystemZ/SystemZTargetTransformInfo.cpp | 3 + test/Analysis/CostModel/SystemZ/fp-arith.ll | 53 +- test/CodeGen/SystemZ/branch-11.ll | 56 + test/CodeGen/SystemZ/fp-abs-03.ll | 43 + test/CodeGen/SystemZ/fp-abs-04.ll | 46 + test/CodeGen/SystemZ/fp-add-01.ll | 6 +- test/CodeGen/SystemZ/fp-add-04.ll | 17 + test/CodeGen/SystemZ/fp-cmp-01.ll | 102 +- test/CodeGen/SystemZ/fp-cmp-06.ll | 33 + test/CodeGen/SystemZ/fp-const-11.ll | 40 + test/CodeGen/SystemZ/fp-conv-15.ll | 50 + test/CodeGen/SystemZ/fp-conv-16.ll | 99 + test/CodeGen/SystemZ/fp-copysign-02.ll | 81 + test/CodeGen/SystemZ/fp-div-01.ll | 6 +- test/CodeGen/SystemZ/fp-div-04.ll | 17 + test/CodeGen/SystemZ/fp-move-13.ll | 46 + test/CodeGen/SystemZ/fp-mul-01.ll | 6 +- test/CodeGen/SystemZ/fp-mul-06.ll | 31 +- test/CodeGen/SystemZ/fp-mul-08.ll | 31 +- test/CodeGen/SystemZ/fp-mul-10.ll | 43 + test/CodeGen/SystemZ/fp-mul-11.ll | 32 + test/CodeGen/SystemZ/fp-mul-12.ll | 72 + test/CodeGen/SystemZ/fp-neg-02.ll | 41 + test/CodeGen/SystemZ/fp-round-03.ll | 207 ++ test/CodeGen/SystemZ/fp-sqrt-01.ll | 8 +- test/CodeGen/SystemZ/fp-sqrt-04.ll | 17 + test/CodeGen/SystemZ/fp-sub-01.ll | 6 +- test/CodeGen/SystemZ/fp-sub-04.ll | 17 + test/CodeGen/SystemZ/int-add-17.ll | 95 + test/CodeGen/SystemZ/int-mul-09.ll | 95 + test/CodeGen/SystemZ/int-mul-10.ll | 165 + test/CodeGen/SystemZ/int-mul-11.ll | 32 + test/CodeGen/SystemZ/int-sub-10.ll | 95 + test/CodeGen/SystemZ/tdc-07.ll | 18 + test/CodeGen/SystemZ/vec-abs-06.ll | 47 + test/CodeGen/SystemZ/vec-add-02.ll | 24 + test/CodeGen/SystemZ/vec-and-04.ll | 47 + test/CodeGen/SystemZ/vec-cmp-07.ll | 349 +++ test/CodeGen/SystemZ/vec-ctpop-02.ll | 45 + test/CodeGen/SystemZ/vec-div-02.ll | 24 + .../{vec-intrinsics.ll => vec-intrinsics-01.ll} | 0 test/CodeGen/SystemZ/vec-intrinsics-02.ll | 441 +++ test/CodeGen/SystemZ/vec-max-05.ll | 175 ++ test/CodeGen/SystemZ/vec-min-05.ll | 175 ++ test/CodeGen/SystemZ/vec-move-18.ll | 24 + test/CodeGen/SystemZ/vec-mul-03.ll | 24 + test/CodeGen/SystemZ/vec-mul-04.ll | 31 + test/CodeGen/SystemZ/vec-mul-05.ll | 63 + test/CodeGen/SystemZ/vec-neg-02.ll | 23 + test/CodeGen/SystemZ/vec-or-03.ll | 91 + test/CodeGen/SystemZ/vec-round-02.ll | 118 + test/CodeGen/SystemZ/vec-sqrt-02.ll | 23 + test/CodeGen/SystemZ/vec-sub-02.ll | 31 + test/CodeGen/SystemZ/vec-xor-02.ll | 47 + test/MC/Disassembler/SystemZ/insns-z14.txt | 3253 ++++++++++++++++++++ test/MC/SystemZ/insn-bad-z13.s | 705 +++++ test/MC/SystemZ/insn-bad-z14.s | 752 +++++ test/MC/SystemZ/insn-good-z14.s | 2674 ++++++++++++++++ 78 files changed, 13569 insertions(+), 164 deletions(-) create mode 100644 lib/Target/SystemZ/SystemZScheduleZ14.td create mode 100644 test/CodeGen/SystemZ/branch-11.ll create mode 100644 test/CodeGen/SystemZ/fp-abs-03.ll create mode 100644 test/CodeGen/SystemZ/fp-abs-04.ll create mode 100644 test/CodeGen/SystemZ/fp-add-04.ll create mode 100644 test/CodeGen/SystemZ/fp-cmp-06.ll create mode 100644 test/CodeGen/SystemZ/fp-const-11.ll create mode 100644 test/CodeGen/SystemZ/fp-conv-15.ll create mode 100644 test/CodeGen/SystemZ/fp-conv-16.ll create mode 100644 test/CodeGen/SystemZ/fp-copysign-02.ll create mode 100644 test/CodeGen/SystemZ/fp-div-04.ll create mode 100644 test/CodeGen/SystemZ/fp-move-13.ll create mode 100644 test/CodeGen/SystemZ/fp-mul-10.ll create mode 100644 test/CodeGen/SystemZ/fp-mul-11.ll create mode 100644 test/CodeGen/SystemZ/fp-mul-12.ll create mode 100644 test/CodeGen/SystemZ/fp-neg-02.ll create mode 100644 test/CodeGen/SystemZ/fp-round-03.ll create mode 100644 test/CodeGen/SystemZ/fp-sqrt-04.ll create mode 100644 test/CodeGen/SystemZ/fp-sub-04.ll create mode 100644 test/CodeGen/SystemZ/int-add-17.ll create mode 100644 test/CodeGen/SystemZ/int-mul-09.ll create mode 100644 test/CodeGen/SystemZ/int-mul-10.ll create mode 100644 test/CodeGen/SystemZ/int-mul-11.ll create mode 100644 test/CodeGen/SystemZ/int-sub-10.ll create mode 100644 test/CodeGen/SystemZ/tdc-07.ll create mode 100644 test/CodeGen/SystemZ/vec-abs-06.ll create mode 100644 test/CodeGen/SystemZ/vec-add-02.ll create mode 100644 test/CodeGen/SystemZ/vec-and-04.ll create mode 100644 test/CodeGen/SystemZ/vec-cmp-07.ll create mode 100644 test/CodeGen/SystemZ/vec-ctpop-02.ll create mode 100644 test/CodeGen/SystemZ/vec-div-02.ll rename test/CodeGen/SystemZ/{vec-intrinsics.ll => vec-intrinsics-01.ll} (100%) create mode 100644 test/CodeGen/SystemZ/vec-intrinsics-02.ll create mode 100644 test/CodeGen/SystemZ/vec-max-05.ll create mode 100644 test/CodeGen/SystemZ/vec-min-05.ll create mode 100644 test/CodeGen/SystemZ/vec-move-18.ll create mode 100644 test/CodeGen/SystemZ/vec-mul-03.ll create mode 100644 test/CodeGen/SystemZ/vec-mul-04.ll create mode 100644 test/CodeGen/SystemZ/vec-mul-05.ll create mode 100644 test/CodeGen/SystemZ/vec-neg-02.ll create mode 100644 test/CodeGen/SystemZ/vec-or-03.ll create mode 100644 test/CodeGen/SystemZ/vec-round-02.ll create mode 100644 test/CodeGen/SystemZ/vec-sqrt-02.ll create mode 100644 test/CodeGen/SystemZ/vec-sub-02.ll create mode 100644 test/CodeGen/SystemZ/vec-xor-02.ll create mode 100644 test/MC/Disassembler/SystemZ/insns-z14.txt create mode 100644 test/MC/SystemZ/insn-bad-z14.s create mode 100644 test/MC/SystemZ/insn-good-z14.s