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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_cross/gnu-master-aarch64-build_cross in repository toolchain/ci/qemu.
from 0dab1d36f5 Merge remote-tracking branch 'remotes/stefanha-gitlab/tags/b [...] adds 219729cfbf hw/arm/smmuv3: Another range invalidation fix adds 382c7160d1 hw/intc/arm_gicv3_cpuif: Fix EOIR write access check logic adds b6889c5ae3 hw/arm/mps2-tz: Don't duplicate modelling of SRAM in AN524 adds 902b28ae4e hw/arm/mps2-tz: Make SRAM_ADDR_WIDTH board-specific adds 4eb1770988 hw/arm/armsse.c: Correct modelling of SSE-300 internal SRAMs adds 3296210352 hw/arm/armsse: Convert armsse_realize() to use ERRP_GUARD adds 2f12dca059 hw/arm/mps2-tz: Allow board to specify a boot RAM size adds cbb5638877 hw/arm: Model TCMs in the SSE-300, not the AN547 adds 659f042ba8 target/arm: Use correct SP in M-profile exception return adds 6d24478861 accel/tcg: Replace g_new() + memcpy() by g_memdup() adds 3c4ddec169 accel/tcg: Pass length argument to tlb_flush_range_locked() adds 3960a59f8d accel/tlb: Rename TLBFlushPageBitsByMMUIdxData -> TLBFlushRangeData adds d34e4d1afa accel/tcg: Remove {encode,decode}_pbm_to_runon adds e5b1921bd4 accel/tcg: Add tlb_flush_range_by_mmuidx() adds 600b819f23 accel/tcg: Add tlb_flush_range_by_mmuidx_all_cpus() adds c13b27d826 accel/tlb: Add tlb_flush_range_by_mmuidx_all_cpus_synced() adds 6be48e45ac accel/tcg: Rename tlb_flush_page_bits -> range]_by_mmuidx_async_0 adds 206a583d13 accel/tlb: Rename tlb_flush_[page_bits > range]_by_mmuidx_as [...] adds 84940ed825 target/arm: Add support for FEAT_TLBIRANGE adds 7113d61850 target/arm: Add support for FEAT_TLBIOS adds 7b9171cc83 target/arm: set ID_AA64ISAR0.TLB to 2 for max AARCH64 CPU type adds 2fed21d25b disas/libvixl: Protect C system header for C++ compiler adds 2dc10fa2f9 target/arm: Add ID_AA64ZFR0 fields and isar_feature_aa64_sve2 adds 5dad1ba52f target/arm: Implement SVE2 Integer Multiply - Unpredicated adds d4b1e59d98 target/arm: Implement SVE2 integer pairwise add and accumulate long adds db366da809 target/arm: Implement SVE2 integer unary operations (predicated) adds 8b3f15b0a3 target/arm: Split out saturating/rounding shifts from neon adds 45d9503d0a target/arm: Implement SVE2 saturating/rounding bitwise shift [...] adds a47dc220e9 target/arm: Implement SVE2 integer halving add/subtract (pre [...] adds 8597dc8b86 target/arm: Implement SVE2 integer pairwise arithmetic adds 4f07fbebb1 target/arm: Implement SVE2 saturating add/subtract (predicated) adds 0ce1dda8b6 target/arm: Implement SVE2 integer add/subtract long adds daec426b2d target/arm: Implement SVE2 integer add/subtract interleaved long adds 81fccf0922 target/arm: Implement SVE2 integer add/subtract wide adds 69ccc0991b target/arm: Implement SVE2 integer multiply long adds e3a5613183 target/arm: Implement SVE2 PMULLB, PMULLT adds 4269fef1f9 target/arm: Implement SVE2 bitwise shift left long adds 2df3ca5599 target/arm: Implement SVE2 bitwise exclusive-or interleaved adds cb9c33b817 target/arm: Implement SVE2 bitwise permute adds ed4a638726 target/arm: Implement SVE2 complex integer add adds 38650638fb target/arm: Implement SVE2 integer absolute difference and a [...] adds b8295dfb48 target/arm: Implement SVE2 integer add/subtract long with carry adds a7e3a90e73 target/arm: Implement SVE2 bitwise shift right and accumulate adds fc12b46a46 target/arm: Implement SVE2 bitwise shift and insert adds 289a17976d target/arm: Implement SVE2 integer absolute difference and a [...] adds 5ff2838d3d target/arm: Implement SVE2 saturating extract narrow adds b87dbeebe6 target/arm: Implement SVE2 floating-point pairwise adds 46d111b243 target/arm: Implement SVE2 SHRN, RSHRN adds 81fd3e6e4f target/arm: Implement SVE2 SQSHRUN, SQRSHRUN adds c13418da76 target/arm: Implement SVE2 UQSHRN, UQRSHRN adds 743bb14773 target/arm: Implement SVE2 SQSHRN, SQRSHRN adds 34688dbc1c target/arm: Implement SVE2 WHILEGT, WHILEGE, WHILEHI, WHILEHS adds 14f6dad168 target/arm: Implement SVE2 WHILERW, WHILEWR adds 911cdc6d79 target/arm: Implement SVE2 bitwise ternary operations adds e0ae6ec383 target/arm: Implement SVE2 MATCH, NMATCH adds bfc9307ee1 target/arm: Implement SVE2 saturating multiply-add long adds ab3ddf3185 target/arm: Implement SVE2 saturating multiply-add high adds 45a32e80b9 target/arm: Implement SVE2 integer multiply-add long adds d782d3ca9f target/arm: Implement SVE2 complex integer multiply-add adds 40d5ea508e target/arm: Implement SVE2 ADDHNB, ADDHNT adds 0ea3ff02c2 target/arm: Implement SVE2 RADDHNB, RADDHNT adds c3cd676685 target/arm: Implement SVE2 SUBHNB, SUBHNT adds e9443d1098 target/arm: Implement SVE2 RSUBHNB, RSUBHNT adds 7d47ac94a7 target/arm: Implement SVE2 HISTCNT, HISTSEG adds e6eba6e532 target/arm: Implement SVE2 XAR adds 6ebca45faf target/arm: Implement SVE2 scatter store insns adds cf32744981 target/arm: Implement SVE2 gather load insns adds 4f26756b87 target/arm: Implement SVE2 FMMLA adds 751147928e target/arm: Implement SVE2 SPLICE, EXT adds 77e786bb95 target/arm: Use correct output type for gvec_sdot_*_b adds bc2bd6974e target/arm: Pass separate addend to {U, S}DOT helpers adds 636ddeb15c target/arm: Pass separate addend to FCMLA helpers adds 1c737d9c5f target/arm: Split out formats for 2 vectors + 1 index adds 0a82d963b7 target/arm: Split out formats for 3 vectors + 1 index adds 814d4c521f target/arm: Implement SVE2 integer multiply (indexed) adds 8a02aac740 target/arm: Implement SVE2 integer multiply-add (indexed) adds 75d6d5fc33 target/arm: Implement SVE2 saturating multiply-add high (indexed) adds c5c455d783 target/arm: Implement SVE2 saturating multiply-add (indexed) adds b95f5eebf6 target/arm: Implement SVE2 saturating multiply (indexed) adds 169d7c5825 target/arm: Implement SVE2 signed saturating doubling multiply high adds 1aee2d70e3 target/arm: Implement SVE2 saturating multiply high (indexed) adds d462469fc6 target/arm: Implement SVE2 multiply-add long (indexed) adds d3949c4c7b target/arm: Implement SVE2 integer multiply long (indexed) adds 3b787ed808 target/arm: Implement SVE2 complex integer multiply-add (indexed) adds 21068f3972 target/arm: Implement SVE2 complex integer dot product adds 5c57e3b954 target/arm: Macroize helper_gvec_{s,u}dot_{b,h} adds 7020ffd656 target/arm: Macroize helper_gvec_{s,u}dot_idx_{b,h} adds 2867039a9f target/arm: Implement SVE mixed sign dot product (indexed) adds 6a98cb2ae0 target/arm: Implement SVE mixed sign dot product adds b2bcd1be4b target/arm: Implement SVE2 crypto unary operations adds 3cc7a88e0d target/arm: Implement SVE2 crypto destructive binary operations adds 3358eb3fb7 target/arm: Implement SVE2 crypto constructive binary operations adds 80a712a2be target/arm: Implement SVE2 TBL, TBX adds 5c1b7226f5 target/arm: Implement SVE2 FCVTNT adds 83c2523f80 target/arm: Implement SVE2 FCVTLT adds 9536527731 target/arm: Implement SVE2 FCVTXNT, FCVTX adds 631be02e29 target/arm: Implement SVE2 FLOGB adds c182c6dbd1 target/arm: Share table of sve load functions adds 7924d239f4 target/arm: Tidy do_ldrq adds 12c563f683 target/arm: Implement SVE2 LD1RO adds 74b64b2562 target/arm: Implement 128-bit ZIP, UZP, TRN adds a5421b54c4 target/arm: Implement SVE2 bitwise shift immediate adds 93966af1d3 target/arm: Move endian adjustment macros to vec_internal.h adds 50d102bd42 target/arm: Implement SVE2 fp multiply-add long adds f7da051f5e target/arm: Implement aarch64 SUDOT, USDOT adds 505fce5060 target/arm: Split out do_neon_ddda_fpst adds 25fa6f8341 target/arm: Remove unused fpst from VDOT_scalar adds 64ea60869b target/arm: Fix decode for VDOT (indexed) adds 5a46304c03 target/arm: Split out do_neon_ddda adds f0ad96cb28 target/arm: Split decode of VSDOT and VUDOT adds 51879c671b target/arm: Implement aarch32 VSUDOT, VUSDOT adds 2323c5ffd4 target/arm: Implement integer matrix multiply accumulate adds cdc8d8b273 linux-user/aarch64: Enable hwcap bits for sve2 and related e [...] adds f8680aaa6e target/arm: Enable SVE2 and related extensions adds 92f8c6fef1 Merge remote-tracking branch 'remotes/pmaydell/tags/pull-tar [...] adds 0b84609bbd gitlab: explicitly reference the upstream registry adds 1aab5f0536 gitlab: add special rule for the hexagon container adds 305bea066d gdbstub: Constify GdbCmdParseEntry adds 26a16181fa gdbstub: Replace GdbCmdContext with plain g_array() adds ae49ce0019 hmp-commands: expand type of icount to "l" in replay commands adds ed12f5b4ef gdbstub: tidy away reverse debugging check into function adds a6851b49e3 plugins/syscall: Added a table-like summary output adds 0319ad22bd Merge remote-tracking branch 'remotes/stsquad/tags/pull-test [...]
No new revisions were added by this update.
Summary of changes: .gitlab-ci.d/containers.yml | 31 +- .gitlab-ci.yml | 5 +- accel/tcg/cputlb.c | 231 ++- disas/libvixl/vixl/code-buffer.h | 2 +- disas/libvixl/vixl/globals.h | 16 +- disas/libvixl/vixl/invalset.h | 2 +- disas/libvixl/vixl/platform.h | 2 + disas/libvixl/vixl/utils.cc | 2 +- disas/libvixl/vixl/utils.h | 2 +- gdbstub.c | 343 ++-- hmp-commands.hx | 4 +- hw/arm/armsse.c | 35 +- hw/arm/mps2-tz.c | 39 +- hw/arm/smmuv3.c | 50 +- hw/intc/arm_gicv3_cpuif.c | 48 +- include/exec/exec-all.h | 44 + include/hw/arm/armsse.h | 2 + linux-user/elfload.c | 10 + target/arm/cpu.c | 2 + target/arm/cpu.h | 76 + target/arm/cpu64.c | 14 + target/arm/cpu_tcg.c | 1 + target/arm/helper-sve.h | 722 ++++++++- target/arm/helper.c | 327 +++- target/arm/helper.h | 108 +- target/arm/kvm64.c | 21 +- target/arm/m_helper.c | 3 +- target/arm/neon-shared.decode | 24 +- target/arm/neon_helper.c | 519 ++---- target/arm/sve.decode | 574 ++++++- target/arm/sve_helper.c | 2160 +++++++++++++++++++++++-- target/arm/translate-a64.c | 111 +- target/arm/translate-a64.h | 3 + target/arm/translate-neon.c | 221 +-- target/arm/translate-sve.c | 3214 +++++++++++++++++++++++++++++++++++--- target/arm/vec_helper.c | 805 +++++++--- target/arm/vec_internal.h | 167 ++ tests/plugin/syscall.c | 98 +- 38 files changed, 8563 insertions(+), 1475 deletions(-)