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from d0ae71c26ab RISC-V: Remove unnecessary vread_csr/vwrite_csr intrinsic. new 33b153ff521 RISC-V: Enable basic VLS modes support
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Summary of changes: gcc/config/riscv/autovec-vls.md | 141 ++++++ gcc/config/riscv/riscv-modes.def | 84 ++++ gcc/config/riscv/riscv-opts.h | 4 + gcc/config/riscv/riscv-protos.h | 1 + gcc/config/riscv/riscv-v.cc | 153 ++++++- gcc/config/riscv/riscv-vector-switch.def | 102 +++++ gcc/config/riscv/riscv.cc | 97 +++-- gcc/config/riscv/riscv.md | 10 +- gcc/config/riscv/vector-iterators.md | 476 +++++++++++++++++++++ gcc/config/riscv/vector.md | 237 ++++++++-- .../gcc.target/riscv/rvv/autovec/partial/slp-9.c | 1 + .../gcc.target/riscv/rvv/autovec/vls/def.h | 88 ++++ .../gcc.target/riscv/rvv/autovec/vls/mov-1.c | 179 ++++++++ .../gcc.target/riscv/rvv/autovec/vls/mov-10.c | 139 ++++++ .../gcc.target/riscv/rvv/autovec/vls/mov-11.c | 248 +++++++++++ .../gcc.target/riscv/rvv/autovec/vls/mov-12.c | 229 ++++++++++ .../gcc.target/riscv/rvv/autovec/vls/mov-13.c | 209 +++++++++ .../gcc.target/riscv/rvv/autovec/vls/mov-14.c | 190 ++++++++ .../gcc.target/riscv/rvv/autovec/vls/mov-15.c | 229 ++++++++++ .../gcc.target/riscv/rvv/autovec/vls/mov-16.c | 209 +++++++++ .../gcc.target/riscv/rvv/autovec/vls/mov-17.c | 190 ++++++++ .../gcc.target/riscv/rvv/autovec/vls/mov-2.c | 19 + .../gcc.target/riscv/rvv/autovec/vls/mov-3.c | 166 +++++++ .../gcc.target/riscv/rvv/autovec/vls/mov-4.c | 19 + .../gcc.target/riscv/rvv/autovec/vls/mov-5.c | 152 +++++++ .../gcc.target/riscv/rvv/autovec/vls/mov-6.c | 19 + .../gcc.target/riscv/rvv/autovec/vls/mov-7.c | 139 ++++++ .../gcc.target/riscv/rvv/autovec/vls/mov-8.c | 166 +++++++ .../gcc.target/riscv/rvv/autovec/vls/mov-9.c | 152 +++++++ .../gcc.target/riscv/rvv/autovec/vls/spill-1.c | 133 ++++++ .../gcc.target/riscv/rvv/autovec/vls/spill-2.c | 124 ++++++ .../gcc.target/riscv/rvv/autovec/vls/spill-3.c | 115 +++++ .../gcc.target/riscv/rvv/autovec/vls/spill-4.c | 106 +++++ .../gcc.target/riscv/rvv/autovec/vls/spill-5.c | 124 ++++++ .../gcc.target/riscv/rvv/autovec/vls/spill-6.c | 115 +++++ .../gcc.target/riscv/rvv/autovec/vls/spill-7.c | 106 +++++ gcc/testsuite/gcc.target/riscv/rvv/rvv.exp | 2 + 37 files changed, 4798 insertions(+), 75 deletions(-) create mode 100644 gcc/config/riscv/autovec-vls.md create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/def.h create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-10.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-11.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-12.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-13.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-14.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-15.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-16.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-17.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-6.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-7.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-8.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/mov-9.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/spill-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/spill-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/spill-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/spill-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/spill-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/spill-6.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/vls/spill-7.c