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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allnoconfig in repository toolchain/ci/llvm-project.
from 252a584cbd0 [AMDGPU] Add test adds d8bc6a48eaa [ELF] Do not ICF two sections with different output section [...] adds 8327fed9475 [Clang Interpreter] Initial patch for the constexpr interpreter adds 05a3a927514 [X86] combineHorizontalPredicateResult - pull out repeated [...] adds 1aab62762f6 [lldb][NFC] Add test for source info adds b06b14ba8cf [AST] AST structural equivalence to work internally with pairs. adds da496363bf2 [lldb][NFC] Remove unused imports from TestIntegerTypes.py adds c3bdad8c1e1 Revert [Clang Interpreter] Initial patch for the constexpr [...] adds 43e9ead1edd [llvm-strings][test] Merge two closely related tests adds 1da33fd4eff [ARM64] Simplify RegisterInfos_arm64.h with macro based Reg [...] adds 65d386eac5b [lldb][NFC] Remove unused imports from TestIntegerTypesExpr.py adds 9bc338b89ec [lldb][NFC] Add test for invalid gui command adds 22493f66f16 [DebugInfo] LiveDebugValues: correctly discriminate kinds o [...] adds 528f68144b7 [X86][BtVer2] Fix latency and throughput of conditional SIM [...] adds a1ad72cca7e [unittests][AST] CommentParser: don't name variable 'DEBUG' adds fe2ee4c46a0 [AMDGPU][MC][GFX10] Corrected constant bus limit for 64-bit [...] adds 3f3673ead99 NativeProcessLinux: Remove some register context boilerplate adds a66fc1c99f3 [LLD] [COFF] Demangle itanium symbols in mingw mode adds 40782261aea [llvm-dlltool] Remove support for implying output name adds 1cec6b2970e [llvm-dlltool] Handle external and internal names with diff [...] adds 491fc23a600 [test] [llvm-dlltool] Improve test strictness a little. NFC. adds eafede2afeb [dotest] Add @skipIfCursesSupportMissing and annotate the n [...] adds 561c39994b9 [InstCombine] recognize bswap disguised as shufflevector adds 9c68eddbbe7 [AMDGPU][MC][GFX10] Enabled null with 64-bit operands adds 4b9233cafbd [llvm-nm] - Add a test case for case when we dump a symbol [...] adds b567ce76804 Revert r370661 "[llvm-nm] - Add a test case for case when w [...] adds a291b950dbd [FileCheck] Forbid using var defined on same line adds efa1ca2c25d [FileCheck] Make NumericVariable ctor explicit adds 4aa90ea58ef [AMDGPU][MC][GFX10] Corrected constant bus checks to exclude null adds 6e18266aa4d Partially revert D61491 "AMDGPU: Be explicit about whether [...] adds 4e54cf3e0e7 [DAGCombiner] try to form test+set out of shift+mask patterns adds 78e8011a29d Recommit r370661 "[llvm-nm] - Add a test case for case when [...] adds fb5661a8848 [X86] getPMOVMSKB - add MVT::v64i8 handling and remove from [...] adds 4fa267bcbb6 ThinLTO: Document the option BOOTSTRAP_LLVM_ENABLE_LTO adds da4ef9b4c86 [SVE][Inline-Asm] Support for SVE asm operands adds b21e2457114 [SystemZ] Support constrained fpto[su]i intrinsics adds 13190c42253 [TargetLowering][PS4] Add sincos(f) lib functions when targ [...] adds a95ec59fa5e [ARM] Use MQPR not QPR for MVE registers adds d94b42f4228 [Wdocumentation] fixes an assertion failure with typedefed [...] adds a5fd8d8f47d [ARM] MVE predicate bitcast test and VPSEL adjustment. NFC adds 45cd1851097 [X86] Enable fp128 as a legal type with SSE1 rather than with MMX. adds cacf4db571d [CostModel][X86] Add scalar sext/zext cost tests adds 34a38a3b543 Split -Wreorder into different warnings for reordering a co [...] adds ea366122d28 Rename -Wc++20-designator to -Wc++2a-designator for consist [...] adds dea9cad10e0 [x86] Fix bugs of some intrinsic functions in CLANG : _mm51 [...] adds dcecc7ea468 [X86] Custom promote i32->f80 uint_to_fp on AVX512 64-bit targets. adds 9c74c774044 [LegalizeDAG] Pass DAG to two calls to SDNode::dump in debu [...] adds f255f443361 [X86] Add an exhaustive test for i32 fptosi/fptoui across d [...] adds 9dc8c448ed4 [X86] Don't use Expand for i32 fp_to_uint on SSE1/2 targets [...] adds b915109043d [X86] Simplify the setOperationAction handling for fp_to_ui [...] adds 13edbbe2faa [lldb][NFC] Remove setup boilerplate from types/ tests adds 8b2df85d023 [ARM] Select vmla adds 935499579c2 [MachinePipeliner] Add a way to unit-test the schedule emitter adds b10a433da85 [lldb][NFC] Unify log files in commands/log/basic adds 0469b0e4ef7 [LV] Tail-folding with runtime memory checks new 03c9e139c7a [RISCV] Correct Logic around ilp32e macros new 718f909ccd0 [LV] Tail-folding, runtime scev checks new d77ea5b297a [lldb] Test 'command' commands and fix the found crashes new 7a65f5ebee3 [ARM NEON] Avoid duplicated decarations new e76113347de [lldb][NFC] Also test unaliasing in nested_alias test new b78900e0ab5 [lldb][NFC] Simplify script_alias test new 253eecf525f [lldb][NFC] Remove unnecessary constructors from invalid-ar [...] new 0760d348eb7 [LV] Precommit test case showing miscompile from PR43166. NFC new dd18ce4501e [LV] Fix miscompiles by adding non-header PHI nodes to AllowedExit new 07ae1bd711a [lldb][NFC] Test that enabling all log options doesn't cras [...] new 855caf2335c [ARM] More MVE load/store tests for offsets around the nega [...] new 39bf484d92b Bug fix on function epilog optimization (ARM backend) new 3be2df2418e [ARM][MVE] Decoding of VMSR doesn't diagnose some unpredict [...] new 3e8d5f335da [ARM] Fix MVE ldst offset ranges
The 14 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: clang/docs/ThinLTO.rst | 4 + clang/include/clang/AST/ASTStructuralEquivalence.h | 19 +- clang/include/clang/Basic/DiagnosticGroups.td | 8 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 4 +- clang/lib/AST/ASTStructuralEquivalence.cpp | 46 +- clang/lib/AST/CommentSema.cpp | 8 + clang/lib/Basic/Targets/RISCV.cpp | 5 +- clang/lib/Headers/avx512fintrin.h | 6 +- clang/test/CodeGen/avx512f-builtins.c | 17 + clang/test/Sema/warn-documentation.cpp | 31 + clang/test/Sema/warn-documentation.m | 8 + .../test/SemaCXX/cxx2a-initializer-aggregates.cpp | 19 +- clang/unittests/AST/CommentParser.cpp | 4 +- clang/unittests/AST/StructuralEquivalenceTest.cpp | 122 +++ clang/utils/TableGen/NeonEmitter.cpp | 25 +- lld/COFF/Symbols.cpp | 13 +- lld/ELF/Driver.cpp | 20 + lld/ELF/ICF.cpp | 17 +- lld/ELF/LinkerScript.cpp | 82 +- lld/ELF/LinkerScript.h | 1 + lld/ELF/Writer.cpp | 36 +- lld/ELF/Writer.h | 2 + lld/test/COFF/undefined-symbol-itanium-i386.s | 36 + lld/test/COFF/undefined-symbol-itanium.s | 36 + lld/test/ELF/linkerscript/early-assign-symbol.s | 11 +- lld/test/ELF/linkerscript/icf-output-sections.s | 46 + lld/test/ELF/linkerscript/subalign.s | 12 +- .../command/invalid-args/TestInvalidArgsCommand.py | 58 ++ .../command/nested_alias/TestNestedAlias.py | 9 + .../command/script_alias/TestCommandScriptAlias.py | 5 +- .../invalid-args/TestInvalidArgsExpression.py | 3 - .../test/commands/gui/basic/TestGuiBasic.py | 1 + .../gui/invalid-args/TestInvalidArgsGui.py | 13 + .../test/commands/log/basic/TestLogging.py | 27 +- .../log/invalid-args/TestInvalidArgsLog.py | 3 - .../invalid-args/TestInvalidArgsReproducer.py | 3 - .../lldbsuite/test/commands/source/info/Makefile | 3 + .../source/info/TestSourceInfo.py} | 0 .../lldbsuite/test/commands/source/info/main.cpp | 14 + .../lldbsuite/test/commands/source/info/second.cpp | 5 + lldb/packages/Python/lldbsuite/test/decorators.py | 15 +- .../Python/lldbsuite/test/types/TestDoubleTypes.py | 8 - .../lldbsuite/test/types/TestDoubleTypesExpr.py | 8 - .../Python/lldbsuite/test/types/TestFloatTypes.py | 8 - .../lldbsuite/test/types/TestFloatTypesExpr.py | 8 - .../lldbsuite/test/types/TestIntegerTypes.py | 14 - .../lldbsuite/test/types/TestIntegerTypesExpr.py | 15 - .../lldbsuite/test/types/TestRecursiveTypes.py | 5 +- lldb/source/API/SBDebugger.cpp | 7 + lldb/source/Commands/CommandObjectCommands.cpp | 13 + .../Process/Linux/NativeRegisterContextLinux.cpp | 54 +- .../Process/Linux/NativeRegisterContextLinux.h | 14 +- .../Linux/NativeRegisterContextLinux_arm.cpp | 48 +- .../Process/Linux/NativeRegisterContextLinux_arm.h | 8 +- .../Linux/NativeRegisterContextLinux_arm64.cpp | 50 +- .../Linux/NativeRegisterContextLinux_arm64.h | 8 +- .../Linux/NativeRegisterContextLinux_ppc64le.cpp | 28 - .../Linux/NativeRegisterContextLinux_ppc64le.h | 8 - .../Linux/NativeRegisterContextLinux_s390x.cpp | 81 +- .../Linux/NativeRegisterContextLinux_s390x.h | 17 +- .../Plugins/Process/Utility/RegisterInfos_arm64.h | 439 +++++---- llvm/docs/CommandGuide/FileCheck.rst | 2 +- llvm/docs/LangRef.rst | 5 +- llvm/include/llvm/CodeGen/MachineInstr.h | 4 +- llvm/include/llvm/CodeGen/ModuloSchedule.h | 18 + llvm/include/llvm/InitializePasses.h | 1 + llvm/include/llvm/Support/FileCheck.h | 39 +- llvm/include/llvm/Target/TargetSelectionDAG.td | 10 + .../Vectorize/LoopVectorizationLegality.h | 4 +- llvm/lib/CodeGen/CodeGen.cpp | 1 + llvm/lib/CodeGen/MachineCSE.cpp | 8 +- llvm/lib/CodeGen/MachineInstr.cpp | 16 +- llvm/lib/CodeGen/MachinePipeliner.cpp | 13 + llvm/lib/CodeGen/ModuloSchedule.cpp | 114 +++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 57 ++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 4 +- llvm/lib/CodeGen/TargetLoweringBase.cpp | 5 + llvm/lib/Object/ObjectFile.cpp | 4 +- llvm/lib/Support/FileCheck.cpp | 42 +- llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp | 25 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 11 + llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 10 + llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 50 + .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 38 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 5 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 2 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 5 +- llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp | 8 +- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp | 37 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 6 +- llvm/lib/Target/ARM/ARMInstrMVE.td | 195 ++-- llvm/lib/Target/ARM/ARMInstrVFP.td | 54 +- llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 16 + llvm/lib/Target/SystemZ/SystemZInstrFP.td | 24 +- llvm/lib/Target/SystemZ/SystemZInstrVector.td | 8 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 93 +- llvm/lib/Target/X86/X86InstrSSE.td | 18 +- llvm/lib/Target/X86/X86SchedBroadwell.td | 8 +- llvm/lib/Target/X86/X86SchedHaswell.td | 8 +- llvm/lib/Target/X86/X86SchedSandyBridge.td | 8 +- llvm/lib/Target/X86/X86SchedSkylakeClient.td | 8 +- llvm/lib/Target/X86/X86SchedSkylakeServer.td | 8 +- llvm/lib/Target/X86/X86Schedule.td | 24 +- llvm/lib/Target/X86/X86ScheduleAtom.td | 6 +- llvm/lib/Target/X86/X86ScheduleBdVer2.td | 6 +- llvm/lib/Target/X86/X86ScheduleBtVer2.td | 19 +- llvm/lib/Target/X86/X86ScheduleSLM.td | 8 +- llvm/lib/Target/X86/X86ScheduleZnver1.td | 8 +- llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 4 + .../lib/ToolDrivers/llvm-dlltool/DlltoolDriver.cpp | 25 +- .../Transforms/InstCombine/InstCombineCasts.cpp | 16 + .../Vectorize/LoopVectorizationLegality.cpp | 1 + llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 9 +- llvm/test/Analysis/CostModel/X86/extend.ll | 158 +++ .../CodeGen/AArch64/aarch64-sve-asm-negative.ll | 12 + llvm/test/CodeGen/AArch64/aarch64-sve-asm.ll | 44 + llvm/test/CodeGen/AArch64/arm64-inline-asm.ll | 2 + llvm/test/CodeGen/AMDGPU/global-constant.ll | 42 +- .../AMDGPU/no-initializer-constant-addrspace.ll | 2 +- .../CodeGen/AMDGPU/r600-constant-array-fixup.ll | 4 +- llvm/test/CodeGen/ARM/fold-stack-adjust.ll | 13 + .../CodeGen/Hexagon/pipeliner/swp-phi-start.mir | 151 +++ llvm/test/CodeGen/Hexagon/tstbit.ll | 47 +- llvm/test/CodeGen/SystemZ/fp-strict-conv-09.ll | 40 + llvm/test/CodeGen/SystemZ/fp-strict-conv-10.ll | 95 ++ llvm/test/CodeGen/SystemZ/fp-strict-conv-11.ll | 40 + llvm/test/CodeGen/SystemZ/fp-strict-conv-12.ll | 94 ++ llvm/test/CodeGen/SystemZ/fp-strict-conv-14.ll | 77 ++ llvm/test/CodeGen/SystemZ/fp-strict-conv-16.ll | 63 ++ llvm/test/CodeGen/SystemZ/vec-strict-conv-01.ll | 67 ++ llvm/test/CodeGen/SystemZ/vec-strict-conv-03.ll | 29 + llvm/test/CodeGen/Thumb2/mve-ldst-offset.ll | 468 ++++++++- llvm/test/CodeGen/Thumb2/mve-ldst-postinc.ll | 417 ++++++++ llvm/test/CodeGen/Thumb2/mve-ldst-preinc.ll | 417 ++++++++ llvm/test/CodeGen/Thumb2/mve-loadstore.ll | 6 +- llvm/test/CodeGen/Thumb2/mve-phireg.ll | 113 +++ llvm/test/CodeGen/Thumb2/mve-pred-bitcast.ll | 173 ++++ llvm/test/CodeGen/Thumb2/mve-vmla.ll | 80 ++ llvm/test/CodeGen/Thumb2/mve-vpsel.ll | 40 +- llvm/test/CodeGen/X86/atomic-non-integer-fp128.ll | 35 + llvm/test/CodeGen/X86/atomic-non-integer.ll | 74 +- llvm/test/CodeGen/X86/atomicf128.ll | 32 +- llvm/test/CodeGen/X86/extract-store.ll | 99 +- llvm/test/CodeGen/X86/fp128-cast.ll | 216 +---- llvm/test/CodeGen/X86/fp128-select.ll | 60 +- llvm/test/CodeGen/X86/scalar-fp-to-i32.ll | 1024 ++++++++++++++++++++ llvm/test/CodeGen/X86/scalar-int-to-fp.ll | 22 +- llvm/test/CodeGen/X86/sincos-opt.ll | 27 + llvm/test/CodeGen/X86/test-vs-bittest.ll | 37 +- llvm/test/CodeGen/X86/vec_fp_to_int.ll | 32 +- llvm/test/DebugInfo/MIR/X86/machine-cse.mir | 218 +++++ llvm/test/FileCheck/numeric-expression.txt | 28 +- llvm/test/MC/AMDGPU/gfx10-constant-bus.s | 20 +- llvm/test/MC/AMDGPU/reg-syntax-extra.s | 8 + llvm/test/MC/AMDGPU/vop3-literal.s | 4 - .../test/MC/Disassembler/ARM/vmrs-vmsr-invalid.txt | 178 ++++ llvm/test/Transforms/InstCombine/bswap.ll | 19 +- .../LoopVectorize/pr43166-fold-tail-by-masking.ll | 165 ++++ llvm/test/tools/llvm-dlltool/coff-decorated.def | 37 +- llvm/test/tools/llvm-dlltool/coff-exports.def | 16 +- llvm/test/tools/llvm-dlltool/coff-noname.def | 12 +- .../tools/llvm-mca/X86/BtVer2/resources-avx1.s | 22 +- .../tools/llvm-mca/X86/BtVer2/resources-sse2.s | 6 +- llvm/test/tools/llvm-nm/format-sysv-section.test | 30 +- llvm/test/tools/llvm-strings/eof-no-string.test | 5 - llvm/test/tools/llvm-strings/eof.test | 10 +- llvm/unittests/Support/FileCheckTest.cpp | 49 +- 167 files changed, 6362 insertions(+), 1573 deletions(-) create mode 100644 lld/test/COFF/undefined-symbol-itanium-i386.s create mode 100644 lld/test/COFF/undefined-symbol-itanium.s create mode 100644 lld/test/ELF/linkerscript/icf-output-sections.s create mode 100644 lldb/packages/Python/lldbsuite/test/commands/command/invalid-ar [...] create mode 100644 lldb/packages/Python/lldbsuite/test/commands/gui/invalid-args/T [...] create mode 100644 lldb/packages/Python/lldbsuite/test/commands/source/info/Makefile copy lldb/packages/Python/lldbsuite/test/{lang/c/struct_types/TestStructTypes.py = [...] create mode 100644 lldb/packages/Python/lldbsuite/test/commands/source/info/main.cpp create mode 100644 lldb/packages/Python/lldbsuite/test/commands/source/info/second.cpp create mode 100644 llvm/test/CodeGen/AArch64/aarch64-sve-asm-negative.ll create mode 100644 llvm/test/CodeGen/AArch64/aarch64-sve-asm.ll create mode 100644 llvm/test/CodeGen/Hexagon/pipeliner/swp-phi-start.mir create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-conv-09.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-conv-10.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-conv-11.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-conv-12.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-conv-14.ll create mode 100644 llvm/test/CodeGen/SystemZ/fp-strict-conv-16.ll create mode 100644 llvm/test/CodeGen/SystemZ/vec-strict-conv-01.ll create mode 100644 llvm/test/CodeGen/SystemZ/vec-strict-conv-03.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-phireg.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-pred-bitcast.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-vmla.ll create mode 100644 llvm/test/CodeGen/X86/atomic-non-integer-fp128.ll create mode 100644 llvm/test/CodeGen/X86/scalar-fp-to-i32.ll create mode 100644 llvm/test/DebugInfo/MIR/X86/machine-cse.mir create mode 100644 llvm/test/MC/Disassembler/ARM/vmrs-vmsr-invalid.txt create mode 100644 llvm/test/Transforms/LoopVectorize/pr43166-fold-tail-by-masking.ll delete mode 100644 llvm/test/tools/llvm-strings/eof-no-string.test