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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allmodconfig in repository toolchain/ci/llvm-project.
from fef62e1a684 [OpenMP] FreeBSD address check if mapped more native adds 6195ed83978 [X86] Match (or (and A, B), (andn (A, C))) to VPTERNLOG wit [...] adds 0ac4aacea83 [X86] Enable canonicalizeBitSelect for AVX512 since we can [...] adds b6a2207ba23 [X86] Move bitselect matching to vpternlog into X86ISelDAGT [...] adds 494bfd9fed4 [X86] Enable isel to fold broadcast loads that have been bi [...] adds ac5969933ab [Docs] Adds sections for Command Line and LibFuzzer articles adds 2b4fa5348ee For P0784R7: compute whether a variable has constant destru [...] adds 4566f87649c Fix checking for permitted results of constant expressions. adds 1e8c0850b1f For now, disallow lifetime-extended temporaries with non-tr [...] adds 9bc1c6ecc56 [cxx_status] Mark P0784R7 as partially complete. adds 120a5e9a745 [ARM] Cortex-M4 schedule additions adds 72b544e656b [PowerPC] Fix conditions of assert in PPCAsmPrinter adds 83476b813e2 [clang-format] Reference qualifiers in member templates cau [...] adds 8b1eeafb913 [SLP] Fix for PR31847: Assertion failed: (isLoopInvariant(O [...] adds d30093bb8a3 [DivRemPairs] Don't assert that we won't ever get expanded- [...] adds c5133606627 [MC] Emit unused undefined symbol even if its binding is not set adds eb78dea4ccd [Docs] Moves article links to new pages adds a6d9d31279c [LLVM-C][Ocaml] Add MergeFunctions and DCE pass adds aabf8cbfca8 Add test case peeking through vector concat when combining [...] adds 0e3f6591371 [X86] Add custom isel logic to match VPTERNLOG from 2 logic ops. new 00966d1791f Don't crash if a variable with a constexpr destructor has a [...]
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Summary of changes: clang/include/clang/AST/Decl.h | 28 +- clang/include/clang/Basic/DiagnosticASTKinds.td | 9 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 2 + clang/lib/AST/ASTContext.cpp | 2 +- clang/lib/AST/Decl.cpp | 12 + clang/lib/AST/ExprConstant.cpp | 223 ++++++--- clang/lib/AST/Interp/Interp.cpp | 2 +- clang/lib/AST/TextNodeDumper.cpp | 2 + clang/lib/CodeGen/CGCall.cpp | 2 +- clang/lib/CodeGen/CGClass.cpp | 2 +- clang/lib/CodeGen/CGDecl.cpp | 15 +- clang/lib/CodeGen/CGDeclCXX.cpp | 11 +- clang/lib/CodeGen/CodeGenModule.cpp | 4 +- clang/lib/CodeGen/ItaniumCXXABI.cpp | 2 +- clang/lib/Format/TokenAnnotator.cpp | 25 +- clang/lib/Sema/SemaDeclCXX.cpp | 14 + clang/lib/Serialization/ASTReaderDecl.cpp | 5 +- clang/lib/Serialization/ASTWriterDecl.cpp | 11 +- .../test/CXX/dcl.dcl/dcl.spec/dcl.constexpr/p9.cpp | 17 + clang/test/CXX/expr/expr.const/p6-2a.cpp | 43 ++ clang/test/CodeGenCXX/attr-no-destroy-d54344.cpp | 1 + clang/test/CodeGenCXX/const-init-cxx2a.cpp | 57 ++- clang/test/CodeGenCXX/no_destroy.cpp | 8 +- clang/test/CodeGenCXX/non-const-init-cxx2a.cpp | 19 + clang/test/SemaCXX/constant-expression-cxx1y.cpp | 19 + clang/test/SemaCXX/constant-expression-cxx2a.cpp | 28 ++ clang/unittests/Format/FormatTest.cpp | 68 +++ clang/www/cxx_status.html | 2 +- lld/test/ELF/ppc64-abs64-dyn.s | 8 +- lld/test/ELF/ppc64-relocs.s | 4 +- llvm/bindings/ocaml/transforms/ipo/ipo_ocaml.c | 6 + llvm/bindings/ocaml/transforms/ipo/llvm_ipo.ml | 3 + llvm/bindings/ocaml/transforms/ipo/llvm_ipo.mli | 5 + .../transforms/scalar_opts/llvm_scalar_opts.ml | 3 + .../transforms/scalar_opts/llvm_scalar_opts.mli | 5 + .../transforms/scalar_opts/scalar_opts_ocaml.c | 5 + llvm/docs/ProgrammingDocumentation.rst | 35 +- llvm/docs/Reference.rst | 24 +- llvm/docs/SubsystemDocumentation.rst | 28 +- llvm/docs/_templates/indexsidebar.html | 2 + llvm/docs/index.rst | 3 - llvm/include/llvm-c/Transforms/IPO.h | 3 + llvm/include/llvm-c/Transforms/Scalar.h | 3 + .../llvm/Transforms/Vectorize/SLPVectorizer.h | 9 +- llvm/lib/MC/ELFObjectWriter.cpp | 3 - llvm/lib/Target/ARM/ARMInstrFormats.td | 1 + llvm/lib/Target/ARM/ARMInstrInfo.td | 18 +- llvm/lib/Target/ARM/ARMInstrThumb2.td | 3 +- llvm/lib/Target/ARM/ARMInstrVFP.td | 11 +- llvm/lib/Target/ARM/ARMScheduleM4.td | 24 +- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 2 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 131 +++++ llvm/lib/Target/X86/X86ISelLowering.cpp | 12 +- llvm/lib/Target/X86/X86InstrAVX512.td | 203 ++++++++ llvm/lib/Transforms/IPO/IPO.cpp | 4 + llvm/lib/Transforms/Scalar/DivRemPairs.cpp | 2 - llvm/lib/Transforms/Scalar/Scalar.cpp | 4 + llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 152 +++--- .../CodeGen/ARM/ParallelDSP/complex_dot_prod.ll | 6 +- .../CodeGen/ARM/ParallelDSP/multi-use-loads.ll | 52 +- .../CodeGen/ARM/ParallelDSP/unroll-n-jam-smlad.ll | 1 - llvm/test/CodeGen/X86/avx512-cvt.ll | 17 +- llvm/test/CodeGen/X86/avx512-gfni-intrinsics.ll | 144 +++--- llvm/test/CodeGen/X86/combine-bitselect.ll | 18 +- llvm/test/CodeGen/X86/machine-combiner-int-vec.ll | 117 +++-- llvm/test/CodeGen/X86/midpoint-int-vec-128.ll | 12 +- llvm/test/CodeGen/X86/midpoint-int-vec-256.ll | 24 +- llvm/test/CodeGen/X86/midpoint-int-vec-512.ll | 84 ++-- llvm/test/CodeGen/X86/sadd_sat_vec.ll | 57 ++- llvm/test/CodeGen/X86/ssub_sat_vec.ll | 57 ++- llvm/test/CodeGen/X86/vec-copysign-avx512.ll | 89 +--- llvm/test/CodeGen/X86/vec_int_to_fp.ll | 16 +- llvm/test/CodeGen/X86/vector-bitreverse.ll | 43 +- llvm/test/CodeGen/X86/vector-fshl-128.ll | 55 ++- llvm/test/CodeGen/X86/vector-fshl-256.ll | 64 ++- llvm/test/CodeGen/X86/vector-fshl-512.ll | 98 ++-- llvm/test/CodeGen/X86/vector-fshl-rot-128.ll | 39 +- llvm/test/CodeGen/X86/vector-fshl-rot-256.ll | 79 +-- llvm/test/CodeGen/X86/vector-fshl-rot-512.ll | 112 ++--- llvm/test/CodeGen/X86/vector-fshr-128.ll | 55 ++- llvm/test/CodeGen/X86/vector-fshr-256.ll | 84 +++- llvm/test/CodeGen/X86/vector-fshr-512.ll | 196 ++++---- llvm/test/CodeGen/X86/vector-fshr-rot-128.ll | 39 +- llvm/test/CodeGen/X86/vector-fshr-rot-256.ll | 83 ++-- llvm/test/CodeGen/X86/vector-fshr-rot-512.ll | 152 +++--- llvm/test/CodeGen/X86/vector-idiv-sdiv-512.ll | 6 +- llvm/test/CodeGen/X86/vector-rotate-128.ll | 116 ++++- llvm/test/CodeGen/X86/vector-rotate-256.ll | 107 +++-- llvm/test/CodeGen/X86/vector-rotate-512.ll | 138 +++--- llvm/test/CodeGen/X86/vector-shift-ashr-128.ll | 3 +- llvm/test/CodeGen/X86/vector-shift-ashr-256.ll | 18 +- llvm/test/CodeGen/X86/vector-shift-ashr-512.ll | 18 +- llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll | 9 +- llvm/test/CodeGen/X86/vector-shuffle-combining.ll | 71 +++ llvm/test/MC/ELF/undef.s | 22 + llvm/test/MC/ELF/weakref.s | 9 + .../DivRemPairs/X86/div-expanded-rem-pair.ll | 36 ++ .../SLPVectorizer/AArch64/gather-root.ll | 102 ++-- .../Transforms/SLPVectorizer/AArch64/horizontal.ll | 16 - .../SLPVectorizer/AArch64/spillcost-di.ll | 4 +- llvm/test/Transforms/SLPVectorizer/X86/PR31847.ll | 153 ++++++ .../test/Transforms/SLPVectorizer/X86/PR35628_1.ll | 13 +- .../test/Transforms/SLPVectorizer/X86/PR35628_2.ll | 5 - llvm/test/Transforms/SLPVectorizer/X86/PR39774.ll | 72 +-- llvm/test/Transforms/SLPVectorizer/X86/PR40310.ll | 16 - .../Transforms/SLPVectorizer/X86/bad-reduction.ll | 28 -- .../SLPVectorizer/X86/horizontal-list.ll | 354 +------------- .../SLPVectorizer/X86/horizontal-minmax.ll | 476 ++++-------------- .../Transforms/SLPVectorizer/X86/horizontal.ll | 148 ------ .../Transforms/SLPVectorizer/X86/long_chains.ll | 8 +- .../SLPVectorizer/X86/reassociated-loads.ll | 31 -- .../SLPVectorizer/X86/reduction_loads.ll | 24 - .../SLPVectorizer/X86/reduction_unrolled.ll | 35 +- .../Transforms/SLPVectorizer/X86/remark_horcost.ll | 4 - .../SLPVectorizer/X86/reorder_repeated_ops.ll | 22 - .../Transforms/SLPVectorizer/X86/undef_vect.ll | 10 - .../SLPVectorizer/X86/used-reduced-op.ll | 529 +++++++++++++++++++++ .../SLPVectorizer/X86/vectorize-reorder-reuse.ll | 42 -- 118 files changed, 3281 insertions(+), 2506 deletions(-) create mode 100644 clang/test/CXX/expr/expr.const/p6-2a.cpp create mode 100644 clang/test/CodeGenCXX/non-const-init-cxx2a.cpp create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/PR31847.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/used-reduced-op.ll