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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allmodconfig in repository toolchain/ci/llvm-project.
from a35b7288b13 [IR] Change maybeSetDSOLocal to isImplicitDSOLocal adds 3adcc78a807 [objc_direct] Small updates to help with adoption. adds c636f694c0f [X86] Add more avx512 instrutions to llvm-mca resource tests adds 20c5968e095 [X86] Increase latency of port5 masked compares and kshift/ [...] adds fb44b9db95a [OpenCL][CUDA][HIP][SYCL] Add norecurse adds 04377a81aee [Powerpc] set instruction count as lsr first priority of lsr. adds e8e078c8bf7 [gn build] use -Xclang form for fdebug-comp-dir for now adds 1b978ddba05 [CUDA][HIP][OpenMP] Emit deferred diagnostics by a post-par [...] adds 044d40ed46a AMDGPU/GlobalISel: Move lambdas to normal function adds 24c156194bf AMDGPU/GlobalISel: Add some missing tests for non-power-of-2 cases adds 295bbea3ede AMDGPU/GlobalISel: Fix non-power-of-2 G_SITOFP/G_UITOFP adds 464729cf7c5 [X86] Remove unnecessary check for null SDValue. NFC adds c7fa409bcad [CUDA][HIP][OpenMP] Add lib/Sema/UsedDeclVisitor.h after D70172 adds dd0b18e1ecc [X86] Disable load folding for X86ISD::ADD with 128 as an i [...] adds 7a551600d1a [mlir] Address post commit feedback of D73590 for SymbolsAn [...] adds 487fcc8d3de Fix `-Wpedantic` warning. NFC. adds 1ae05a3c669 [NFC][PowerPC] Add a new test case scalar-equal.ll adds 113df90388d [PowerPC] Add the missing InstrAliasing for 64-bit rotate i [...] adds dd8a2013dc1 [MC] Delete two unused MCCodePadder functions missed by D71106 adds f4e920720da [NFC][PowerPC] Update the test case scalar-equal.ll adds cfb29e4a54b [lldb] Fix some tests failing with gmodules after change to [...] adds 7ae1347fb25 clang analyzer: Fix the webpage rendering adds a02056c9607 [X86] New test to check rev16 patterns, prep step for D74032. NFC. adds 3e1090922a0 [NFCI][DebugInfo]: Corrected a Typo. adds 516ba158b68 [lldb] [nfc] Simplify user_id_t -> size_t adds 377b0e2b06f [TableGen] Don't elide bitconverts in PatFrag fragments. adds e5043cd3c26 [AArch64] Fix small typos in the target description. NFC. adds 633db60f3ed [AArch64][SVE] Add SVE index intrinsic adds aedc196101e [lldb/lldb-server] Add target.xml support for qXfer request. adds c1121908aac [LLDB] Add DynamicLoaderWasmDYLD plugin for WebAssembly debugging adds 0ac4f6b627e [ARM] MVE vector reduce MLA tests. NFC. adds d41d5286485 [lldb] Add @skipIfXmlSupportMissing to TestWasm.py adds 0e1da1ef4af [LLDB] Fix GCC warnings about extra semicolons. NFC. adds 801627ee490 [CMake] Explicitly specify paths to libc++abi in CrossWinTo [...] adds 07355c1c08b [lldb] Delete register info definitions in the x86_64 ABI classes adds 35367e06b84 Revert "[CMake] Explicitly specify paths to libc++abi in Cr [...] adds 67f63f3f7c2 [lldb/DWARF] Re-enable basic dwp support adds b2d64b698f8 [lldb] Fix build error from 07355c1c08b adds d4741c44ab4 [ASTImporter] Added visibility check for scoped enums. adds 6704960f7c2 [ADT] Use inherited ctors to forward to base. NFCI. adds 1e926a9f9c5 [AMDGPU] Fix some tests that did not specify -mcpu adds 323db5d666c GlobalISel: Add matcher for G_LSHR adds 361f2a78185 AMDGPU/GlobalISel: Handle sbfe/ubfe intrinsic adds e5805529bf0 AMDGPU/GlobalISel: Select v2s32->v2s16 G_TRUNC adds 8b60ba73af4 [libc++] Add availability markup for std::to_chars on Apple [...] adds 5fc5c7db386 Strength reduce vectors into arrays. NFCI. adds f4c59c0f97c [wasm] Unbreak after 5fc5c7db38672c8962879b6fdce68393181c5e [...] adds dad5f00e3b4 [DAGCombine] Combine pattern for REV16 adds 0acd7e02f29 [mlir] Linalg: Extend promotion to non f32 buffers. adds a7a96c726e8 [AArch64] Implement passing SVE vectors by ref for AAPCS. adds f128f442a3d [CMake] Fix setting result of libatomic check for MSVC adds 21780888791 Separate DIERef vs. user_id_t: m_function_scope_qualified_name_map adds 5fdc9851d06 AMDGPU/GlobalISel: Run the localizer pass adds dd4d0937620 [ARM] Add initial support for Custom Datapath Extension (CDE) adds af8b0cd58db [clang][Index] Visit the default parameter arguements in libindex. adds 86813e2768e AMDGPU/GlobalISel: Select llvm.amdgcn.s.buffer.load adds 78d455adf02 GlobalISel: Add combine to narrow G_LSHR adds a1585aec6fe [SelectionDAG] Expose the "getValidShiftAmount" helpers ava [...] adds d9e8b2cbccc AMDGPU/GlobalISel: Skip DAG hack passes on selected functions adds 351ed50dcb2 Reland "[clang-tools-extra] fix the check for if '-latomic' [...] adds 564a9de28ed Hide implementation details. NFC> adds 23368bee153 Revert "[libc++] Move abs and div into stdlib.h to fix head [...] adds 8f95a82bc04 [lldb] Fix Windows bot. adds 7d6da329dee [lldb/CMake] Auto-generate the Initialize and Terminate cal [...] adds 85508595350 GlobalISel: Extend shift narrowing to G_SHL adds 98ed613cccd [IRBuilder] Avoid passing IRBuilder by value; NFC adds 80397d2d12b [IRBuilder] Delete copy constructor adds f9b45f857ff GlobalISel: Fix missing const adds 489f62e8011 [ARM,MVE] Add vector-scalar intrinsics adds 449a1350919 Add LazyCallGraph API to add function to RefSCC adds 55cfb1fb501 [Polly] Fix build after IRBuilder changes adds 3eaa53e8054 Reapply "[IRBuilder] Virtualize IRBuilder" adds 594a89f7270 [FPEnv][ARM] Don't call mutateStrictFPToFP when lowering adds 3431dc32a41 [lldb/Plugin] Fix plugin definition for ProcessWindows adds e9849d5195e [Coroutines][1/6] New pass manager: coro-early adds 0e2eb357e04 GlobalISel: Extend narrowing to G_ASHR adds cef85193b2c [CMake] CheckAtomic.cmake: catch false positives in RISC-V adds 96db12d507f AMDGPU/GlobalISel: Custom lower 32-bit G_UDIV/G_UREM adds deaa6916d34 [lldb/Plugin] Remove PLUGIN from Process POSIX & Linux adds 7424705157b Fix modules build after https://reviews.llvm.org/D73835 (IR [...] adds 54137bbaaf1 GlobalISel: Allow running localizer earlier adds 28213680b2a Revert "Add LazyCallGraph API to add function to RefSCC" adds b62de210cf5 [X86] Move '0-x == y --> x+y == 0' and similar combines to [...] adds 43e948c4b77 [X86] Change how the alignment for the stack object is crea [...] adds e240b27d6da AMDGPU/GlobalISel: Allow arbitrary global values adds f4158dceb5d [gn build] (manually) merge e9849d519 adds f742a28ae3e AMDGPU/GlobalISel: Custom lower 32-bit G_SDIV/G_SREM adds 5e8792453d6 AMDGPU/GlobalISel: Fix RegBankSelect for G_SHUFFLE_VECTOR adds 058cb1b47fd Revert "[lldb/CMake] Auto-generate the Initialize and Termi [...] new 68400a23083 [X86] Add missing isel pattern for BLCFILL producing flags. new 46c4f63ec49 [lldb/Plugin] Update ProcessWindows plugin for revert new 1842fd50d2f [mlir] Fix multiple titles new 612c4bf09e0 [Polly] Run polly-update-format after commit 55cfb1. NFC. new 0deef2e164e Re-land "Add LazyCallGraph API to add function to RefSCC" new 3f148eabe09 [LiveDebugValues] Visit open var locs just once in transfer [...]
The 6 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: .../modernize/DeprecatedIosBaseAliasesCheck.cpp | 10 +- clang-tools-extra/clangd/CMakeLists.txt | 2 +- clang-tools-extra/clangd/unittests/XRefsTests.cpp | 5 + clang/include/clang/Basic/Attr.td | 2 +- clang/include/clang/Basic/AttrDocs.td | 6 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 6 +- clang/include/clang/Basic/arm_mve.td | 68 + clang/include/clang/Basic/arm_mve_defs.td | 23 + clang/include/clang/Sema/Sema.h | 46 +- clang/lib/AST/ASTImporter.cpp | 12 +- clang/lib/CodeGen/CGBuilder.h | 5 +- clang/lib/CodeGen/CGBuiltin.cpp | 18 +- clang/lib/CodeGen/CodeGenFunction.cpp | 18 +- clang/lib/Driver/ToolChains/Gnu.cpp | 2 +- clang/lib/Index/IndexDecl.cpp | 13 +- clang/lib/Sema/Sema.cpp | 185 +- clang/lib/Sema/SemaCUDA.cpp | 19 - clang/lib/Sema/SemaDecl.cpp | 18 +- clang/lib/Sema/SemaDeclObjC.cpp | 4 +- clang/lib/Sema/SemaExpr.cpp | 90 +- clang/lib/Sema/SemaExprObjC.cpp | 48 +- clang/lib/Sema/SemaObjCProperty.cpp | 43 + clang/lib/Sema/SemaOpenMP.cpp | 158 +- clang/lib/Sema/UsedDeclVisitor.h | 70 + clang/lib/Tooling/ArgumentsAdjusters.cpp | 2 +- clang/test/CodeGen/arm-mve-intrinsics/vaddq.c | 114 +- clang/test/CodeGen/arm-mve-intrinsics/vhaddq.c | 156 + clang/test/CodeGen/arm-mve-intrinsics/vhsubq.c | 156 + clang/test/CodeGen/arm-mve-intrinsics/vmulq.c | 218 +- clang/test/CodeGen/arm-mve-intrinsics/vqaddq.c | 102 + clang/test/CodeGen/arm-mve-intrinsics/vqdmulhq.c | 102 + clang/test/CodeGen/arm-mve-intrinsics/vqrdmulhq.c | 102 + clang/test/CodeGen/arm-mve-intrinsics/vqsubq.c | 102 + clang/test/CodeGen/arm-mve-intrinsics/vsubq.c | 114 +- clang/test/CodeGenCUDA/norecurse.cu | 15 + clang/test/CodeGenCUDA/propagate-metadata.cu | 25 +- clang/test/CodeGenOpenCL/amdgpu-attrs.cl | 60 +- clang/test/CodeGenOpenCL/norecurse.cl | 6 + clang/test/Driver/arm-cde.c | 24 + clang/test/FixIt/fixit-objc-direct.m | 30 + ...pragma-attribute-supported-attributes-list.test | 2 +- clang/test/OpenMP/declare_target_messages.cpp | 12 +- .../OpenMP/nvptx_target_exceptions_messages.cpp | 4 +- clang/test/SemaCUDA/bad-calls-on-same-line.cu | 4 +- clang/test/SemaCUDA/call-device-fn-from-host.cu | 4 +- clang/test/SemaCUDA/call-host-fn-from-device.cu | 4 +- clang/test/SemaCUDA/call-kernel-from-kernel.cu | 9 + clang/test/SemaCUDA/openmp-target.cu | 4 +- clang/test/SemaCUDA/trace-through-global.cu | 2 +- clang/test/SemaObjC/category-direct-properties.m | 273 ++ clang/test/SemaObjC/dynamic-direct-properties.m | 22 + clang/test/SemaObjC/method-direct.m | 18 +- .../unittests/AST/ASTImporterGenericRedeclTest.cpp | 30 + .../unittests/AST/ASTImporterODRStrategiesTest.cpp | 20 + clang/unittests/AST/ASTImporterVisibilityTest.cpp | 28 + clang/unittests/Index/IndexTests.cpp | 15 + clang/www/analyzer/alpha_checks.html | 3 - libcxx/include/__config | 3 + libcxx/include/charconv | 13 +- libcxx/include/math.h | 61 +- libcxx/include/stdlib.h | 64 +- .../charconv.to.chars/availability.fail.cpp | 27 + .../charconv/charconv.from.chars/integral.pass.cpp | 76 +- .../integral.roundtrip.pass.cpp | 96 + .../charconv/charconv.to.chars/integral.pass.cpp | 3 + lldb/include/lldb/Target/ABI.h | 22 + .../registers-target-xml-reading}/Makefile | 0 .../TestGdbRemoteTargetXmlPacket.py | 69 + .../registers-target-xml-reading/main.cpp} | 0 lldb/source/API/SystemInitializerFull.cpp | 35 +- lldb/source/Plugins/ABI/X86/ABISysV_x86_64.cpp | 169 +- lldb/source/Plugins/ABI/X86/ABISysV_x86_64.h | 11 +- lldb/source/Plugins/ABI/X86/ABIWindows_x86_64.cpp | 993 +---- lldb/source/Plugins/ABI/X86/ABIWindows_x86_64.h | 11 +- lldb/source/Plugins/ABI/X86/ABIX86_64.h | 26 + lldb/source/Plugins/DynamicLoader/CMakeLists.txt | 1 + .../Plugins/DynamicLoader/wasm-DYLD/CMakeLists.txt | 9 + .../wasm-DYLD/DynamicLoaderWasmDYLD.cpp | 70 + .../wasm-DYLD/DynamicLoaderWasmDYLD.h | 48 + .../Plugins/ObjectFile/wasm/ObjectFileWasm.cpp | 41 +- .../Plugins/ObjectFile/wasm/ObjectFileWasm.h | 12 +- lldb/source/Plugins/Process/Linux/CMakeLists.txt | 2 +- lldb/source/Plugins/Process/POSIX/CMakeLists.txt | 2 +- .../GDBRemoteCommunicationServerCommon.cpp | 1 + .../GDBRemoteCommunicationServerLLGS.cpp | 342 +- .../gdb-remote/GDBRemoteCommunicationServerLLGS.h | 2 + .../source/Plugins/SymbolFile/DWARF/CMakeLists.txt | 2 - lldb/source/Plugins/SymbolFile/DWARF/DIERef.h | 10 + .../Plugins/SymbolFile/DWARF/DWARFContext.cpp | 12 +- .../source/Plugins/SymbolFile/DWARF/DWARFContext.h | 5 +- .../Plugins/SymbolFile/DWARF/DWARFDebugInfo.cpp | 23 +- .../Plugins/SymbolFile/DWARF/DWARFDebugInfo.h | 5 +- lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp | 31 +- lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.h | 8 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp | 47 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.h | 10 +- .../SymbolFile/DWARF/SymbolFileDWARFDwo.cpp | 32 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARFDwo.h | 3 - .../SymbolFile/DWARF/SymbolFileDWARFDwoDwp.cpp | 38 - .../SymbolFile/DWARF/SymbolFileDWARFDwoDwp.h | 39 - .../SymbolFile/DWARF/SymbolFileDWARFDwp.cpp | 138 - .../Plugins/SymbolFile/DWARF/SymbolFileDWARFDwp.h | 50 - lldb/source/Target/ABI.cpp | 42 + .../import-std-module/conflicts/main.cpp | 1 + .../expression/static-initializers/main.cpp | 2 +- .../functionalities/gdb_remote_client/TestWasm.py | 232 ++ .../gdb_remote_client/test_sym.yaml | 18 + .../test_wasm_embedded_debug_sections.yaml | 25 + .../test_wasm_external_debug_sections.yaml | 16 + lldb/test/API/lang/cpp/operators/main.cpp | 4 +- lldb/test/Shell/ObjectFile/wasm/basic.yaml | 8 +- .../ObjectFile/wasm/embedded-debug-sections.yaml | 8 +- .../ObjectFile/wasm/stripped-debug-sections.yaml | 6 +- .../ObjectFile/wasm/unified-debug-sections.yaml | 6 +- lldb/test/Shell/SymbolFile/DWARF/dwp.s | 149 + lldb/tools/lldb-test/SystemInitializerTest.cpp | 3 + lldb/unittests/Target/ABITest.cpp | 26 + lldb/unittests/Target/CMakeLists.txt | 1 + .../TestingSupport/Symbol/YAMLModuleTester.cpp | 2 +- llvm/cmake/modules/CheckAtomic.cmake | 8 +- llvm/include/llvm/ADT/SmallPtrSet.h | 10 +- llvm/include/llvm/Analysis/LazyCallGraph.h | 11 + llvm/include/llvm/Analysis/TargetFolder.h | 111 +- .../llvm/CodeGen/GlobalISel/CombinerHelper.h | 7 + .../include/llvm/CodeGen/GlobalISel/CombinerInfo.h | 2 +- .../llvm/CodeGen/GlobalISel/LegalizerInfo.h | 5 + llvm/include/llvm/CodeGen/GlobalISel/Localizer.h | 4 +- .../llvm/CodeGen/GlobalISel/MIPatternMatch.h | 6 + llvm/include/llvm/CodeGen/SelectionDAG.h | 17 + llvm/include/llvm/IR/ConstantFolder.h | 107 +- llvm/include/llvm/IR/IRBuilder.h | 203 +- llvm/include/llvm/IR/IRBuilderFolder.h | 141 + llvm/include/llvm/IR/IntrinsicsAArch64.td | 8 + llvm/include/llvm/IR/NoFolder.h | 112 +- llvm/include/llvm/MC/MCStreamer.h | 6 - llvm/include/llvm/Support/ARMTargetParser.def | 8 + llvm/include/llvm/Support/ARMTargetParser.h | 9 + .../include/llvm/Transforms/Coroutines/CoroEarly.h | 31 + llvm/include/llvm/module.modulemap | 1 + llvm/lib/Analysis/ConstantFolding.cpp | 3 + llvm/lib/Analysis/LazyCallGraph.cpp | 32 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 2 +- llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 110 + llvm/lib/CodeGen/LiveDebugValues.cpp | 44 +- llvm/lib/CodeGen/MachineSizeOpts.cpp | 2 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 63 +- .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 3 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 32 +- .../DWARF/DWARFAbbreviationDeclaration.cpp | 2 +- llvm/lib/IR/DIBuilder.cpp | 26 +- llvm/lib/IR/IRBuilder.cpp | 7 + llvm/lib/Passes/LLVMBuild.txt | 2 +- llvm/lib/Passes/PassBuilder.cpp | 1 + llvm/lib/Passes/PassRegistry.def | 1 + llvm/lib/Target/AArch64/AArch64.td | 4 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 75 +- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 1 + llvm/lib/Target/AArch64/AArch64InstrFormats.td | 12 + llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 23 +- .../AArch64/MCTargetDesc/AArch64InstPrinter.cpp | 13 + .../AArch64/MCTargetDesc/AArch64InstPrinter.h | 3 + llvm/lib/Target/AArch64/SVEInstrFormats.td | 52 +- llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp | 4 +- llvm/lib/Target/AMDGPU/AMDGPUGISel.td | 9 + llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td | 12 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 125 +- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 3 + llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 209 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h | 14 + .../Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp | 7 + llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 84 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h | 3 + llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 2 + llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp | 5 + llvm/lib/Target/AMDGPU/SIFixupVectorISel.cpp | 5 + llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 4 +- llvm/lib/Target/AMDGPU/SIISelLowering.h | 6 + llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp | 5 + llvm/lib/Target/AMDGPU/SMInstructions.td | 7 +- llvm/lib/Target/ARM/ARM.td | 10 + llvm/lib/Target/ARM/ARMISelLowering.cpp | 14 +- llvm/lib/Target/ARM/ARMInstrCDE.td | 503 +++ llvm/lib/Target/ARM/ARMInstrInfo.td | 6 + llvm/lib/Target/ARM/ARMInstrMVE.td | 249 +- llvm/lib/Target/ARM/ARMPredicates.td | 3 + llvm/lib/Target/ARM/ARMRegisterInfo.td | 11 + llvm/lib/Target/ARM/ARMSubtarget.h | 3 + llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 195 +- .../Target/ARM/Disassembler/ARMDisassembler.cpp | 41 +- .../Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp | 8 + llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.h | 3 + llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp | 20 +- llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp | 16 +- llvm/lib/Target/Mips/MicroMipsSizeReduction.cpp | 2 +- llvm/lib/Target/PowerPC/PPCInstr64Bit.td | 4 + llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 17 + llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h | 2 + .../WebAssemblyLowerEmscriptenEHSjLj.cpp | 13 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 5 + llvm/lib/Target/X86/X86ISelLowering.cpp | 42 +- llvm/lib/Target/X86/X86InstrInfo.td | 5 + llvm/lib/Target/X86/X86SchedSkylakeServer.td | 114 +- llvm/lib/Transforms/Coroutines/CoroEarly.cpp | 37 +- llvm/lib/Transforms/IPO/Attributor.cpp | 8 + .../Instrumentation/AddressSanitizer.cpp | 12 +- llvm/lib/Transforms/Scalar/SROA.cpp | 8 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 2 +- .../CodeGen/AArch64/sve-callbyref-notailcall.ll | 29 + .../AArch64/sve-calling-convention-byref.ll | 118 + llvm/test/CodeGen/AArch64/sve-intrinsics-index.ll | 178 + .../AMDGPU/GlobalISel/combine-ashr-narrow.mir | 204 + .../AMDGPU/GlobalISel/combine-lshr-narrow.mir | 202 + .../AMDGPU/GlobalISel/combine-shl-narrow.mir | 203 + .../AMDGPU/GlobalISel/divergent-control-flow.ll | 18 +- .../AMDGPU/GlobalISel/global-value.illegal.ll | 15 + .../test/CodeGen/AMDGPU/GlobalISel/global-value.ll | 52 + .../AMDGPU/GlobalISel/inst-select-trunc.v2s16.mir | 65 + .../CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir | 98 + .../AMDGPU/GlobalISel/legalize-inttoptr.mir | 37 + .../AMDGPU/GlobalISel/legalize-ptrtoint.mir | 32 + .../CodeGen/AMDGPU/GlobalISel/legalize-sdiv.mir | 977 ++++- .../CodeGen/AMDGPU/GlobalISel/legalize-sitofp.mir | 100 + .../CodeGen/AMDGPU/GlobalISel/legalize-srem.mir | 953 ++++- .../CodeGen/AMDGPU/GlobalISel/legalize-udiv.mir | 766 +++- .../CodeGen/AMDGPU/GlobalISel/legalize-uitofp.mir | 78 + .../CodeGen/AMDGPU/GlobalISel/legalize-urem.mir | 748 +++- .../AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll | 4281 ++++++++++++++++++++ .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sbfe.ll | 962 +++++ .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ubfe.ll | 1079 +++++ llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll | 198 + .../GlobalISel/regbankselect-shuffle-vector.mir | 69 + llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i32.ll | 1030 +++++ llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i32.ll | 1008 +++++ llvm/test/CodeGen/AMDGPU/GlobalISel/trunc.ll | 119 + llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i32.ll | 851 ++++ llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll | 853 ++++ llvm/test/CodeGen/AMDGPU/clamp-modifier.ll | 2 +- llvm/test/CodeGen/AMDGPU/divrem24-assume.ll | 2 +- llvm/test/CodeGen/AMDGPU/fadd-fma-fmul-combine.ll | 8 +- llvm/test/CodeGen/AMDGPU/frem.ll | 2 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.memtime.ll | 11 +- llvm/test/CodeGen/AMDGPU/madmk.ll | 6 +- llvm/test/CodeGen/AMDGPU/omod.ll | 2 +- llvm/test/CodeGen/AMDGPU/operand-folding.ll | 2 +- llvm/test/CodeGen/AMDGPU/sdiv.ll | 731 ++-- llvm/test/CodeGen/AMDGPU/sdiv64.ll | 2502 ++++++------ llvm/test/CodeGen/AMDGPU/srem64.ll | 2822 +++++++------ llvm/test/CodeGen/AMDGPU/udiv64.ll | 2459 +++++------ llvm/test/CodeGen/AMDGPU/urem64.ll | 2050 +++++----- llvm/test/CodeGen/AMDGPU/v_mac.ll | 2 +- llvm/test/CodeGen/ARM/fp-intrinsics.ll | 45 + llvm/test/CodeGen/PowerPC/addi-licm.ll | 5 +- llvm/test/CodeGen/PowerPC/bperm.ll | 2 +- llvm/test/CodeGen/PowerPC/lsr-insns-cost.ll | 35 +- llvm/test/CodeGen/PowerPC/scalar-equal.ll | 56 + llvm/test/CodeGen/PowerPC/unal-altivec.ll | 13 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/vaddq.ll | 96 + llvm/test/CodeGen/Thumb2/mve-intrinsics/vhaddq.ll | 131 + llvm/test/CodeGen/Thumb2/mve-intrinsics/vhsubq.ll | 132 + llvm/test/CodeGen/Thumb2/mve-intrinsics/vmulq.ll | 181 + llvm/test/CodeGen/Thumb2/mve-intrinsics/vqaddq.ll | 84 + .../test/CodeGen/Thumb2/mve-intrinsics/vqdmulhq.ll | 84 + .../CodeGen/Thumb2/mve-intrinsics/vqrdmulhq.ll | 84 + llvm/test/CodeGen/Thumb2/mve-intrinsics/vqsubq.ll | 84 + llvm/test/CodeGen/Thumb2/mve-intrinsics/vsubq.ll | 96 + llvm/test/CodeGen/Thumb2/mve-vecreduce-mla.ll | 3035 ++++++++++++++ llvm/test/CodeGen/Thumb2/thumb2-rev16.ll | 143 +- llvm/test/CodeGen/X86/add.ll | 4 +- llvm/test/CodeGen/X86/flt-rounds.ll | 4 +- llvm/test/CodeGen/X86/rev16.ll | 256 ++ llvm/test/CodeGen/X86/tbm_patterns.ll | 44 + llvm/test/MC/ARM/cde-fp-vec.s | 129 + llvm/test/MC/ARM/cde-integer.s | 219 + llvm/test/MC/ARM/cde-vec-pred.s | 27 + llvm/test/MC/Disassembler/ARM/cde-fp-vec.txt | 79 + llvm/test/MC/Disassembler/ARM/cde-integer.txt | 137 + llvm/test/MC/Disassembler/ARM/cde-vec-pred.txt | 19 + llvm/test/TableGen/simplify-patfrag.td | 38 + llvm/test/Transforms/Coroutines/coro-early.ll | 1 + .../tools/llvm-mca/X86/Generic/resources-avx512.s | 346 +- .../llvm-mca/X86/Generic/resources-avx512bw.s | 213 +- .../llvm-mca/X86/Generic/resources-avx512bwvl.s | 314 +- .../llvm-mca/X86/Generic/resources-avx512dq.s | 94 +- .../llvm-mca/X86/Generic/resources-avx512dqvl.s | 78 +- .../llvm-mca/X86/Generic/resources-avx512vl.s | 534 ++- .../llvm-mca/X86/SkylakeServer/resources-avx512.s | 333 +- .../X86/SkylakeServer/resources-avx512bw.s | 213 +- .../X86/SkylakeServer/resources-avx512bwvl.s | 314 +- .../X86/SkylakeServer/resources-avx512dq.s | 94 +- .../X86/SkylakeServer/resources-avx512dqvl.s | 78 +- .../X86/SkylakeServer/resources-avx512vl.s | 534 ++- llvm/unittests/Analysis/LazyCallGraphTest.cpp | 42 + .../CodeGen/GlobalISel/PatternMatchTest.cpp | 10 + llvm/utils/TableGen/CodeGenDAGPatterns.cpp | 7 + llvm/utils/gn/build/BUILD.gn | 2 + llvm/utils/gn/secondary/llvm/lib/Passes/BUILD.gn | 1 + mlir/docs/Dialects/Linalg.md | 106 +- mlir/docs/Dialects/Vector.md | 140 +- mlir/docs/RationaleLinalgDialect.md | 153 +- mlir/docs/SymbolsAndSymbolTables.md | 40 +- mlir/docs/Tutorials/Toy/Ch-3.md | 4 +- mlir/docs/Tutorials/Toy/Ch-6.md | 16 +- .../mlir/Dialect/StandardOps/EDSC/Intrinsics.h | 2 + mlir/lib/Conversion/LoopsToGPU/LoopsToGPU.cpp | 6 +- .../Dialect/GPU/Transforms/AllReduceLowering.cpp | 2 +- mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp | 3 +- mlir/lib/Dialect/Linalg/Transforms/Promotion.cpp | 21 +- mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp | 7 +- mlir/lib/Dialect/StandardOps/Ops.cpp | 4 +- mlir/lib/Dialect/VectorOps/VectorOps.cpp | 2 +- mlir/lib/IR/AffineMap.cpp | 2 +- mlir/lib/IR/Attributes.cpp | 7 +- mlir/lib/Pass/PassRegistry.cpp | 4 +- mlir/test/Dialect/Linalg/promote.mlir | 174 +- polly/include/polly/CodeGen/IRBuilder.h | 13 +- polly/lib/CodeGen/CodeGeneration.cpp | 4 +- polly/lib/CodeGen/PPCGCodeGeneration.cpp | 4 +- polly/lib/Support/ScopHelper.cpp | 4 +- 318 files changed, 35337 insertions(+), 8816 deletions(-) create mode 100644 clang/lib/Sema/UsedDeclVisitor.h create mode 100644 clang/test/CodeGenCUDA/norecurse.cu create mode 100644 clang/test/CodeGenOpenCL/norecurse.cl create mode 100644 clang/test/Driver/arm-cde.c create mode 100644 clang/test/FixIt/fixit-objc-direct.m create mode 100644 clang/test/SemaCUDA/call-kernel-from-kernel.cu create mode 100644 clang/test/SemaObjC/category-direct-properties.m create mode 100644 clang/test/SemaObjC/dynamic-direct-properties.m create mode 100644 libcxx/test/libcxx/utilities/charconv/charconv.to.chars/availab [...] create mode 100644 libcxx/test/std/utilities/charconv/charconv.from.chars/integral [...] copy lldb/{test/API/api/check_public_api_headers => packages/Python/lldbsuite/test [...] create mode 100644 lldb/packages/Python/lldbsuite/test/tools/lldb-server/registers [...] copy lldb/{test/Shell/SymbolFile/Inputs/target-symbols-add-unwind.c => packages/Py [...] create mode 100644 lldb/source/Plugins/ABI/X86/ABIX86_64.h create mode 100644 lldb/source/Plugins/DynamicLoader/wasm-DYLD/CMakeLists.txt create mode 100644 lldb/source/Plugins/DynamicLoader/wasm-DYLD/DynamicLoaderWasmDYLD.cpp create mode 100644 lldb/source/Plugins/DynamicLoader/wasm-DYLD/DynamicLoaderWasmDYLD.h delete mode 100644 lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDwoDwp.cpp delete mode 100644 lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDwoDwp.h delete mode 100644 lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDwp.cpp delete mode 100644 lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDwp.h create mode 100644 lldb/test/API/functionalities/gdb_remote_client/TestWasm.py create mode 100644 lldb/test/API/functionalities/gdb_remote_client/test_sym.yaml create mode 100644 lldb/test/API/functionalities/gdb_remote_client/test_wasm_embed [...] create mode 100644 lldb/test/API/functionalities/gdb_remote_client/test_wasm_exter [...] create mode 100644 lldb/test/Shell/SymbolFile/DWARF/dwp.s create mode 100644 lldb/unittests/Target/ABITest.cpp create mode 100644 llvm/include/llvm/IR/IRBuilderFolder.h create mode 100644 llvm/include/llvm/Transforms/Coroutines/CoroEarly.h create mode 100644 llvm/lib/Target/ARM/ARMInstrCDE.td create mode 100644 llvm/test/CodeGen/AArch64/sve-callbyref-notailcall.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-calling-convention-byref.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-intrinsics-index.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/combine-ashr-narrow.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/combine-lshr-narrow.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shl-narrow.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/global-value.illegal.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-trunc.v2s16.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sbfe.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ubfe.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-shuffle-vector.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i32.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i32.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/trunc.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i32.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll create mode 100644 llvm/test/CodeGen/PowerPC/scalar-equal.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-vecreduce-mla.ll create mode 100644 llvm/test/CodeGen/X86/rev16.ll create mode 100644 llvm/test/MC/ARM/cde-fp-vec.s create mode 100644 llvm/test/MC/ARM/cde-integer.s create mode 100644 llvm/test/MC/ARM/cde-vec-pred.s create mode 100644 llvm/test/MC/Disassembler/ARM/cde-fp-vec.txt create mode 100644 llvm/test/MC/Disassembler/ARM/cde-integer.txt create mode 100644 llvm/test/MC/Disassembler/ARM/cde-vec-pred.txt create mode 100644 llvm/test/TableGen/simplify-patfrag.td