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from dbf847d2c8d aarch64: -mstrict-align vs __arm_data512_t [PR113657] new 26c34b809cd RISC-V: Add non-vector types to dfa pipelines new e56fb037d9d RISC-V: Add vector related pipelines new 4b799a16ae5 RISC-V: Use default cost model for insn scheduling new 23cd2961bd2 RISC-V: Enable assert for insn_has_dfa_reservation
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Summary of changes: gcc/config/riscv/generic-ooo.md | 140 ++------------------ gcc/config/riscv/generic-vector-ooo.md | 143 +++++++++++++++++++++ gcc/config/riscv/generic.md | 20 ++- gcc/config/riscv/riscv.cc | 2 - gcc/config/riscv/riscv.md | 19 ++- gcc/config/riscv/sifive-7.md | 17 ++- gcc/config/riscv/vector.md | 2 +- gcc/config/riscv/zc.md | 96 +++++++------- gcc/testsuite/g++.target/riscv/rvv/base/bug-1.C | 2 + .../riscv/rvv/autovec/reduc/reduc_call-2.c | 2 + .../riscv/rvv/base/binop_vx_constraint-102.c | 2 + .../riscv/rvv/base/binop_vx_constraint-108.c | 2 + .../riscv/rvv/base/binop_vx_constraint-114.c | 2 + .../riscv/rvv/base/binop_vx_constraint-119.c | 2 + .../riscv/rvv/base/binop_vx_constraint-12.c | 2 + .../riscv/rvv/base/binop_vx_constraint-16.c | 2 + .../riscv/rvv/base/binop_vx_constraint-17.c | 2 + .../riscv/rvv/base/binop_vx_constraint-19.c | 2 + .../riscv/rvv/base/binop_vx_constraint-21.c | 2 + .../riscv/rvv/base/binop_vx_constraint-23.c | 2 + .../riscv/rvv/base/binop_vx_constraint-25.c | 2 + .../riscv/rvv/base/binop_vx_constraint-27.c | 2 + .../riscv/rvv/base/binop_vx_constraint-29.c | 2 + .../riscv/rvv/base/binop_vx_constraint-31.c | 2 + .../riscv/rvv/base/binop_vx_constraint-33.c | 2 + .../riscv/rvv/base/binop_vx_constraint-35.c | 2 + .../riscv/rvv/base/binop_vx_constraint-4.c | 2 + .../riscv/rvv/base/binop_vx_constraint-40.c | 2 + .../riscv/rvv/base/binop_vx_constraint-44.c | 2 + .../riscv/rvv/base/binop_vx_constraint-50.c | 2 + .../riscv/rvv/base/binop_vx_constraint-56.c | 2 + .../riscv/rvv/base/binop_vx_constraint-62.c | 2 + .../riscv/rvv/base/binop_vx_constraint-68.c | 2 + .../riscv/rvv/base/binop_vx_constraint-74.c | 2 + .../riscv/rvv/base/binop_vx_constraint-79.c | 2 + .../riscv/rvv/base/binop_vx_constraint-8.c | 2 + .../riscv/rvv/base/binop_vx_constraint-84.c | 2 + .../riscv/rvv/base/binop_vx_constraint-90.c | 2 + .../riscv/rvv/base/binop_vx_constraint-96.c | 2 + .../riscv/rvv/base/float-point-dynamic-frm-30.c | 2 + .../gcc.target/riscv/rvv/base/pr108185-1.c | 2 + .../gcc.target/riscv/rvv/base/pr108185-2.c | 2 + .../gcc.target/riscv/rvv/base/pr108185-3.c | 2 + .../gcc.target/riscv/rvv/base/pr108185-4.c | 2 + .../gcc.target/riscv/rvv/base/pr108185-5.c | 2 + .../gcc.target/riscv/rvv/base/pr108185-6.c | 2 + .../gcc.target/riscv/rvv/base/pr108185-7.c | 2 + .../riscv/rvv/base/shift_vx_constraint-1.c | 2 + .../gcc.target/riscv/rvv/vsetvl/pr111037-3.c | 2 + .../riscv/rvv/vsetvl/vlmax_back_prop-28.c | 2 + .../riscv/rvv/vsetvl/vlmax_back_prop-29.c | 2 + .../riscv/rvv/vsetvl/vlmax_back_prop-32.c | 2 + .../riscv/rvv/vsetvl/vlmax_back_prop-33.c | 2 + .../riscv/rvv/vsetvl/vlmax_single_block-17.c | 2 + .../riscv/rvv/vsetvl/vlmax_single_block-18.c | 2 + .../riscv/rvv/vsetvl/vlmax_single_block-19.c | 2 + .../riscv/rvv/vsetvl/vlmax_switch_vtype-10.c | 2 + .../riscv/rvv/vsetvl/vlmax_switch_vtype-11.c | 2 + .../riscv/rvv/vsetvl/vlmax_switch_vtype-12.c | 2 + .../riscv/rvv/vsetvl/vlmax_switch_vtype-4.c | 2 + .../riscv/rvv/vsetvl/vlmax_switch_vtype-5.c | 2 + .../riscv/rvv/vsetvl/vlmax_switch_vtype-6.c | 2 + .../riscv/rvv/vsetvl/vlmax_switch_vtype-7.c | 2 + .../riscv/rvv/vsetvl/vlmax_switch_vtype-8.c | 2 + .../riscv/rvv/vsetvl/vlmax_switch_vtype-9.c | 2 + gcc/testsuite/gfortran.dg/vect/vect-8.f90 | 2 + 66 files changed, 362 insertions(+), 193 deletions(-) create mode 100644 gcc/config/riscv/generic-vector-ooo.md