[Tcwg-commits] [gcc] branch master updated (a4953810bac -> 18fabc35f47)

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from a4953810bac RISC-V: Shorten memrefs improvement, partial fix 97417. new 18fabc35f47 RISC-V: Avoid zero/sign extend for volatile loads. Fix for 97417.

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Summary of changes: gcc/config/riscv/riscv-shorten-memrefs.c | 34 +++++++++++++++++++++++++------- gcc/config/riscv/riscv.c | 22 +++++++++++++++++++++ 2 files changed, 49 insertions(+), 7 deletions(-)