This is an automated email from the git hooks/post-receive script.
"tcwg-buildslave pushed a change to branch linaro-local/ci/llvm-kernel-aarch64-tested in repository toolchain/llvm/llvm.
from 56f506811f6 [RegisterCoalescer] Do not assert when trying to remat dead values adds 33515ddc705 [LICM] Hoist guards with invariant conditions adds 35df2a38417 [MIPS GlobalISel] Select bitwise instructions
No new revisions were added by this update.
Summary of changes: lib/Target/Mips/MipsLegalizerInfo.cpp | 3 + lib/Target/Mips/MipsRegisterBankInfo.cpp | 6 + lib/Transforms/Scalar/LICM.cpp | 17 ++ .../Mips/GlobalISel/instruction-select/bitwise.mir | 228 +++++++++++++++++++++ .../Mips/GlobalISel/irtranslator/bitwise.ll | 129 ++++++++++++ test/CodeGen/Mips/GlobalISel/legalizer/bitwise.mir | 213 +++++++++++++++++++ test/CodeGen/Mips/GlobalISel/llvm-ir/bitwise.ll | 103 ++++++++++ .../Mips/GlobalISel/regbankselect/bitwise.mir | 223 ++++++++++++++++++++ test/Transforms/GuardWidening/loop-schedule.ll | 2 +- test/Transforms/LICM/guards.ll | 13 +- 10 files changed, 930 insertions(+), 7 deletions(-) create mode 100644 test/CodeGen/Mips/GlobalISel/instruction-select/bitwise.mir create mode 100644 test/CodeGen/Mips/GlobalISel/irtranslator/bitwise.ll create mode 100644 test/CodeGen/Mips/GlobalISel/legalizer/bitwise.mir create mode 100644 test/CodeGen/Mips/GlobalISel/llvm-ir/bitwise.ll create mode 100644 test/CodeGen/Mips/GlobalISel/regbankselect/bitwise.mir