This is an automated email from the git hooks/post-receive script.
unknown user pushed a change to branch master in repository llvm.
from 85bf7d97e78 [AliasSetTracker] Update signature to aliasesPointer [NFCI]. new 316534c43c3 [GlobalISel] Add G_FSIN and G_FCOS generic instructions new c02744dfa26 [GlobalISel][AArch64] Add IRTranslator support for G_FCOS a [...] new 11b94ff4098 [GlobalISel][AArch64] Add instruction selection support for [...]
The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: include/llvm/Support/TargetOpcodes.def | 6 + include/llvm/Target/GenericOpcodes.td | 14 ++ .../llvm/Target/GlobalISel/SelectionDAGCompat.td | 2 + lib/CodeGen/GlobalISel/IRTranslator.cpp | 10 + lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 20 +- lib/Target/AArch64/AArch64LegalizerInfo.cpp | 13 +- lib/Target/AArch64/AArch64RegisterBankInfo.cpp | 2 + .../AArch64/GlobalISel/arm64-irtranslator.ll | 16 ++ test/CodeGen/AArch64/GlobalISel/legalize-cos.mir | 227 +++++++++++++++++++++ test/CodeGen/AArch64/GlobalISel/legalize-sin.mir | 227 +++++++++++++++++++++ .../GlobalISel/legalizer-info-validation.mir | 8 +- test/CodeGen/AArch64/arm64-vfloatintrinsics.ll | 34 +++ test/CodeGen/AArch64/f16-instructions.ll | 28 ++- test/CodeGen/AArch64/sincospow-vector-expansion.ll | 34 ++- 14 files changed, 634 insertions(+), 7 deletions(-) create mode 100644 test/CodeGen/AArch64/GlobalISel/legalize-cos.mir create mode 100644 test/CodeGen/AArch64/GlobalISel/legalize-sin.mir