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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_check_gcc/master-arm in repository toolchain/ci/glibc.
from aa13fd1618 nptl_db: disable DT_RELR on libthread_db.so adds 2c9af8421d x86: Fix page cross case in rawmemchr-avx2 [BZ #29234] adds 3fdf0a205b nss: add assert to DB_LOOKUP_FCT (BZ #28752) adds ace9e3edbc nss: handle stat failure in check_reload_and_get (BZ #28752) new 4654e7fd5a x86: Add copyright to strpbrk-c.c new 0f91811333 x86: Align varshift table to 32-bytes new 73bae395cf x86: Improve svml_s_atanhf16_core_avx512.S new 65897e9916 x86: Improve svml_s_atanhf8_core_avx2.S new fe1915d4f6 x86: Improve svml_s_atanhf4_core_sse4.S new e560b3c2d2 x86: Optimize svml_s_tanhf16_core_avx512.S new 3a49ce8799 x86: Add data file that can be shared by tanhf-avx2 and tanhf-sse4 new bcc41f66a4 x86: Optimize svml_s_tanhf8_core_avx2.S new cffb9414c5 x86: Optimize svml_s_tanhf4_core_sse4.S
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Summary of changes: nss/XXX-lookup.c | 5 + nss/nss_database.c | 39 +- string/test-rawmemchr.c | 57 +- .../fpu/multiarch/svml_s_atanhf16_core_avx512.S | 474 +++++------ .../fpu/multiarch/svml_s_atanhf4_core_sse4.S | 378 ++++----- .../fpu/multiarch/svml_s_atanhf8_core_avx2.S | 405 +++++---- .../fpu/multiarch/svml_s_tanhf16_core_avx512.S | 527 ++++++------ .../x86_64/fpu/multiarch/svml_s_tanhf4_core_sse4.S | 865 ++++--------------- .../x86_64/fpu/multiarch/svml_s_tanhf8_core_avx2.S | 912 ++++----------------- sysdeps/x86_64/fpu/multiarch/svml_s_tanhf_rodata.S | 621 ++++++++++++++ sysdeps/x86_64/multiarch/memchr-avx2.S | 16 +- sysdeps/x86_64/multiarch/strpbrk-c.c | 18 + sysdeps/x86_64/multiarch/varshift.c | 5 +- sysdeps/x86_64/multiarch/varshift.h | 3 +- 14 files changed, 1948 insertions(+), 2377 deletions(-) create mode 100644 sysdeps/x86_64/fpu/multiarch/svml_s_tanhf_rodata.S