[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-O2 updated (50f4ae58eb13 -> d2bb6d512c0f)

16 Sep 2021


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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-O2
in repository toolchain/ci/llvm-project.
from  50f4ae58eb13 [AArch64] Correct store ReadAdrBase operand
      adds  10c982e0b3e6 Revert rG1c9bec727ab5c53fa060560dc8d346a911142170 : [InstC [...]
      adds  0060fffc8222 [CUDA] Bump default GPU architecture to sm_35.
      adds  49d982d8cbbb [CUDA] Add support for CUDA-11.4
      adds  3db8e486e560 [CUDA] Improve CUDA version detection and diagnostics.
      adds  ce4545db1d31 [CUDA] Bump  the latest supported CUDA version to 11.4.
      adds  4e103a12d9d6 [mlir] Add support for VariadicOfVariadic operands
      adds  4c40c03b3933 Fixed doc build.
      adds  ba6e15d8cc52 [TargetMachine] Move COFF special case for ExternalSymbolS [...]
      adds  cc9c545fb421 [InstCombine] generalize subtract with 'not' operands; 2nd try
      adds  eff11176c5ca [libc] Enable string to integer conversion functions in th [...]
      adds  236a90802d5a [mlir][sparse] replace support lib conversion with actual  [...]
      adds  d898693f72fc [ExecutionEngine] Use the libunwind __register_frame on Darwin
      adds  1055c5e1d316 [MLGO] Make sure inliner logs when deleting callees
      adds  d26000e4cc2b [openmp][devicertl] Freestanding nvptx via stub printf
      adds  a58c2e4af06c Fix DWARFDie::getDeclFile(...) to work with DW_AT_specification.
      adds  e42ce422a978 [dllexport] Instantiate default ctor default args
      adds  b546f4347b87 [mlir]Linalg] Allow controlling fusion of linalg.generic - [...]
      adds  253cb50c6099 [lit] Add the option to output test result as resultdb jso [...]
      adds  2ec2b25fbaaf [AArch64][GlobalISel] Select @llvm.aarch64.neon.ld2.*
      adds  96ef794fd04d [SCEV] Add a hasFlags utility to improve readability [NFC]
      adds  c728bd5bbaab [X86] AVX512FP16 instructions enabling 5/6
      adds  d95d2a8e4aaa [LLDB][GUI] Add extra keys to text field
      adds  8111f2f7eef5 [profile] Update counter offset to account for binary ids
      adds  945cde8b6a45 [LLDB][GUI] Add submit form key combination
      adds  cb661df58fbe [IPO] Remove DisableTailCalls (NFC)
      adds  292f013395f2 [LLDB][GUI] Handle extra navigation keys in forms
      adds  b7795eb6469c [X86] Building constant vector which element type is half  [...]
      adds  07e85823aa75 [OpenMP][AMDGCN] Enable complex functions
      adds  8b117830b1b1 [ORC] Add non-const WrapperFunctionResult::data method, si [...]
      adds  280a0b735fce [Test][AggressiveInstCombine] Modify shift tests
      adds  8614cb9f999d [ORC-RT] Add non-const WrapperFunctionResult data access,  [...]
      adds  bed587631f90 [AggressiveInstCombine] Add arithmetic shift right instr t [...]
      adds  1f8602e16eac [clang] NFC: remove superfluous braces
      adds  9b8b7c1180eb [AMDGPU][Libomptarget] Delete g_atl_machine global
      adds  039b469b8581 [ARM] Allow using ';' as asm statement separator in MSVC mode
      adds  cdbc86dd2250 [Polly] Don't redundantly link libPolly into unittests.
      adds  e9c8973f1c68 [AArch64][SME] Fix v8.6a bf16 NEON instruction predication
      adds  b52171629f56 [GVN] Execute performLoopLoadPRE ahead of PerformLoadPRE
      adds  2bf4eeeeb60d [GlobalISel] Avoid creating COPY in LegalizationArtifactCombiner
      adds  992e21eeeef1 [DebugInfo][InstrRef] Fix over-droppage of locations in X8 [...]
      adds  47f52f989b06 [M68k][AsmParser] Support parsing register masks & fix pri [...]
      adds  2e8534beb289 [NFC][LoopIdiom] Add reproducer of wrong memmove transformation
      adds  befb9dc3694e [clang-format] keep TypeScript argument decorators in line
      adds  0c36082963fa [mlir][SCF] Use symbols in loop peeling rewrite
      adds  ebf35370ff59 [mlir][tensor] Insert explicit tensor.cast ops for insert_ [...]
      adds  98339f14a042 Avoid nullptr dereferencing of 'Constraint'; NFC
      adds  f71706046144 Fix documentation and snippets for the handle attributes; NFC
      adds  e431b280c9ae [DAG] CombineConsecutiveLoads - replace getABITypeAlign wi [...]
      adds  6de0b551884f [DAG] TransformFPLoadStorePair - replace getABITypeAlign w [...]
      adds  9a5f38885056 [AST] Pick last tentative definition as the acting definition
      adds  c528c9490b0c [InstCombine] Remove CreateNonTerminatorUnreachable (NFC)
      adds  8d50a847d410 [clang-tidy] Hotfix default parameter value in 'bugprone-e [...]
      adds  194b08000c1c [DAG] LoadedSlice::canMergeExpensiveCrossRegisterBankCopy  [...]
      adds  a643bd3189ae [mlir] add permutation utility
      adds  307890f85b33 [X86] Freeze vXi8 shl(x,1) -> add(x,x) vector fold (PR50468)
      adds  fda176892e64 [mlir][sparse] use new permutation utility to avoid codedup
      adds  914836b1c8b3 [SCEV] Infer nsw/nuw from nw for addrecs
      adds  1e07f19bfc82 Revert "Special case common branch patterns in breakLoopBackedge"
      adds  67d4dd5c0713 [AArch64][GlobalISel] Select @llvm.aarch64.neon.ld4.*
      adds  f387a3617860 [NFC][clang] Move remaining part of X86Target.def to llvm/ [...]
      adds  58582bae6392 Revert "[SCEV] Infer nsw/nuw from nw for addrecs"
      adds  3265b93363d8 [flang] Extension: reduced scope for some implied DO loop indices
      adds  b232a88c6fac [flang] runtime: fix WRITE after BACKSPACE on variable-len [...]
      adds  40067b88c0bc [compiler-rt] change internal internal libc invariants
      adds  de620f5b132b [CSPGO] Fix lost IRPGOFlag in CSPGO instrumentation
      adds  1b19f90a2390 Revert "[AST] Pick last tentative definition as the acting [...]
      adds  d2e103644be3 [llvm-reduce] Remove various module data
      adds  b109becdce12 [NFC] Add and use AttributeList::removeFnAttributes()
      adds  2f53fcc831e2 Fix compilation errors in C API when using C compiler
      adds  4c418c1bfbc5 Try to fix build with modules enabled after D108422
      adds  266a8d5cfe9a [tsan] Fix sigaction interceptor after D107186
      adds  2d8a2a91b195 [llvm-reduce] Check if module data strings are empty befor [...]
      adds  1275ee304104 [OpenMP][amdgcn] Don't use in-tree clang if not available.
      adds  db232de19397 [AArch64][GlobalISel] Legalize + select v2p0 -> v264 G_PTRTOINT
      adds  1d02a8bcd393 [libc] fix string conversion tests for windows
      adds  92c1fd19abb1 Allow rematerialization of virtual reg uses
      adds  87dd51983cf9 [libc++] Remove support for CloudABI, which has been abandoned
      adds  d25e91d7f61a Support alias.scope and noalias metadata
      adds  09dcf31d7449 [NFC] Add tests for i128 fshl on a few targets.
      adds  15375631049a [Polly][test] Add missing %loadPolly.
      adds  ce1dc9d647a7 [ARC] Add codegen for the readcyclecounter intrinsic along [...]
      adds  9588b685c6b2 [asan] Implemented intrinsic for the custom calling conven [...]
      adds  ac7694596dc5 [InstSimplify] add tests for or-of-shifted-one-bits; NFC
      adds  204038d52e03 [InstSimplify] fold or+shifted -1 to -1
      adds  6bbfd6a9c184 [libc] Fix type errors on Windows
      adds  148bc251f48e [Clang][OpenMP] Use enum to dereference children data arra [...]
      adds  a65b5ddd3333 [M68k][test] Migrate MC tests related to MOVEM instruciton
      adds  fdee2d768d5f [libc] Fix too long number in strtoul_test
      adds  b97ca3aca121 Revert "[asan] Implemented intrinsic for the custom callin [...]
      adds  e4ebfb5786a1 [MCA] Adding an AMDGPUCustomBehaviour implementation.
      adds  9b96b0865df1 llvm-xray {convert,extract}: Add --demangle
      adds  67ffce68bc3e Make WindowsManifestMerger::merge() take a MemoryBufferRef
      adds  5f0d265b15f7 [gn build] (manually) port 87dd51983cf9
      adds  1cbdc07ec015 [lldb] Add support for debugging via the dynamic linker.
      adds  9d2740f33177 [libc++abi] Apply simplify scan_eh_tab to SjLj
      adds  cd2134e42aa7 [lldb] Refactor Module::LookupInfo constructor
      adds  ef8707574bbc [AArch64][GlobalISel] Legalize narrow scalar FP arithmetic
      adds  d2bb6d512c0f [X86] Add explicit library dependency on LLVMInstrumentation
No new revisions were added by this update.
Summary of changes:
 .../bugprone/EasilySwappableParametersCheck.cpp    |    2 +-
 clang/docs/ReleaseNotes.rst                        |    6 +
 clang/include/clang/AST/StmtOpenMP.h               |   43 +-
 clang/include/clang/Basic/AttrDocs.td              |   24 +-
 clang/include/clang/Basic/BuiltinsX86.def          |   19 +
 clang/include/clang/Basic/Cuda.h                   |    8 +-
 clang/include/clang/Basic/DiagnosticDriverKinds.td |    7 +-
 clang/include/clang/Basic/X86Target.def            |   59 -
 clang/include/clang/module.modulemap               |    1 -
 clang/lib/Basic/Cuda.cpp                           |   18 +-
 clang/lib/Basic/Targets/NVPTX.cpp                  |    2 +
 clang/lib/Basic/Targets/X86.cpp                    |    8 +-
 clang/lib/CodeGen/CGBuiltin.cpp                    |   56 +-
 clang/lib/Driver/Driver.cpp                        |    2 +-
 clang/lib/Driver/ToolChains/Cuda.cpp               |   83 +-
 clang/lib/Driver/ToolChains/Cuda.h                 |    7 +-
 clang/lib/Format/ContinuationIndenter.cpp          |    7 +-
 clang/lib/Headers/__clang_cuda_complex_builtins.h  |    6 +-
 clang/lib/Headers/avx512fp16intrin.h               |  486 ++
 clang/lib/Headers/avx512vlfp16intrin.h             |  372 ++
 clang/lib/Headers/openmp_wrappers/complex          |   11 +-
 clang/lib/Headers/openmp_wrappers/complex.h        |    9 +
 clang/lib/Sema/SemaChecking.cpp                    |   11 +
 clang/lib/Sema/SemaConcept.cpp                     |    5 +-
 clang/lib/Sema/SemaDeclCXX.cpp                     |    9 +
 clang/lib/Sema/SemaExpr.cpp                        |  323 +-
 clang/test/CodeGen/X86/avx512fp16-builtins.c       |  833 +++
 clang/test/CodeGen/X86/avx512vlfp16-builtins.c     |  405 ++
 .../CodeGenCXX/dllexport-ctor-closure-nested.cpp   |   20 +
 .../usr/local/cuda/bin/.keep                       |    0
 .../bin => CUDA-new/usr/local/cuda/include}/.keep  |    0
 .../Inputs/CUDA-new/usr/local/cuda/include/cuda.h  |    7 +
 .../cuda/bin => CUDA-new/usr/local/cuda/lib}/.keep |    0
 .../bin => CUDA-new/usr/local/cuda/lib64}/.keep    |    0
 .../usr/local/cuda/nvvm/libdevice/libdevice.10.bc  |    0
 .../Inputs/CUDA-unknown/usr/local/cuda/version.txt |    1 -
 .../Inputs/CUDA_80/usr/local/cuda/include/cuda.h   |    7 +
 .../Inputs/CUDA_80/usr/local/cuda/version.txt      |    1 -
 .../Inputs/CUDA_90/usr/local/cuda/include/cuda.h   |    7 +
 clang/test/Driver/cuda-external-tools.cu           |   78 +-
 clang/test/Driver/cuda-march.cu                    |    6 +-
 clang/test/Driver/cuda-options-freebsd.cu          |  289 -
 clang/test/Driver/cuda-options.cu                  |   38 +-
 clang/test/Driver/cuda-ptxas-path.cu               |    2 +-
 clang/test/Driver/cuda-version-check.cu            |   18 +-
 clang/test/Driver/lto.cu                           |   14 +-
 clang/test/Driver/openmp-offload.c                 |   14 +-
 clang/test/Driver/opt-record.c                     |    2 +-
 clang/test/Driver/thinlto.cu                       |   14 +-
 .../Headers/amdgcn-openmp-device-math-complex.c    |   50 +
 clang/unittests/Format/FormatTestJS.cpp            |   44 +-
 compiler-rt/lib/asan/asan_interceptors.cpp         |   16 +-
 compiler-rt/lib/memprof/memprof_interceptors.cpp   |   12 +-
 compiler-rt/lib/msan/msan_interceptors.cpp         |   51 +-
 compiler-rt/lib/orc/c_api.h                        |   30 +-
 compiler-rt/lib/orc/wrapper_function_utils.h       |   16 +-
 compiler-rt/lib/profile/InstrProfilingFile.c       |    2 +-
 .../lib/profile/InstrProfilingPlatformFuchsia.c    |    3 +-
 .../sanitizer_common_interceptors.inc              |  432 +-
 ...sanitizer_common_interceptors_netbsd_compat.inc |    4 +-
 .../lib/sanitizer_common/sanitizer_libc.cpp        |   12 +
 compiler-rt/lib/sanitizer_common/sanitizer_libc.h  |    2 +
 .../sanitizer_common/tests/sanitizer_libc_test.cpp |   17 +
 .../lib/tsan/rtl/tsan_interceptors_posix.cpp       |    6 +-
 .../TestCases/Posix/replace_sigaction.cpp          |   66 +
 flang/docs/Extensions.md                           |    5 +
 flang/lib/Semantics/expression.cpp                 |   97 +-
 flang/lib/Semantics/resolve-names.cpp              |   74 +-
 flang/runtime/unit.cpp                             |   21 +-
 flang/test/Semantics/array-constr-values.f90       |    2 +-
 flang/test/Semantics/data11.f90                    |    9 +
 flang/test/Semantics/modfile25.f90                 |    2 +
 flang/test/Semantics/modfile26.f90                 |    5 +
 flang/test/Semantics/resolve106.f90                |    5 +
 flang/test/Semantics/resolve30.f90                 |    4 +-
 flang/test/Semantics/symbol05.f90                  |    4 +-
 libc/config/linux/aarch64/entrypoints.txt          |    9 +
 libc/config/linux/x86_64/entrypoints.txt           |   16 +-
 libc/config/windows/entrypoints.txt                |    9 +
 libc/src/CMakeLists.txt                            |    2 +-
 libc/src/stdlib/CMakeLists.txt                     |  108 +-
 libc/test/src/CMakeLists.txt                       |    2 +-
 libc/test/src/stdlib/CMakeLists.txt                |   98 +-
 libc/test/src/stdlib/atol_test.cpp                 |    2 +-
 libc/test/src/stdlib/atoll_test.cpp                |    8 +-
 libc/test/src/stdlib/strtol_test.cpp               |   64 +-
 libc/test/src/stdlib/strtoll_test.cpp              |   63 +-
 libc/test/src/stdlib/strtoul_test.cpp              |   57 +-
 libc/test/src/stdlib/strtoull_test.cpp             |   55 +-
 libc/utils/CPP/Limits.h                            |    8 +-
 libcxx/CMakeLists.txt                              |    8 -
 libcxx/docs/DesignDocs/CapturingConfigInfo.rst     |    4 -
 libcxx/include/__config                            |   28 +-
 libcxx/include/__config_site.in                    |    4 -
 libcxx/include/clocale                             |    2 -
 libcxx/include/cstdio                              |    6 -
 libcxx/include/cstring                             |    2 -
 libcxx/include/ctime                               |    2 -
 libcxx/include/cwchar                              |    4 -
 libcxx/include/fstream                             |   26 -
 libcxx/include/iostream                            |    4 -
 libcxx/include/locale                              |    2 +-
 libcxx/src/iostream.cpp                            |   14 -
 .../fopen.compile.fail.cpp                         |   18 -
 .../rename.compile.fail.cpp                        |   18 -
 .../asctime.thread-unsafe.compile.fail.cpp         |   19 -
 .../date.time/ctime.thread-unsafe.compile.fail.cpp |   19 -
 .../gmtime.thread-unsafe.compile.fail.cpp          |   19 -
 .../localtime.thread-unsafe.compile.fail.cpp       |   19 -
 .../test/std/depr/depr.c.headers/string_h.pass.cpp |    2 -
 .../test/std/depr/depr.c.headers/wchar_h.pass.cpp  |    6 -
 .../file.streams/c.files/cstdio.pass.cpp           |    6 -
 .../file.streams/fstreams/lit.local.cfg            |    2 -
 .../input.output/iostream.objects/init.pass.cpp    |    2 -
 .../narrow.stream.objects/cin.sh.cpp               |    2 -
 .../narrow.stream.objects/cout.sh.cpp              |    2 -
 .../wide.stream.objects/wcin.sh.cpp                |    2 -
 .../wide.stream.objects/wcout.sh.cpp               |    1 -
 .../support.runtime/ctime.pass.cpp                 |    2 -
 .../std/localization/c.locales/clocale.pass.cpp    |    6 -
 .../conversions/conversions.buffer/lit.local.cfg   |    2 -
 libcxx/test/std/strings/c.strings/cstring.pass.cpp |    2 -
 libcxx/test/std/strings/c.strings/cwchar.pass.cpp  |    4 -
 libcxx/test/support/platform_support.h             |   14 -
 libcxx/utils/libcxx/test/features.py               |    4 -
 libcxxabi/src/cxa_personality.cpp                  |    2 +-
 lldb/include/lldb/Core/Module.h                    |    4 +-
 lldb/include/lldb/Target/Language.h                |   14 +
 lldb/source/Core/CMakeLists.txt                    |    1 -
 lldb/source/Core/IOHandlerCursesGUI.cpp            |  152 +-
 lldb/source/Core/Module.cpp                        |  131 +-
 .../DynamicLoader/POSIX-DYLD/DYLDRendezvous.cpp    |   30 +
 .../POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp          |   54 +-
 .../Language/CPlusPlus/CPlusPlusLanguage.cpp       |   33 +
 .../Plugins/Language/CPlusPlus/CPlusPlusLanguage.h |    3 +
 lldb/source/Plugins/Language/ObjC/ObjCLanguage.cpp |   16 +
 lldb/source/Plugins/Language/ObjC/ObjCLanguage.h   |    3 +
 .../API/functionalities/dyld-launch-linux/Makefile |   15 +
 .../dyld-launch-linux/TestDyldLaunchLinux.py       |   46 +
 .../API/functionalities/dyld-launch-linux/main.cpp |    6 +
 .../dyld-launch-linux/signal_file.cpp              |    7 +
 .../dyld-launch-linux/signal_file.h                |    1 +
 llvm/include/llvm-c/Transforms/PassBuilder.h       |    2 +-
 llvm/include/llvm/Analysis/ScalarEvolution.h       |    4 +
 .../GlobalISel/LegalizationArtifactCombiner.h      |   25 +-
 llvm/include/llvm/CodeGen/TargetInstrInfo.h        |   12 +-
 llvm/include/llvm/DebugInfo/DWARF/DWARFFormValue.h |   13 +
 .../Orc/Shared/WrapperFunctionUtils.h              |   32 +-
 .../Orc/TargetProcess/OrcRPCTPCServer.h            |    5 +-
 llvm/include/llvm/IR/Attributes.h                  |    6 +
 llvm/include/llvm/IR/IntrinsicsX86.td              |   23 +
 llvm/include/llvm/ProfileData/InstrProf.h          |    4 +-
 llvm/include/llvm/Support/X86TargetParser.def      |   46 +
 .../llvm/Transforms/IPO/PassManagerBuilder.h       |    1 -
 .../llvm/Transforms/InstCombine/InstCombiner.h     |    8 -
 .../llvm/WindowsManifest/WindowsManifestMerger.h   |    3 +-
 llvm/lib/Analysis/DevelopmentModeInlineAdvisor.cpp |    2 +
 llvm/lib/Analysis/InstructionSimplify.cpp          |   17 +
 llvm/lib/Analysis/ScalarEvolution.cpp              |    8 +-
 llvm/lib/AsmParser/LLParser.cpp                    |    8 +-
 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp      |   47 +-
 llvm/lib/CodeGen/TargetInstrInfo.cpp               |    9 +-
 llvm/lib/DebugInfo/DWARF/DWARFDie.cpp              |   16 +-
 llvm/lib/DebugInfo/DWARF/DWARFFormValue.cpp        |   16 +-
 .../Orc/TargetProcess/RegisterEHFrames.cpp         |    8 +-
 .../RuntimeDyld/RTDyldMemoryManager.cpp            |    2 +-
 llvm/lib/ProfileData/InstrProf.cpp                 |   13 +-
 llvm/lib/Target/AArch64/AArch64InstrInfo.td        |    7 +-
 .../AArch64/GISel/AArch64InstructionSelector.cpp   |   97 +-
 .../Target/AArch64/GISel/AArch64LegalizerInfo.cpp  |    4 +-
 .../Target/AMDGPU/MCA/AMDGPUCustomBehaviour.cpp    |  303 +-
 llvm/lib/Target/AMDGPU/MCA/AMDGPUCustomBehaviour.h |   56 +-
 llvm/lib/Target/AMDGPU/SISchedule.td               |   10 +
 llvm/lib/Target/ARC/ARCISelLowering.cpp            |   36 +
 llvm/lib/Target/ARC/ARCISelLowering.h              |    3 +
 llvm/lib/Target/ARC/ARCInstrFormats.td             |   44 +
 llvm/lib/Target/ARC/ARCInstrInfo.td                |   13 +
 .../Target/ARC/Disassembler/ARCDisassembler.cpp    |   29 +
 llvm/lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp  |    2 +-
 llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp   |  172 +-
 llvm/lib/Target/M68k/M68kInstrInfo.td              |    2 +
 .../Target/M68k/MCTargetDesc/M68kInstPrinter.cpp   |    4 +-
 llvm/lib/Target/NVPTX/NVPTX.td                     |    4 +
 llvm/lib/Target/TargetMachine.cpp                  |    6 +-
 llvm/lib/Target/X86/CMakeLists.txt                 |    1 +
 llvm/lib/Target/X86/X86FloatingPoint.cpp           |    7 +-
 llvm/lib/Target/X86/X86ISelLowering.cpp            |   21 +-
 llvm/lib/Target/X86/X86InstrAVX512.td              |  118 +-
 llvm/lib/Target/X86/X86InstrFMA3Info.cpp           |   46 +-
 llvm/lib/Target/X86/X86InstrFoldTables.cpp         |  210 +
 llvm/lib/Target/X86/X86InstrFormats.td             |    1 -
 llvm/lib/Target/X86/X86InstrInfo.cpp               |   18 +
 llvm/lib/Target/X86/X86IntrinsicsInfo.h            |    6 +
 llvm/lib/Target/X86/X86Subtarget.cpp               |    8 +-
 .../AggressiveInstCombine/TruncInstCombine.cpp     |   34 +-
 .../Transforms/InstCombine/InstCombineAddSub.cpp   |   17 +-
 .../InstCombine/InstructionCombining.cpp           |   21 -
 .../Instrumentation/PGOInstrumentation.cpp         |   13 +-
 llvm/lib/Transforms/Scalar/GVN.cpp                 |    4 +-
 llvm/lib/Transforms/Utils/LoopUtils.cpp            |   53 +-
 llvm/lib/WindowsManifest/WindowsManifestMerger.cpp |    8 +-
 .../CodeGen/AArch64/GlobalISel/arm64-atomic.ll     |   38 +-
 .../CodeGen/AArch64/GlobalISel/legalize-and.mir    |   11 +-
 .../AArch64/GlobalISel/legalize-atomicrmw.mir      |    6 +-
 .../CodeGen/AArch64/GlobalISel/legalize-bswap.mir  |    6 +-
 .../CodeGen/AArch64/GlobalISel/legalize-cmp.mir    |   13 +-
 .../GlobalISel/legalize-cmpxchg-with-success.mir   |   27 +-
 .../AArch64/GlobalISel/legalize-cmpxchg.mir        |    6 +-
 .../AArch64/GlobalISel/legalize-combines.mir       |    7 +-
 .../CodeGen/AArch64/GlobalISel/legalize-ctpop.mir  |   12 +-
 .../GlobalISel/legalize-cttz-zero-undef.mir        |    6 +-
 .../CodeGen/AArch64/GlobalISel/legalize-cttz.mir   |    6 +-
 .../CodeGen/AArch64/GlobalISel/legalize-div.mir    |    6 +-
 .../CodeGen/AArch64/GlobalISel/legalize-divrem.mir |   15 +-
 .../CodeGen/AArch64/GlobalISel/legalize-ext.mir    |   25 +-
 .../GlobalISel/legalize-extract-vector-elt.mir     |   15 +-
 .../AArch64/GlobalISel/legalize-extracts.mir       |   12 +-
 .../AArch64/GlobalISel/legalize-fp-arith-fp16.mir  |  156 +
 .../CodeGen/AArch64/GlobalISel/legalize-fptoi.mir  |   15 +-
 .../CodeGen/AArch64/GlobalISel/legalize-freeze.mir |    3 +-
 .../AArch64/GlobalISel/legalize-inserts.mir        |  834 +--
 .../CodeGen/AArch64/GlobalISel/legalize-isnan.mir  |   15 +-
 .../CodeGen/AArch64/GlobalISel/legalize-itofp.mir  |   18 +-
 .../AArch64/GlobalISel/legalize-load-store.mir     |    8 +-
 .../AArch64/GlobalISel/legalize-memcpy-et-al.mir   |    3 +-
 .../AArch64/GlobalISel/legalize-merge-values.mir   |    7 +-
 .../AArch64/GlobalISel/legalize-min-max.mir        |   60 +-
 .../CodeGen/AArch64/GlobalISel/legalize-mul.mir    |   28 +-
 .../GlobalISel/legalize-non-pow2-load-store.mir    |   10 +-
 .../CodeGen/AArch64/GlobalISel/legalize-phi.mir    |   12 +-
 .../AArch64/GlobalISel/legalize-ptr-add.mir        |    3 +-
 .../AArch64/GlobalISel/legalize-ptrtoint.mir       |   22 +
 .../AArch64/GlobalISel/legalize-reduce-or.mir      |  147 +-
 .../CodeGen/AArch64/GlobalISel/legalize-rem.mir    |    9 +-
 .../CodeGen/AArch64/GlobalISel/legalize-sadde.mir  |    3 +-
 .../CodeGen/AArch64/GlobalISel/legalize-saddo.mir  |    5 +-
 .../AArch64/GlobalISel/legalize-saddsat.mir        |  110 +-
 .../CodeGen/AArch64/GlobalISel/legalize-select.mir |   12 +-
 .../CodeGen/AArch64/GlobalISel/legalize-shift.mir  |    9 +-
 .../CodeGen/AArch64/GlobalISel/legalize-simple.mir |   15 +-
 .../CodeGen/AArch64/GlobalISel/legalize-ssube.mir  |    3 +-
 .../CodeGen/AArch64/GlobalISel/legalize-ssubo.mir  |    5 +-
 .../AArch64/GlobalISel/legalize-ssubsat.mir        |  110 +-
 .../AArch64/GlobalISel/legalize-uadd-sat.mir       |   47 +-
 .../CodeGen/AArch64/GlobalISel/legalize-uadde.mir  |    3 +-
 .../CodeGen/AArch64/GlobalISel/legalize-uaddo.mir  |    5 +-
 .../AArch64/GlobalISel/legalize-usub-sat.mir       |   45 +-
 .../CodeGen/AArch64/GlobalISel/legalize-usube.mir  |    3 +-
 .../CodeGen/AArch64/GlobalISel/legalize-usubo.mir  |    5 +-
 .../AArch64/GlobalISel/legalize-vector-cmp.mir     |  108 +-
 .../legalizer-combiner-zext-trunc-crash.mir        |   17 +-
 .../AArch64/GlobalISel/legalizer-combiner.mir      |    6 +-
 .../AArch64/GlobalISel/retry-artifact-combine.mir  |    6 +-
 .../AArch64/GlobalISel/select-int-ptr-casts.mir    |   20 +
 .../test/CodeGen/AArch64/GlobalISel/select-ld2.mir |  232 +
 .../test/CodeGen/AArch64/GlobalISel/select-ld4.mir |  292 +
 llvm/test/CodeGen/AArch64/funnel-shift.ll          |   32 +
 .../AMDGPU/GlobalISel/artifact-combiner-anyext.mir |    6 +-
 .../artifact-combiner-concat-vectors.mir           |   18 +-
 .../GlobalISel/artifact-combiner-extract.mir       |    6 +-
 .../AMDGPU/GlobalISel/artifact-combiner-sext.mir   |   18 +-
 .../artifact-combiner-unmerge-values.mir           |  261 +-
 .../AMDGPU/GlobalISel/artifact-combiner-zext.mir   |   29 +-
 .../AMDGPU/GlobalISel/combine-ext-legalizer.mir    |    6 +-
 .../test/CodeGen/AMDGPU/GlobalISel/dummy-target.ll |   28 +-
 llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll        |  636 +-
 llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll        |  614 +-
 .../AMDGPU/GlobalISel/image_ls_mipmap_zero.a16.ll  |  128 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-add.mir     |  105 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-and.mir     |  247 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir  |   30 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir    |  228 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir |  776 +--
 .../AMDGPU/GlobalISel/legalize-bitreverse.mir      |   30 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-bswap.mir   |  174 +-
 .../GlobalISel/legalize-build-vector.s16.mir       |  300 +-
 .../AMDGPU/GlobalISel/legalize-concat-vectors.mir  |   18 +-
 .../AMDGPU/GlobalISel/legalize-constant.mir        |    6 +-
 .../AMDGPU/GlobalISel/legalize-ctlz-zero-undef.mir |   38 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-ctlz.mir    |   38 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-ctpop.mir   |   45 +-
 .../AMDGPU/GlobalISel/legalize-cttz-zero-undef.mir |   45 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-cttz.mir    |   45 +-
 .../GlobalISel/legalize-extract-vector-elt.mir     |  442 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-extract.mir |   63 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir    |   73 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir    |   44 +-
 .../AMDGPU/GlobalISel/legalize-fcanonicalize.mir   |   12 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-fcmp.mir    |   38 +-
 .../AMDGPU/GlobalISel/legalize-fcopysign.mir       |   18 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-fma.mir     |   51 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir |   30 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir |   30 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir    |   45 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir    |   52 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-fptosi.mir  |   63 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-fptoui.mir  |   63 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-fptrunc.mir |   22 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-freeze.mir  |   67 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-fshl.mir    |  473 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-fshr.mir    |  715 +--
 .../CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir    |   25 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir    |  165 +-
 .../GlobalISel/legalize-implicit-def-s1025.mir     |  308 +-
 .../AMDGPU/GlobalISel/legalize-implicit-def.mir    |   23 +-
 .../GlobalISel/legalize-insert-vector-elt.mir      |   49 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-insert.mir  |   39 +-
 .../AMDGPU/GlobalISel/legalize-intrinsic-round.mir |   25 +-
 .../AMDGPU/GlobalISel/legalize-inttoptr.mir        |    3 +-
 .../legalize-llvm.amdgcn.image.atomic.dim.a16.ll   |  126 +-
 .../legalize-llvm.amdgcn.image.dim.a16.ll          |  382 +-
 .../legalize-llvm.amdgcn.image.load.2d.d16.ll      |  264 +-
 .../legalize-llvm.amdgcn.image.sample.a16.ll       |  724 +--
 .../legalize-llvm.amdgcn.image.sample.g16.ll       |  142 +-
 .../legalize-llvm.amdgcn.image.store.2d.d16.ll     |   38 +-
 .../legalize-llvm.amdgcn.s.buffer.load.mir         |   48 +-
 .../GlobalISel/legalize-load-constant-32bit.mir    |   12 +-
 .../AMDGPU/GlobalISel/legalize-load-constant.mir   | 2499 +++-----
 .../AMDGPU/GlobalISel/legalize-load-flat.mir       | 2051 +++----
 .../AMDGPU/GlobalISel/legalize-load-global.mir     | 6393 +++++++-------------
 .../AMDGPU/GlobalISel/legalize-load-local.mir      | 5879 ++++++------------
 .../GlobalISel/legalize-load-memory-metadata.mir   |    6 +-
 .../AMDGPU/GlobalISel/legalize-load-private.mir    | 3808 ++++--------
 .../CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir    |  201 +-
 .../AMDGPU/GlobalISel/legalize-merge-values.mir    |  501 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-mul.mir     |   98 +-
 .../test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir |   92 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-phi.mir     |  111 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-ptr-add.mir |    9 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-ptrmask.mir |    3 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-sadde.mir   |   12 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-saddo.mir   |  247 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-saddsat.mir |  195 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-sdiv.mir    |  160 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-select.mir  |   64 +-
 .../AMDGPU/GlobalISel/legalize-sext-inreg.mir      |  155 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-sext.mir    |   84 +-
 .../AMDGPU/GlobalISel/legalize-sextload-flat.mir   |    6 +-
 .../AMDGPU/GlobalISel/legalize-sextload-global.mir |    6 +-
 .../AMDGPU/GlobalISel/legalize-sextload-local.mir  |    3 +-
 .../GlobalISel/legalize-sextload-private.mir       |    3 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-shl.mir     |  203 +-
 .../AMDGPU/GlobalISel/legalize-shuffle-vector.mir  |   60 +-
 .../GlobalISel/legalize-shuffle-vector.s16.mir     |  206 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-sitofp.mir  |   39 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-smax.mir    |  133 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-smin.mir    |  133 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-smulh.mir   |  170 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-smulo.mir   |  208 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-srem.mir    |  160 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-sshlsat.mir |  164 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-ssube.mir   |   12 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-ssubo.mir   |  247 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-ssubsat.mir |  195 +-
 .../AMDGPU/GlobalISel/legalize-store-global.mir    | 3247 ++++------
 .../CodeGen/AMDGPU/GlobalISel/legalize-store.mir   |  187 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-sub.mir     |  105 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-uadde.mir   |   18 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-uaddo.mir   |   66 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-uaddsat.mir |  195 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-ubfx.mir    |   24 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-udiv.mir    |  160 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-uitofp.mir  |   39 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-umax.mir    |  127 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-umin.mir    |  127 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-umulh.mir   |  189 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-umulo.mir   |  208 +-
 .../AMDGPU/GlobalISel/legalize-unmerge-values.mir  |  461 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-urem.mir    |  160 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-ushlsat.mir |  164 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-usube.mir   |   18 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-usubo.mir   |   66 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-usubsat.mir |  195 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-xor.mir     |   92 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-zext.mir    |  144 +-
 .../AMDGPU/GlobalISel/legalize-zextload-flat.mir   |    6 +-
 .../AMDGPU/GlobalISel/legalize-zextload-global.mir |    6 +-
 .../AMDGPU/GlobalISel/legalize-zextload-local.mir  |    3 +-
 .../GlobalISel/legalize-zextload-private.mir       |    3 +-
 llvm/test/CodeGen/AMDGPU/remat-sop.mir             |   60 +
 llvm/test/CodeGen/ARC/intrinsics.ll                |   17 +-
 .../ARM/GlobalISel/arm-legalize-bitcounts.mir      |   12 +-
 .../CodeGen/ARM/GlobalISel/arm-legalize-casts.mir  |    3 +-
 .../ARM/GlobalISel/arm-legalize-control-flow.mir   |    8 +-
 .../CodeGen/ARM/GlobalISel/arm-legalize-divmod.mir |   48 +-
 .../CodeGen/ARM/GlobalISel/arm-legalize-exts.mir   |    3 +-
 .../CodeGen/ARM/GlobalISel/arm-legalize-fp.mir     |   82 +-
 .../ARM/GlobalISel/arm-legalize-load-store.mir     |    3 +-
 llvm/test/CodeGen/ARM/arm-shrink-wrapping-linux.ll |   28 +-
 llvm/test/CodeGen/ARM/cfguard-checks.ll            |    4 +-
 llvm/test/CodeGen/ARM/funnel-shift-rot.ll          |   32 +-
 llvm/test/CodeGen/ARM/funnel-shift.ll              |   30 +-
 .../test/CodeGen/ARM/illegal-bitfield-loadstore.ll |   30 +-
 llvm/test/CodeGen/ARM/neon-copy.ll                 |   10 +-
 llvm/test/CodeGen/M68k/CollapseMOVEM.mir           |    8 +-
 .../M68k/Encoding/Data/Classes/MxMOVEM_MR.mir      |   52 -
 .../M68k/Encoding/Data/Classes/MxMOVEM_RM.mir      |   52 -
 .../test/CodeGen/Mips/GlobalISel/legalizer/add.mir |   57 +-
 .../CodeGen/Mips/GlobalISel/legalizer/bitwise.mir  |  121 +-
 .../CodeGen/Mips/GlobalISel/legalizer/branch.mir   |    3 +-
 .../Mips/GlobalISel/legalizer/constants.mir        |   29 +-
 .../CodeGen/Mips/GlobalISel/legalizer/ctlz.mir     |    3 +-
 .../CodeGen/Mips/GlobalISel/legalizer/cttz.mir     |   15 +-
 .../Mips/GlobalISel/legalizer/dyn_stackalloc.mir   |    8 +-
 .../CodeGen/Mips/GlobalISel/legalizer/fcmp.mir     |   12 +-
 .../GlobalISel/legalizer/fptosi_and_fptoui.mir     |   84 +-
 .../CodeGen/Mips/GlobalISel/legalizer/icmp.mir     |  110 +-
 .../GlobalISel/legalizer/jump_table_and_brjt.mir   |   14 +-
 .../test/CodeGen/Mips/GlobalISel/legalizer/mul.mir |   81 +-
 .../test/CodeGen/Mips/GlobalISel/legalizer/phi.mir |   48 +-
 .../Mips/GlobalISel/legalizer/rem_and_div.mir      |   72 +-
 .../CodeGen/Mips/GlobalISel/legalizer/select.mir   |   42 +-
 .../GlobalISel/legalizer/sitofp_and_uitofp.mir     |   48 +-
 .../store_split_because_of_memsize_or_align.mir    |   42 +-
 .../test/CodeGen/Mips/GlobalISel/legalizer/sub.mir |   68 +-
 .../legalizer/truncStore_and_aExtLoad.mir          |    9 +-
 .../GlobalISel/legalizer/zextLoad_and_sextLoad.mir |    6 +-
 .../CodeGen/Mips/GlobalISel/llvm-ir/bitwise.ll     |    7 +-
 .../CodeGen/Mips/GlobalISel/llvm-ir/constants.ll   |   20 +-
 .../test/CodeGen/Mips/GlobalISel/llvm-ir/select.ll |    3 +-
 llvm/test/CodeGen/Mips/llvm-ir/ashr.ll             |  227 +-
 llvm/test/CodeGen/Mips/llvm-ir/lshr.ll             |  206 +-
 llvm/test/CodeGen/Mips/llvm-ir/shl.ll              |   95 +-
 llvm/test/CodeGen/Mips/llvm-ir/sub.ll              |   31 +-
 llvm/test/CodeGen/Mips/tls.ll                      |    4 +-
 llvm/test/CodeGen/PowerPC/2007-09-08-unaligned.ll  |   16 +-
 llvm/test/CodeGen/PowerPC/funnel-shift.ll          |  390 ++
 llvm/test/CodeGen/PowerPC/unaligned.ll             |   16 +-
 llvm/test/CodeGen/RISCV/atomic-rmw.ll              |  120 +-
 llvm/test/CodeGen/RISCV/atomic-signext.ll          |   24 +-
 llvm/test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll   |   96 +-
 llvm/test/CodeGen/RISCV/rv32i-rv64i-half.ll        |   12 +-
 llvm/test/CodeGen/RISCV/rv32zbb-zbp.ll             |  526 +-
 llvm/test/CodeGen/RISCV/rv32zbb.ll                 |   94 +-
 llvm/test/CodeGen/RISCV/rv32zbp.ll                 |  282 +-
 llvm/test/CodeGen/RISCV/rv32zbt.ll                 |  348 +-
 .../CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll  |  324 +-
 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll |  146 +-
 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll  | 3540 +++++------
 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll  |  720 +--
 llvm/test/CodeGen/RISCV/srem-vector-lkk.ll         |  208 +-
 llvm/test/CodeGen/RISCV/urem-vector-lkk.ll         |  190 +-
 llvm/test/CodeGen/Thumb/dyn-stackalloc.ll          |    7 +-
 .../tail-pred-disabled-in-loloops.ll               |   14 +-
 .../LowOverheadLoops/varying-outer-2d-reduction.ll |   64 +-
 .../CodeGen/Thumb2/LowOverheadLoops/while-loops.ll |   67 +-
 llvm/test/CodeGen/Thumb2/ldr-str-imm12.ll          |   30 +-
 llvm/test/CodeGen/Thumb2/mve-float16regloops.ll    |   82 +-
 llvm/test/CodeGen/Thumb2/mve-float32regloops.ll    |   98 +-
 llvm/test/CodeGen/Thumb2/mve-postinc-dct.ll        |  529 +-
 llvm/test/CodeGen/X86/GlobalISel/ashr-scalar.ll    |    4 +-
 .../X86/GlobalISel/legalize-memop-scalar-32.mir    |    3 +-
 .../X86/GlobalISel/legalize-memop-scalar-64.mir    |    3 +-
 .../CodeGen/X86/GlobalISel/legalize-mul-scalar.mir |    3 +-
 .../CodeGen/X86/GlobalISel/legalize-or-scalar.mir  |    3 +-
 llvm/test/CodeGen/X86/GlobalISel/legalize-phi.mir  |    3 +-
 llvm/test/CodeGen/X86/GlobalISel/legalize-sub.mir  |    3 +-
 llvm/test/CodeGen/X86/GlobalISel/lshr-scalar.ll    |    4 +-
 llvm/test/CodeGen/X86/GlobalISel/shl-scalar.ll     |    6 +-
 .../X86/GlobalISel/x86_64-legalize-fcmp.mir        |   84 +-
 .../X86/GlobalISel/x86_64-legalize-sitofp.mir      |   28 +-
 .../X86/GlobalISel/x86_64-legalize-zext.mir        |    9 +-
 llvm/test/CodeGen/X86/addcarry.ll                  |   20 +-
 llvm/test/CodeGen/X86/avx512-mask-op.ll            |    2 +-
 .../CodeGen/X86/avx512bw-intrinsics-upgrade.ll     |  172 +-
 llvm/test/CodeGen/X86/avx512fp16-fma-commute.ll    | 1363 +++++
 llvm/test/CodeGen/X86/avx512fp16-fma-intrinsics.ll |  585 ++
 .../CodeGen/X86/avx512fp16vl-fma-intrinsics.ll     |  530 ++
 .../CodeGen/X86/avx512vbmi2-intrinsics-upgrade.ll  |    2 +-
 llvm/test/CodeGen/X86/avx512vbmi2-intrinsics.ll    |    2 +-
 llvm/test/CodeGen/X86/bitreverse.ll                |    6 +-
 .../test/CodeGen/X86/build_fp16_constant_vector.ll |   21 +
 llvm/test/CodeGen/X86/callbr-asm-blockplacement.ll |   12 +-
 llvm/test/CodeGen/X86/combine-bitreverse.ll        |    6 +-
 llvm/test/CodeGen/X86/dag-update-nodetomatch.ll    |   17 +-
 llvm/test/CodeGen/X86/fp-strict-scalar-fp16.ll     |   19 +
 llvm/test/CodeGen/X86/funnel-shift.ll              |  262 +-
 llvm/test/CodeGen/X86/inalloca-invoke.ll           |    2 +-
 llvm/test/CodeGen/X86/licm-regpressure.ll          |   28 +-
 llvm/test/CodeGen/X86/load-partial.ll              |   18 +-
 llvm/test/CodeGen/X86/pr35982.ll                   |  104 +-
 llvm/test/CodeGen/X86/ragreedy-hoist-spill.ll      |   40 +-
 llvm/test/CodeGen/X86/sdiv_fix.ll                  |    5 +-
 .../CodeGen/X86/stack-folding-fp-avx512fp16-fma.ll | 2526 ++++++++
 .../X86/stack-folding-fp-avx512fp16vl-fma.ll       | 1595 +++++
 llvm/test/CodeGen/X86/vec-strict-128-fp16.ll       |   12 +
 llvm/test/CodeGen/X86/vec-strict-256-fp16.ll       |   12 +
 llvm/test/CodeGen/X86/vec-strict-512-fp16.ll       |   12 +
 llvm/test/CodeGen/X86/vector-bitreverse.ll         |  152 +-
 llvm/test/CodeGen/X86/vector-fshl-rot-128.ll       |   26 +-
 llvm/test/CodeGen/X86/vector-fshl-rot-256.ll       |   16 +-
 llvm/test/CodeGen/X86/vector-fshl-rot-512.ll       |  192 +-
 llvm/test/CodeGen/X86/vector-fshr-128.ll           |  204 +-
 llvm/test/CodeGen/X86/vector-fshr-256.ll           |   58 +-
 llvm/test/CodeGen/X86/vector-fshr-rot-128.ll       |   26 +-
 llvm/test/CodeGen/X86/vector-fshr-rot-256.ll       |   16 +-
 llvm/test/CodeGen/X86/vector-fshr-rot-512.ll       |  192 +-
 llvm/test/CodeGen/X86/vector-rotate-128.ll         |   26 +-
 llvm/test/CodeGen/X86/vector-rotate-256.ll         |   16 +-
 .../X86/vector-shuffle-combining-avx512bw.ll       |    8 +-
 .../X86/vector-shuffle-combining-avx512vbmi.ll     |    2 +-
 llvm/test/CodeGen/X86/xmulo.ll                     |   12 +-
 .../InstrRef/x86-fp-stackifier-drop-locations.mir  |   16 +-
 .../test/MC/AArch64/SME/streaming-mode-neon-bf16.s |   16 +
 .../MC/AArch64/SME/streaming-mode-neon-negative.s  |   10 +-
 llvm/test/MC/ARM/Windows/literals-comments.s       |   15 +-
 llvm/test/MC/Disassembler/ARC/ldst.txt             |   32 +
 llvm/test/MC/Disassembler/X86/avx512fp16.txt       |  720 +++
 llvm/test/MC/Disassembler/X86/avx512fp16vl.txt     |  720 +++
 llvm/test/MC/M68k/Data/Classes/MxMOVEM_MR.s        |   16 +
 llvm/test/MC/M68k/Data/Classes/MxMOVEM_RM.s        |   16 +
 llvm/test/MC/M68k/instructions.s                   |    4 +
 llvm/test/MC/X86/avx512fp16.s                      |  720 +++
 llvm/test/MC/X86/avx512fp16vl.s                    |  720 +++
 llvm/test/MC/X86/intel-syntax-avx512fp16.s         |  720 +++
 llvm/test/MC/X86/intel-syntax-avx512fp16vl.s       |  720 +++
 .../Transforms/AggressiveInstCombine/trunc_ashr.ll |   87 +-
 .../Transforms/AggressiveInstCombine/trunc_lshr.ll |   17 -
 .../test/Transforms/GVN/gvn-loop-load-pre-order.ll |   21 +-
 .../Transforms/IndVarSimplify/exit_value_test2.ll  |    4 +-
 .../Transforms/Inline/ML/dev-mode-log-deleted.ll   |   32 +
 .../InstCombine/gep-combine-loop-invariant.ll      |   12 +-
 llvm/test/Transforms/InstCombine/gep-custom-dl.ll  |    4 +-
 llvm/test/Transforms/InstCombine/getelementptr.ll  |    4 +-
 .../Transforms/InstCombine/minmax-intrinsics.ll    |    4 +-
 .../test/Transforms/InstCombine/reassociate-nuw.ll |    5 +-
 llvm/test/Transforms/InstCombine/select-gep.ll     |   12 +-
 llvm/test/Transforms/InstCombine/shift.ll          |    4 +-
 llvm/test/Transforms/InstCombine/sub.ll            |    9 +-
 llvm/test/Transforms/InstSimplify/or.ll            |   97 +
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 .../loops-with-irreducible-subloops.ll             |    4 +-
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 llvm/test/Transforms/LoopDeletion/pr49967.ll       |    6 +-
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 llvm/test/Transforms/LoopDeletion/zero-btc.ll      |   38 +-
 llvm/test/Transforms/LoopIdiom/basic.ll            |   47 +
 .../LoopVectorize/AArch64/sve-vector-reverse.ll    |  100 +-
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 .../X86/x86-interleaved-accesses-masked-group.ll   |   60 +-
 .../x86-interleaved-store-accesses-with-gaps.ll    |   58 +-
 .../LoopVectorize/consecutive-ptr-uniforms.ll      |    4 +-
 .../LoopVectorize/interleaved-accesses.ll          |   62 +-
 .../PGOProfile/Inputs/thinlto_cspgo_bar_gen.ll     |    5 -
 llvm/test/Transforms/PGOProfile/lto_cspgo_gen.ll   |   32 +
 .../Transforms/PGOProfile/thinlto_cspgo_gen.ll     |   18 +-
 llvm/test/tools/llvm-mca/AMDGPU/gfx10-double.s     |   68 +-
 llvm/test/tools/llvm-mca/AMDGPU/gfx9-retireooo.s   |  233 +
 llvm/test/tools/llvm-reduce/custom-delta-passes.ll |    6 +-
 llvm/test/tools/llvm-reduce/remove-module-data.ll  |   28 +
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 .../tools/llvm-xray/AArch64/extract-instrmap.test  |    2 +
 .../llvm-xray/X86/convert-with-debug-syms.txt      |    3 +-
 .../tools/llvm-xray/X86/extract-instrmap-pie.ll    |    8 +-
 llvm/tools/llvm-mt/llvm-mt.cpp                     |    3 +-
 llvm/tools/llvm-reduce/CMakeLists.txt              |    2 +-
 llvm/tools/llvm-reduce/DeltaManager.cpp            |    4 +-
 llvm/tools/llvm-reduce/deltas/ReduceModuleData.cpp |   52 +
 ...{ReduceModuleInlineAsm.h => ReduceModuleData.h} |    8 +-
 .../llvm-reduce/deltas/ReduceModuleInlineAsm.cpp   |   32 -
 llvm/tools/llvm-xray/xray-converter.cpp            |    6 +-
 llvm/tools/llvm-xray/xray-extract.cpp              |   13 +-
 .../unittests/CodeGen/GlobalISel/LegalizerTest.cpp |    7 +-
 llvm/unittests/DebugInfo/DWARF/DWARFDieTest.cpp    |  553 ++
 .../ExecutionSessionWrapperFunctionCallsTest.cpp   |    6 +-
 llvm/utils/gn/secondary/libcxx/include/BUILD.gn    |    4 -
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 llvm/utils/lit/lit/cl_arguments.py                 |    5 +-
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 llvm/utils/lit/tests/test-output-micro-resultdb.py |   63 +
 llvm/utils/lit/tests/test-output-resultdb.py       |   22 +
 mlir/docs/OpDefinitions.md                         |   18 +-
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 mlir/include/mlir/TableGen/Argument.h              |    2 +
 mlir/include/mlir/TableGen/Type.h                  |    7 +
 .../include/mlir/Target/LLVMIR/ModuleTranslation.h |   18 +-
 mlir/lib/Conversion/AsyncToLLVM/AsyncToLLVM.cpp    |    2 +-
 mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp         |  147 +-
 .../Linalg/Transforms/ElementwiseOpFusion.cpp      |   32 +-
 .../Dialect/SCF/Transforms/LoopSpecialization.cpp  |    6 +-
 .../SparseTensor/IR/SparseTensorDialect.cpp        |    2 -
 .../Transforms/SparseTensorConversion.cpp          |  149 +-
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 mlir/lib/Dialect/StandardOps/IR/Ops.cpp            |   87 +-
 mlir/lib/Dialect/Tensor/IR/TensorOps.cpp           |   74 +-
 mlir/lib/ExecutionEngine/SparseUtils.cpp           |  121 +-
 mlir/lib/IR/AffineMap.cpp                          |    8 +
 mlir/lib/IR/Operation.cpp                          |   32 +-
 mlir/lib/IR/OperationSupport.cpp                   |   67 +-
 mlir/lib/TableGen/Argument.cpp                     |    8 +
 mlir/lib/TableGen/Operator.cpp                     |   10 +-
 mlir/lib/TableGen/Type.cpp                         |    9 +
 mlir/lib/Target/LLVMIR/ModuleTranslation.cpp       |   74 +
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 mlir/test/Dialect/SparseTensor/conversion.mlir     |   79 +-
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 mlir/test/lib/Dialect/Test/TestOps.td              |    8 +
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 mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp        |  312 +-
 mlir/tools/mlir-tblgen/OpFormatGen.cpp             |  167 +-
 .../libomptarget/deviceRTLs/amdgcn/CMakeLists.txt  |    5 +-
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 openmp/libomptarget/plugins/amdgpu/CMakeLists.txt  |    1 -
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 openmp/libomptarget/plugins/amdgpu/src/rtl.cpp     |   12 +-
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[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-O2 updated (50f4ae58eb13 -> d2bb6d512c0f)