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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_O3 in repository toolchain/ci/binutils-gdb.
from 45c06bb712 binutils: merge doc subdir up a level adds c7a92c872b gprof: enable silent build rules adds c7d1b270c2 libctf: enable silent build rules adds 48b5f33ab1 ld: enable silent build rules adds ae8e528122 zlib: enable silent build rules adds ee083a9e7c RISC-V: Dump vset[i]vli immediate as numbers once vsew or vl [...] adds abfdb09f01 RISC-V: The vtype immediate with more than the defined 8 bit [...]
No new revisions were added by this update.
Summary of changes: gas/testsuite/gas/riscv/vector-insns.d | 52 +++++++++++----------------- gas/testsuite/gas/riscv/vector-insns.s | 57 ++++++++++++------------------- gprof/Makefile.am | 16 ++++----- gprof/Makefile.in | 16 ++++----- gprof/configure | 43 +++++++++++++++++++++-- gprof/configure.ac | 1 + include/opcode/riscv.h | 2 -- ld/Makefile.am | 62 +++++++++++++++++----------------- ld/Makefile.in | 62 +++++++++++++++++----------------- ld/configure | 43 +++++++++++++++++++++-- ld/configure.ac | 1 + libctf/Makefile.am | 2 +- libctf/configure | 43 +++++++++++++++++++++-- libctf/configure.ac | 1 + opcodes/riscv-dis.c | 6 ++-- opcodes/riscv-opc.c | 4 +-- zlib/configure | 43 +++++++++++++++++++++-- zlib/configure.ac | 1 + 18 files changed, 294 insertions(+), 161 deletions(-)