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from da2d75af601 RISC-V: Fix 'REQUIREMENT' for machine_mode 'MODE' in vector [...] new 17c796c7174 [RISC-V] correct machine mode in save-restore cfi RTL. new 7805890428c RISC-V: Support RVV FP16 ZVFH Reduction floating-point intr [...] new d1344c41800 RISC-V] add TC for save-restore cfi directives.
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Summary of changes: gcc/config/riscv/riscv-vector-builtins-types.def | 7 +++ gcc/config/riscv/riscv.cc | 10 ++-- gcc/config/riscv/vector-iterators.md | 12 +++++ .../gcc.target/riscv/rvv/base/zvfh-intrinsic.c | 58 +++++++++++++++++++++- .../gcc.target/riscv/save-restore-cfi-2.c | 16 ++++++ gcc/testsuite/gcc.target/riscv/save-restore-cfi.c | 17 +++++++ 6 files changed, 113 insertions(+), 7 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/save-restore-cfi-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/save-restore-cfi.c