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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu/gnu-release-arm-bootstrap_ubsan in repository toolchain/ci/gcc.
from e6280f66297 Fix PR target/97939 adds 06d68f2b837 Daily bump. adds 90ed2b9e92f Daily bump. adds 6b7ab0e565d Backport of the patch for PR target/91816 adds d7026d80fef Daily bump. adds 5005e6c2a8a middle-end/97554 - avoid overflow in alloc size compute adds da7a7d4f0f9 testsuite/98002 - fix gcc.dg/strncmp-2.c adds 56d71887c90 Daily bump. adds 6178c27b4bb tree-optimization/96514 - avoid if-converting control-alter [...] adds a5fff78405c tree-optimization/96370 - make reassoc expr rewrite more robust adds 92b6627874c tree-optimization/96579 - another special-operands fix in reassoc adds 86b25a1a5e1 tree-optimization/97081 - fix wrong-code with vectorized shift adds f75352bdb13 testsuite: add another test for the rotate vectorization mi [...] adds f720a0d7762 tree-optimization/97255 - missing vector bool pattern of SR [...] adds 165ae61a9f7 tree-optimization/97812 - fix range query in VRP assert discovery adds 50576790573 middle-end/96369 - fix missed short-circuiting during range [...] adds 53d76fe758a tree-optimization/96075 - fix bogus misalignment calculation
No new revisions were added by this update.
Summary of changes: gcc/ChangeLog | 66 +++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/config/arm/arm-protos.h | 2 + gcc/config/arm/arm.c | 33 ++++++++++ gcc/config/arm/arm.md | 112 +++++++++++++++++++++++++-------- gcc/fold-const.c | 7 +++ gcc/sbitmap.c | 3 +- gcc/testsuite/ChangeLog | 16 +++++ gcc/testsuite/c-c++-common/pr96369.c | 12 ++++ gcc/testsuite/g++.dg/vect/pr97255.cc | 44 +++++++++++++ gcc/testsuite/gcc.dg/pr96370.c | 8 +++ gcc/testsuite/gcc.dg/pr96514.c | 27 ++++++++ gcc/testsuite/gcc.dg/pr96579.c | 4 ++ gcc/testsuite/gcc.dg/strncmp-2.c | 1 + gcc/testsuite/gcc.dg/torture/pr97812.c | 15 +++++ gcc/testsuite/gcc.dg/vect/pr97081-2.c | 32 ++++++++++ gcc/testsuite/gcc.dg/vect/pr97081.c | 26 ++++++++ gcc/testsuite/gcc.dg/vect/slp-46.c | 96 ++++++++++++++++++++++++++++ gcc/testsuite/gcc.target/arm/pr91816.c | 64 +++++++++++++++++++ gcc/tree-if-conv.c | 5 ++ gcc/tree-ssa-reassoc.c | 23 ++++--- gcc/tree-vect-data-refs.c | 2 +- gcc/tree-vect-patterns.c | 11 ++-- gcc/tree-vrp.c | 10 ++- 24 files changed, 579 insertions(+), 42 deletions(-) create mode 100644 gcc/testsuite/c-c++-common/pr96369.c create mode 100644 gcc/testsuite/g++.dg/vect/pr97255.cc create mode 100644 gcc/testsuite/gcc.dg/pr96370.c create mode 100644 gcc/testsuite/gcc.dg/pr96514.c create mode 100644 gcc/testsuite/gcc.dg/pr96579.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr97812.c create mode 100644 gcc/testsuite/gcc.dg/vect/pr97081-2.c create mode 100644 gcc/testsuite/gcc.dg/vect/pr97081.c create mode 100644 gcc/testsuite/gcc.dg/vect/slp-46.c create mode 100644 gcc/testsuite/gcc.target/arm/pr91816.c