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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig in repository toolchain/ci/binutils-gdb.
from 089485ff86 h8300 complains about new section defined without attributes adds 22e6d16f9b [PR cli/17290] gdb/doc: Fix show remote interrupt-*. adds afadac6170 Automatic date update in version.in adds 6a780b6766 Fix completion related libstdc++ assert when using -D_GLIBCXX_DEBUG adds 3d73d29e4e RISC-V: Add bfd/cpu-riscv.h to support all spec versions con [...] adds b0e4d2bd9b gdb: add missing full stops in --help adds a364a116f9 ld: remove stray debug fprintf adds acde209241 gdb/testsuite: only run gdb.arch/i386-biarch-core.exp on sui [...] adds 8568422270 Fix a problem merging empty annobin notes on ppc64le targets. adds 26f53cd385 Introduce expression::evaluate adds 668c18f17f Automatic date update in version.in adds 3685de750e binutils: Avoid renaming over existing files adds 0be51eb4c3 pr26548 test adds 2f973f134d Wrong ELF class plugin vs. gcc ld version adds 5a9f5403c7 RISC-V: PR27158, fixed UJ/SB types and added CSS/CL/CS types [...] adds 8488c357ce amd64-linux-siginfo.c: Adjust include order to avoid gnulib error adds 0257c2ff4f Fix compile time warnings when building riscv assembler. adds ca6afb81ca Automatic date update in version.in adds c3bf9dc5aa Include ld-lib.exp from ctf-lib.exp adds 4d496013a2 Fail run_dump_test when an error is expected but not seen adds 8c3853d9e8 readelf: Replace procesor with processor adds 3e8bb3e934 sim: merge configure.tgt into configure.ac adds f4f60336da libctf, include: find types of symbols by name adds 03c653093d libctf: add a NEWS adds f9eb406771 Automatic date update in version.in adds 93993f6784 libctf AC_CANONICAL_TARGET adds 89753bbf81 Warn when a script redefines a symbol adds 760b3e8bc9 sim: common: split up acinclude.m4 into individual m4 files adds 48ef615826 Automatic date update in version.in adds e9d18e0649 Don't handle BFD_RELOC_16 in XCOFF reloc_type_lookup adds de146e1946 gdb: push target earlier in procfs_target::attach (PR 27435) adds f53fc42716 gdb: add asserts in thread code adds 15908a11ba Change target_bfd_reopen to take a gdb_bfd_ref_ptr adds f16ccf47d8 Automatic date update in version.in adds 897608ed56 gdb: linux-nat: make linux_nat_filter_event return void adds 1a48f0027d gdbserver: linux-low: make linux_process_target::filter_even [...] adds 616c069a3f gdb/dwarf: don't enqueue CU in maybe_queue_comp_unit if alre [...] adds 08ac57714c gdb/dwarf: create and destroy dwarf2_per_bfd's CUs-to-expand queue adds cca8873dd5 PR27456, lstat in rename.c on MinGW adds c42c71a152 Use make_tempname file descriptor in smart_rename adds 55add51eef PR23691, gas .y files vs. automatic make dependencies adds 8139dc77d9 Automatic date update in version.in adds 93af1b046b PR27459, segmentation fault in go32exe_check_format adds c74147bbe0 Remove support for old v1 & v2 style GNU build notes.
No new revisions were added by this update.
Summary of changes: bfd/ChangeLog | 45 ++ bfd/Makefile.am | 2 +- bfd/Makefile.in | 2 +- bfd/coff-rs6000.c | 3 - bfd/coff-stgo32.c | 4 +- bfd/coff64-rs6000.c | 3 - bfd/cpu-riscv.c | 123 +-- bfd/cpu-riscv.h | 81 ++ bfd/elfnn-riscv.c | 39 +- bfd/elfxx-riscv.c | 15 +- bfd/elfxx-riscv.h | 12 - bfd/po/SRC-POTFILES.in | 1 + bfd/version.h | 2 +- binutils/ChangeLog | 59 ++ binutils/ar.c | 18 +- binutils/arsup.c | 20 +- binutils/bucomm.h | 3 +- binutils/objcopy.c | 76 +- binutils/readelf.c | 15 +- binutils/rename.c | 217 ++--- binutils/testsuite/binutils-all/readelf.exp | 2 +- binutils/testsuite/lib/binutils-common.exp | 686 ++++++++-------- gas/ChangeLog | 53 ++ gas/Makefile.am | 150 +--- gas/Makefile.in | 147 ++-- gas/config/bfin-lex-wrapper.c | 2 +- gas/config/bfin-lex.l | 2 +- gas/config/tc-riscv.c | 318 +++++--- gas/configure | 8 +- gas/configure.ac | 8 +- gas/doc/c-riscv.texi | 160 ++-- gas/po/POTFILES.in | 1 + gas/testsuite/gas/riscv/insn.d | 26 +- gas/testsuite/gas/riscv/insn.s | 24 +- gdb/ChangeLog | 74 ++ gdb/ada-lang.c | 4 +- gdb/bfd-target.c | 10 +- gdb/bfd-target.h | 9 +- gdb/doc/ChangeLog | 6 + gdb/doc/gdb.texinfo | 4 +- gdb/dwarf2/read.c | 144 ++-- gdb/dwarf2/read.h | 2 +- gdb/eval.c | 47 +- gdb/expression.h | 5 + gdb/inf-ptrace.c | 16 - gdb/linux-nat.c | 24 +- gdb/main.c | 4 +- gdb/nat/amd64-linux-siginfo.c | 2 +- gdb/procfs.c | 14 +- gdb/riscv-tdep.c | 24 +- gdb/solib-svr4.c | 5 +- gdb/target.h | 14 + gdb/testsuite/ChangeLog | 4 + gdb/testsuite/gdb.arch/i386-biarch-core.exp | 5 + gdb/thread.c | 4 + gdbserver/ChangeLog | 7 + gdbserver/linux-low.cc | 20 +- gdbserver/linux-low.h | 8 +- include/ChangeLog | 18 + include/bfdlink.h | 8 +- include/ctf-api.h | 4 + include/opcode/riscv.h | 204 ++--- ld/ChangeLog | 18 + ld/ldexp.c | 15 +- ld/ldmain.c | 4 +- ld/testplug.c | 5 +- ld/testsuite/ld-i386/property-x86-isa1.d | 2 +- ld/testsuite/ld-scripts/defined5.d | 5 +- ld/testsuite/ld-x86-64/property-x86-isa1-x32.d | 2 +- ld/testsuite/ld-x86-64/property-x86-isa1.d | 2 +- ld/testsuite/lib/ld-lib.exp | 144 ++-- libctf/ChangeLog | 66 ++ libctf/Makefile.in | 7 + libctf/NEWS | 26 + libctf/configure | 206 +++-- libctf/configure.ac | 3 + libctf/ctf-archive.c | 180 +++-- libctf/ctf-impl.h | 6 +- libctf/ctf-lookup.c | 232 +++++- libctf/ctf-open.c | 1 + libctf/libctf.ver | 6 + libctf/testsuite/config/default.exp | 1 + libctf/testsuite/lib/ctf-lib.exp | 174 +--- .../conflicting-type-syms-a.c} | 0 .../conflicting-type-syms-b.c} | 0 .../libctf-lookup/conflicting-type-syms.c | 99 +++ .../libctf-lookup/conflicting-type-syms.lk | 7 + libctf/testsuite/libctf-lookup/enum-symbol-obj.lk | 5 + libctf/testsuite/libctf-lookup/enum-symbol.c | 115 +-- .../symtypetab-nonlinker-writeout.c | 34 + opcodes/ChangeLog | 22 + opcodes/riscv-dis.c | 58 +- opcodes/riscv-opc.c | 121 +-- sim/ChangeLog | 23 + sim/aarch64/ChangeLog | 5 + sim/aarch64/aclocal.m4 | 9 +- sim/aarch64/configure | 29 +- sim/aarch64/configure.ac | 2 +- sim/arm/ChangeLog | 5 + sim/arm/aclocal.m4 | 9 +- sim/arm/configure | 29 +- sim/arm/configure.ac | 2 +- sim/avr/ChangeLog | 5 + sim/avr/aclocal.m4 | 9 +- sim/avr/configure | 29 +- sim/avr/configure.ac | 2 +- sim/bfin/ChangeLog | 5 + sim/bfin/aclocal.m4 | 11 +- sim/bfin/configure | 23 +- sim/bfin/configure.ac | 2 +- sim/bpf/ChangeLog | 5 + sim/bpf/aclocal.m4 | 13 +- sim/bpf/configure | 27 +- sim/bpf/configure.ac | 2 +- sim/common/ChangeLog | 4 + sim/common/acinclude.m4 | 875 --------------------- sim/configure | 304 +++---- sim/configure.ac | 108 ++- sim/configure.tgt | 113 --- sim/cr16/ChangeLog | 5 + sim/cr16/aclocal.m4 | 9 +- sim/cr16/configure | 29 +- sim/cr16/configure.ac | 2 +- sim/cris/ChangeLog | 5 + sim/cris/aclocal.m4 | 13 +- sim/cris/configure | 23 +- sim/cris/configure.ac | 2 +- sim/d10v/ChangeLog | 5 + sim/d10v/aclocal.m4 | 9 +- sim/d10v/configure | 29 +- sim/d10v/configure.ac | 2 +- sim/erc32/ChangeLog | 5 + sim/erc32/aclocal.m4 | 7 +- sim/erc32/configure | 35 +- sim/erc32/configure.ac | 2 +- sim/frv/ChangeLog | 5 + sim/frv/aclocal.m4 | 13 +- sim/frv/configure | 23 +- sim/frv/configure.ac | 2 +- sim/ft32/ChangeLog | 5 + sim/ft32/aclocal.m4 | 9 +- sim/ft32/configure | 29 +- sim/ft32/configure.ac | 2 +- sim/h8300/ChangeLog | 5 + sim/h8300/aclocal.m4 | 9 +- sim/h8300/configure | 29 +- sim/h8300/configure.ac | 2 +- sim/igen/ChangeLog | 5 + sim/igen/configure | 16 +- sim/igen/configure.ac | 2 +- sim/iq2000/ChangeLog | 5 + sim/iq2000/aclocal.m4 | 13 +- sim/iq2000/configure | 23 +- sim/iq2000/configure.ac | 2 +- sim/lm32/ChangeLog | 5 + sim/lm32/aclocal.m4 | 13 +- sim/lm32/configure | 23 +- sim/lm32/configure.ac | 2 +- sim/m32c/ChangeLog | 5 + sim/m32c/aclocal.m4 | 7 +- sim/m32c/configure | 35 +- sim/m32c/configure.ac | 2 +- sim/m32r/ChangeLog | 5 + sim/m32r/aclocal.m4 | 13 +- sim/m32r/configure | 23 +- sim/m32r/configure.ac | 2 +- sim/m4/sim_ac_common.m4 | 260 ++++++ sim/m4/sim_ac_option_alignment.m4 | 66 ++ .../configure.ac => m4/sim_ac_option_assert.m4} | 33 +- sim/m4/sim_ac_option_bitsize.m4 | 81 ++ sim/m4/sim_ac_option_cgen_maint.m4 | 56 ++ sim/m4/sim_ac_option_default_model.m4 | 31 + sim/m4/sim_ac_option_endian.m4 | 65 ++ sim/m4/sim_ac_option_environment.m4 | 45 ++ sim/m4/sim_ac_option_float.m4 | 47 ++ sim/m4/sim_ac_option_hardware.m4 | 81 ++ sim/m4/sim_ac_option_inline.m4 | 50 ++ sim/m4/sim_ac_option_reserved_bits.m4 | 30 + sim/m4/sim_ac_option_scache.m4 | 34 + sim/{rl78/configure.ac => m4/sim_ac_option_smp.m4} | 36 +- sim/m4/sim_ac_option_warnings.m4 | 103 +++ .../sim_ac_option_xor_endian.m4} | 35 +- sim/m4/sim_ac_output.m4 | 62 ++ sim/m68hc11/ChangeLog | 5 + sim/m68hc11/aclocal.m4 | 10 +- sim/m68hc11/configure | 23 +- sim/m68hc11/configure.ac | 2 +- sim/mcore/ChangeLog | 5 + sim/mcore/aclocal.m4 | 9 +- sim/mcore/configure | 29 +- sim/mcore/configure.ac | 2 +- sim/microblaze/ChangeLog | 5 + sim/microblaze/aclocal.m4 | 9 +- sim/microblaze/configure | 29 +- sim/microblaze/configure.ac | 2 +- sim/mips/ChangeLog | 5 + sim/mips/aclocal.m4 | 13 +- sim/mips/configure | 17 +- sim/mips/configure.ac | 2 +- sim/mn10300/ChangeLog | 5 + sim/mn10300/aclocal.m4 | 12 +- sim/mn10300/configure | 19 +- sim/mn10300/configure.ac | 2 +- sim/moxie/ChangeLog | 5 + sim/moxie/aclocal.m4 | 9 +- sim/moxie/configure | 29 +- sim/moxie/configure.ac | 2 +- sim/msp430/ChangeLog | 5 + sim/msp430/aclocal.m4 | 9 +- sim/msp430/configure | 29 +- sim/msp430/configure.ac | 2 +- sim/or1k/ChangeLog | 5 + sim/or1k/aclocal.m4 | 13 +- sim/or1k/configure | 27 +- sim/or1k/configure.ac | 2 +- sim/ppc/configure.ac | 2 +- sim/pru/ChangeLog | 5 + sim/pru/aclocal.m4 | 9 +- sim/pru/configure | 29 +- sim/pru/configure.ac | 2 +- sim/riscv/ChangeLog | 5 + sim/riscv/aclocal.m4 | 11 +- sim/riscv/configure | 27 +- sim/riscv/configure.ac | 2 +- sim/riscv/sim-main.c | 6 +- sim/rl78/ChangeLog | 5 + sim/rl78/aclocal.m4 | 7 +- sim/rl78/configure | 35 +- sim/rl78/configure.ac | 2 +- sim/rx/ChangeLog | 5 + sim/rx/aclocal.m4 | 7 +- sim/rx/configure | 35 +- sim/rx/configure.ac | 2 +- sim/sh/ChangeLog | 5 + sim/sh/aclocal.m4 | 9 +- sim/sh/configure | 29 +- sim/sh/configure.ac | 2 +- sim/v850/ChangeLog | 5 + sim/v850/aclocal.m4 | 11 +- sim/v850/configure | 25 +- sim/v850/configure.ac | 2 +- 241 files changed, 4848 insertions(+), 3642 deletions(-) create mode 100644 bfd/cpu-riscv.h create mode 100644 libctf/NEWS copy libctf/testsuite/{libctf-regression/pptrtab-a.c => libctf-lookup/conflicting- [...] copy libctf/testsuite/{libctf-regression/pptrtab-b.c => libctf-lookup/conflicting- [...] create mode 100644 libctf/testsuite/libctf-lookup/conflicting-type-syms.c create mode 100644 libctf/testsuite/libctf-lookup/conflicting-type-syms.lk create mode 100644 libctf/testsuite/libctf-lookup/enum-symbol-obj.lk delete mode 100644 sim/common/acinclude.m4 delete mode 100644 sim/configure.tgt create mode 100644 sim/m4/sim_ac_common.m4 create mode 100644 sim/m4/sim_ac_option_alignment.m4 copy sim/{pru/configure.ac => m4/sim_ac_option_assert.m4} (53%) create mode 100644 sim/m4/sim_ac_option_bitsize.m4 create mode 100644 sim/m4/sim_ac_option_cgen_maint.m4 create mode 100644 sim/m4/sim_ac_option_default_model.m4 create mode 100644 sim/m4/sim_ac_option_endian.m4 create mode 100644 sim/m4/sim_ac_option_environment.m4 create mode 100644 sim/m4/sim_ac_option_float.m4 create mode 100644 sim/m4/sim_ac_option_hardware.m4 create mode 100644 sim/m4/sim_ac_option_inline.m4 create mode 100644 sim/m4/sim_ac_option_reserved_bits.m4 create mode 100644 sim/m4/sim_ac_option_scache.m4 copy sim/{rl78/configure.ac => m4/sim_ac_option_smp.m4} (53%) create mode 100644 sim/m4/sim_ac_option_warnings.m4 copy sim/{rl78/configure.ac => m4/sim_ac_option_xor_endian.m4} (51%) create mode 100644 sim/m4/sim_ac_output.m4