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from a1a10a0b8c4 IBM Z: Change vector copysign to use bitwise operations new 8a3da2e6060 PR target/97349 AArch64: Incorrect types for some Neon vdup [...] new 91e4e16b550 nvptx - invoke.texi: Update default of -misa new 91d80cf4bd2 vect: Fix an ICE in vect_recog_mask_conversion_pattern new a7825bb6556 fix SLP subgraph detection wrt fully shared lanes
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Summary of changes: gcc/config/aarch64/arm_neon.h | 14 +++---- gcc/doc/invoke.texi | 2 +- gcc/testsuite/gcc.target/aarch64/pr96757.c | 23 +++++++++++ gcc/testsuite/gcc.target/aarch64/simd/pr97349.c | 12 ++++++ gcc/tree-vect-patterns.c | 51 ++++++++++++++++++++++--- gcc/tree-vect-slp.c | 17 +++++---- 6 files changed, 98 insertions(+), 21 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/pr96757.c create mode 100644 gcc/testsuite/gcc.target/aarch64/simd/pr97349.c