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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-next-defconfig in repository toolchain/ci/llvm-project.
from 019d4f1ceb96 [libc++abi] Remove XFAIL on arm64 adds 5eb22621bcd2 Bump version to 14.0.4 adds 9ed930e5cd74 [MC][test] Improve offset.s adds f3f90ec42ae6 [MC][ELF] Improve st_size propagation rule adds 5c4cf01f47da [Driver][Linux] Remove D.Dir+"/../lib" from default search [...] adds 869c1d7d0902 [Clang] Fix the guaranteed alignment of memory returned by [...] adds 50d4a84152c6 Fix test for c7ee0b8bda8b32a800bc01e9151b364446a6e1b1 adds cd597588217a [HIP] Fix HIP include path adds 39e909731a11 [InstCombine] add scalable vector test for logical select; NFC adds 0108630f8bc5 [InstCombine] Fix scalable-vector bitwise select matching adds 60c8e02c9d12 [IPSCCP] Support unfeasible default dests for switch. adds c6d56a324ef8 [AArch64] Add native CPU detection for Ampere1 adds 53433dd0b503 [AArch64] Support for Ampere1 core adds 52528806579b [AArch64] Ampere1 does not support MTE
No new revisions were added by this update.
Summary of changes: clang/lib/Basic/TargetInfo.cpp | 6 +- clang/lib/Driver/ToolChains/AMDGPU.cpp | 2 +- clang/lib/Driver/ToolChains/Linux.cpp | 16 +- clang/test/Driver/hip-include-path.hip | 10 +- clang/test/Driver/linux-ld.c | 2 - clang/test/Driver/rocm-detect.hip | 6 +- clang/test/Misc/target-invalid-cpu-note.c | 4 +- clang/test/Preprocessor/init-arm.c | 3 + clang/test/Preprocessor/init-ppc.c | 3 + clang/test/Preprocessor/init-x86.c | 3 + clang/test/Preprocessor/init.c | 3 - libcxx/CMakeLists.txt | 2 +- libcxxabi/CMakeLists.txt | 2 +- libunwind/CMakeLists.txt | 2 +- llvm/CMakeLists.txt | 2 +- llvm/include/llvm/Support/AArch64TargetParser.def | 2 + llvm/lib/MC/ELFObjectWriter.cpp | 20 +- llvm/lib/Support/Host.cpp | 6 + llvm/lib/Target/AArch64/AArch64.td | 18 + llvm/lib/Target/AArch64/AArch64SchedAmpere1.td | 1136 ++++++++++++++++++++ llvm/lib/Target/AArch64/AArch64SchedPredAmpere.td | 25 + llvm/lib/Target/AArch64/AArch64SchedPredicates.td | 2 +- llvm/lib/Target/AArch64/AArch64Subtarget.cpp | 6 + llvm/lib/Target/AArch64/AArch64Subtarget.h | 1 + .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 6 +- llvm/lib/Transforms/Scalar/SCCP.cpp | 23 +- llvm/test/CodeGen/AArch64/cpus.ll | 1 + llvm/test/CodeGen/AArch64/neon-dot-product.ll | 1 + llvm/test/CodeGen/AArch64/remat.ll | 1 + llvm/test/MC/AArch64/armv8.2a-dotprod.s | 3 + llvm/test/MC/AArch64/armv8.3a-rcpc.s | 1 + .../test/MC/Disassembler/AArch64/armv8.3a-rcpc.txt | 1 + llvm/test/MC/ELF/offset.s | 158 +-- llvm/test/Transforms/InstCombine/logical-select.ll | 50 + .../Transforms/SCCP/switch-constantfold-crash.ll | 150 ++- llvm/unittests/Support/Host.cpp | 4 + llvm/unittests/Support/TargetParserTest.cpp | 10 +- llvm/utils/gn/secondary/llvm/version.gni | 2 +- llvm/utils/lit/lit/__init__.py | 2 +- llvm/utils/release/build_llvm_package.bat | 4 +- .../llvm/include/llvm/Config/llvm-config.h | 2 +- 41 files changed, 1540 insertions(+), 161 deletions(-) create mode 100644 llvm/lib/Target/AArch64/AArch64SchedAmpere1.td create mode 100644 llvm/lib/Target/AArch64/AArch64SchedPredAmpere.td