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from 183a800059f Test commit access new 633653d6d5f [RISCV] Codegen support for RV32D floating point load/store [...] new 0cc09b82a37 [RISCV] Add tests missed in r329871
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Summary of changes: lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 42 ++++- lib/Target/RISCV/RISCVISelLowering.cpp | 231 +++++++++++++++++++++-- lib/Target/RISCV/RISCVISelLowering.h | 4 +- lib/Target/RISCV/RISCVInstrInfo.cpp | 4 + lib/Target/RISCV/RISCVInstrInfoD.td | 51 +++++ lib/Target/RISCV/RISCVMachineFunctionInfo.h | 17 +- test/CodeGen/RISCV/double-arith.ll | 23 +++ test/CodeGen/RISCV/double-calling-conv.ll | 160 ++++++++++++++++ test/CodeGen/RISCV/double-imm.ll | 38 ++++ test/CodeGen/RISCV/double-intrinsics.ll | 24 +++ test/CodeGen/RISCV/double-mem.ll | 172 +++++++++++++++++ test/CodeGen/RISCV/double-stack-spill-restore.ll | 47 +++++ 12 files changed, 791 insertions(+), 22 deletions(-) create mode 100644 test/CodeGen/RISCV/double-arith.ll create mode 100644 test/CodeGen/RISCV/double-calling-conv.ll create mode 100644 test/CodeGen/RISCV/double-imm.ll create mode 100644 test/CodeGen/RISCV/double-intrinsics.ll create mode 100644 test/CodeGen/RISCV/double-mem.ll create mode 100644 test/CodeGen/RISCV/double-stack-spill-restore.ll