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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allnoconfig in repository toolchain/ci/llvm-project.
from 4640223ebdb [MCA] Fix a spelling mistake in a comment. NFC adds ad4c42666dd [nfc][libomptarget] Inline option into target_impl adds 174967f1536 [nfc][libomptarget] Decrease coupling between files adds 73f255b83ad [TargetLowering] Add getBooleanContents contents check to " [...] adds f067dd839ec [LegalizeTypes] When promoting BITREVERSE/BSWAP don't take [...] adds 85a2146c155 [SDAG] fold insert_vector_elt with undef index adds faee39baa87 PR43762: when implicitly changing the active union member f [...] adds 06d3fce01d4 PR43400: Add test that we can instantiate a friend function [...] adds 32837a60ac4 [lit] Drop the user-site packages directory from search pat [...] adds 418d1ea555c PM: silence `-Wpessimizing-move` from GCC 9.2.1 (NFC) adds 40b0fa7ef21 [LLDB][formatters] ArgInfo::count -> ArgInfo::max_positional_args adds 9b0b626d2c1 Use isConvergent helper instead of directly checking attribute adds 7af8d5267b3 [X86] Use 64-bit version of source register in LowerPATCHAB [...] adds 40ab8ae9fb7 OpenMP: Add helper function for convergent runtime calls adds 56a503bdba9 OpenMP: Add convergent to more runtime functions adds 525169efd1e TableGen: Use enum names in composeSubRegIndices table adds 39eef2cbb6a PR43775: don't produce a bogus 'auto' -Wc++98-compat warnin [...] adds 1a9c01c7f6c [clangd] Pass ExtraArgs to TestTU in TweakIsAvailable matcher adds a4facd355dc [c++20] Enforce rule that a union-like class or class with [...] adds 5ab9a850f6b [clangd] Reland DefineInline action availability checks adds 2aa955411a5 gn build: Merge 5ab9a850f6b adds 657e4240b15 [X86] Fix 48/96 byte memcmp code gen adds 3d65def1fd2 [clangd] Reland DefineInline action apply logic with fully [...] adds f4d7caf6df8 [clangd] Reland Store Index in Tweak::Selection adds 7f19dd1ebff [llvm-objcopy][MachO] Implement --only-section adds d9971d0b2e3 [clangd] Do not insert parentheses when completing a using [...] adds da68fd8f816 Fix https://bugs.llvm.org/show_bug.cgi?id=43791 adds 7214f7a79f4 [RISCV] Lower llvm.trap and llvm.debugtrap new da720a38b9f [AArch64][SVE] Implement masked load intrinsics
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Summary of changes: clang-tools-extra/clangd/ClangdServer.cpp | 2 +- clang-tools-extra/clangd/CodeComplete.cpp | 20 +- clang-tools-extra/clangd/refactor/Tweak.cpp | 8 +- clang-tools-extra/clangd/refactor/Tweak.h | 6 +- .../clangd/refactor/tweaks/CMakeLists.txt | 1 + .../clangd/refactor/tweaks/DefineInline.cpp | 393 +++++++++++ .../clangd/unittests/CodeCompleteTests.cpp | 42 ++ .../clangd/unittests/TweakTesting.cpp | 45 +- clang-tools-extra/clangd/unittests/TweakTesting.h | 22 +- clang-tools-extra/clangd/unittests/TweakTests.cpp | 714 ++++++++++++++++++++ clang/include/clang/Basic/DiagnosticGroups.td | 1 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 15 + clang/include/clang/Parse/Parser.h | 6 +- clang/include/clang/Sema/CodeCompleteConsumer.h | 13 +- clang/include/clang/Sema/Sema.h | 3 +- clang/lib/AST/ExprConstant.cpp | 13 +- clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp | 15 +- clang/lib/CodeGen/CodeGenModule.cpp | 10 +- clang/lib/CodeGen/CodeGenModule.h | 15 +- clang/lib/Parse/ParseDeclCXX.cpp | 5 +- clang/lib/Parse/ParseExprCXX.cpp | 13 +- clang/lib/Sema/SemaCodeComplete.cpp | 33 +- clang/lib/Sema/SemaDeclCXX.cpp | 39 +- clang/lib/Sema/SemaType.cpp | 2 +- .../class.compare/class.compare.default/p2.cpp | 70 ++ clang/test/OpenMP/nvptx_parallel_codegen.cpp | 16 +- clang/test/SemaCXX/constant-expression-cxx2a.cpp | 42 ++ clang/test/SemaCXX/cxx98-compat.cpp | 17 + .../SemaTemplate/instantiate-friend-function.cpp | 7 + lldb/scripts/Python/python-wrapper.swig | 16 +- llvm/docs/CommandGuide/llvm-objcopy.rst | 3 + llvm/include/llvm/CodeGen/SelectionDAG.h | 14 + llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 6 +- .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 19 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 13 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 15 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 7 +- llvm/lib/Passes/PassBuilder.cpp | 2 +- llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 20 + llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 7 + llvm/lib/Target/AArch64/AArch64ISelLowering.h | 1 + llvm/lib/Target/AArch64/AArch64InstrInfo.td | 49 ++ llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 38 ++ .../Target/AArch64/AArch64TargetTransformInfo.h | 15 + llvm/lib/Target/AArch64/SVEInstrFormats.td | 10 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 3 + llvm/lib/Target/RISCV/RISCVInstrInfo.td | 10 + llvm/lib/Target/X86/X86ISelLowering.cpp | 23 +- llvm/lib/Target/X86/X86MCInstLower.cpp | 18 +- llvm/lib/Transforms/Scalar/LoopUnswitch.cpp | 2 +- llvm/lib/Transforms/Scalar/Sink.cpp | 2 +- .../test/CodeGen/AArch64/sched-past-vector-ldst.ll | 24 +- .../test/CodeGen/AArch64/sve-masked-ldst-nonext.ll | 87 +++ llvm/test/CodeGen/AArch64/sve-masked-ldst-sext.ll | 66 ++ llvm/test/CodeGen/AArch64/sve-masked-ldst-zext.ll | 72 ++ llvm/test/CodeGen/RISCV/intrinsics/trap.ll | 38 ++ llvm/test/CodeGen/WebAssembly/simd.ll | 48 +- llvm/test/CodeGen/X86/insertelement-var-index.ll | 16 + llvm/test/CodeGen/X86/memcmp.ll | 745 ++------------------- llvm/test/CodeGen/X86/pr43820.ll | 383 +++++++++++ llvm/test/CodeGen/X86/xray-custom-log.ll | 4 +- llvm/test/CodeGen/X86/xray-typed-event-log.ll | 8 +- .../tools/llvm-objcopy/MachO/only-section.test | 153 +++++ llvm/tools/llvm-objcopy/MachO/MachOObjcopy.cpp | 23 +- llvm/tools/llvm-objcopy/MachO/MachOReader.cpp | 1 + llvm/tools/llvm-objcopy/MachO/Object.cpp | 7 + llvm/tools/llvm-objcopy/MachO/Object.h | 4 + llvm/unittests/Support/AlignmentTest.cpp | 2 +- llvm/utils/TableGen/RegisterInfoEmitter.cpp | 2 +- .../clangd/refactor/tweaks/BUILD.gn | 1 + llvm/utils/lit/tests/lit.cfg | 4 + openmp/libomptarget/deviceRTLs/interface.h | 1 + openmp/libomptarget/deviceRTLs/nvptx/src/cancel.cu | 3 +- .../libomptarget/deviceRTLs/nvptx/src/critical.cu | 5 +- openmp/libomptarget/deviceRTLs/nvptx/src/debug.h | 4 +- .../deviceRTLs/nvptx/src/device_environment.h | 24 + .../libomptarget/deviceRTLs/nvptx/src/omp_data.cu | 3 +- .../deviceRTLs/nvptx/src/omptarget-nvptx.h | 12 - openmp/libomptarget/deviceRTLs/nvptx/src/option.h | 62 -- .../deviceRTLs/nvptx/src/state-queue.h | 2 +- .../deviceRTLs/nvptx/src/target_impl.h | 37 +- 81 files changed, 2761 insertions(+), 961 deletions(-) create mode 100644 clang-tools-extra/clangd/refactor/tweaks/DefineInline.cpp create mode 100644 clang/test/CXX/class/class.compare/class.compare.default/p2.cpp create mode 100644 llvm/test/CodeGen/AArch64/sve-masked-ldst-nonext.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-masked-ldst-sext.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-masked-ldst-zext.ll create mode 100644 llvm/test/CodeGen/RISCV/intrinsics/trap.ll create mode 100644 llvm/test/CodeGen/X86/pr43820.ll create mode 100644 llvm/test/tools/llvm-objcopy/MachO/only-section.test create mode 100644 openmp/libomptarget/deviceRTLs/nvptx/src/device_environment.h delete mode 100644 openmp/libomptarget/deviceRTLs/nvptx/src/option.h