[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allyesconfig updated (619e39bc729 -> 101c1afdfd1)

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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-next-allyesconfig in repository toolchain/ci/llvm-project.

from 619e39bc729 [NFC][PowerPC] Fixed unused variable 'NewInstr'. adds 92fb5f2e479 [LLD] NFC: Fixed GCC warning in ELF/Arch/RISCV.cpp adds f21eeafcd9c [BPF] Preserve debuginfo array/union/struct type/access index adds e085b40e9c4 Revert "[BPF] Preserve debuginfo array/union/struct type/ac [...] adds c6caddb73d4 [LoopInfo] Update getExitEdges to accept vector of pairs fo [...] adds 048493f882f [BPF] Preserve debuginfo array/union/struct type/access index adds 592f44a7e75 Prepare for making SwitchInstProfUpdateWrapper strict adds 77bb3a486fa [Loop Peeling] Add support for peeling of loops with multip [...] adds c117be6fc62 [ELF][test] Rename tail-merge-string-align2.s to merge-stri [...] adds 50e7f45b280 [ELF] Assert sizeof(SymbolUnion) <= 80 adds 12aca5de026 Reland "[LiveDebugValues] Emit the debug entry values" adds b2a549d7cf9 Add AlignConsecutiveMacros to the clang release notes adds 0adbe77566d Remove trailing whitespaces in the Language Extensions doc adds 09329ce6c4b [NFC][PowerPC] Added a test to show current codegen of MachinePRE adds 9bebc65d796 Revert r364515 and r364524 adds 336f3e16011 Fixing @llvm.memcpy not honoring volatile. This is explicit [...] adds 564daa01fcf [llvm-profdata] Don't make the output overwrite the input file. adds 4363edb0e84 [docs][llvm-dwarfdump] Make some option descriptions cleare [...] adds 456fc4fa6dc Retire VS2015 Support adds 1fb97c90365 dummy variable extraction on a function scope adds 6f6e5d85de9 Retire VS2015 Support adds 59029017a66 [LegalizeTypes] Fix saturation bug for smul.fix.sat adds 051a6a1c33e [SelectionDAG] Simplify some calls to getSetCCResultType. NFC adds 189355f3ee5 [CMake] Remove old lldb_setup_framework_rpaths_in_tool() adds e9298dc9027 [CMake] Don't initialize LLVM_INSTALL_TOOLCHAIN_ONLY in App [...] adds e5b868d6a3c [CMake] Polish a comment adds cc0203e06d8 Fixed assertion adds 65d7511f384 [docs][llvm-nm] Improve some wording adds e0831dac0c3 [RISCV] Fix RISCVTTIImpl::getIntImmCost for immediates wher [...] adds f717148b3a7 Enhance abseil-faster-strsplit-delimiter to handle other no [...] adds eb79b25b440 [ASTImporter] Added visibility context check for EnumDecl. adds 7e3b22758d1 Revert rL365355 : [Syntax] Introduce syntax trees adds 9b3f38f9908 Reland r365355: [Syntax] Introduce syntax trees adds 01eaae6dd12 [DwarfDebug] Dump call site debug info adds 60afa49abed OpaquePtr: add Type parameter to Loads analysis API. adds c1e0ea97653 [NFC][AsmPrinter] Fix the formatting for the rL365467 adds 4bc20fa1494 OpaquePtr: Update polly's calls to Loads.h API adds e995ce5498f [ADT] Enable ArrayRef/StringRef is_assignable tests on MSVC adds 13b204fee1e OpaquePtr: pass type to CreateLoad. NFC. adds a50bbfc4702 [NFC] [X86] Fix scan-build complaining adds 8447b419a7c [docs][llvm-objdump] Make some wording improvements/simplif [...] adds 00df4d92eda [mips] Implement sgt/sgtu pseudo instructions with immediat [...] adds 2fa6b546356 [mips] Implement sge/sgeu pseudo instructions adds 480e8ad2173 [CodeGen] AccelTable - remove non-constexpr (MSVC) Atom defs adds e7a67bf8ceb lld-link: Stop accepting /natvis and /fastfail in .drectve [...] adds 51dad4196e5 [Syntax] Move roles into a separate enum adds 04615341e48 [ItaniumMangle] Refactor long double/__float128 mangling an [...] adds 62410356849 gn build: Merge r365453 adds 9b7ffc4e55b AMDGPU/GlobalISel: Select G_MERGE_VALUES adds 872f38be7e9 AMDGPU/GlobalISel: Select G_UNMERGE_VALUES adds e6d10f97dd8 AMDGPU/GlobalISel: Select G_SUB adds e509af3cd6c [OPENMP]Fix the float point semantics handling on the device. adds 8b8eee5904c AMDGPU/GlobalISel: Make s16 G_ICMP legal adds 6bdb92d833a AMDGPU/GlobalISel: Improve regbankselect for icmp s16 adds 4dd5755d018 AMDGPU/GlobalISel: Legalize more concat_vectors adds e0a3ee79c5f [docs][llvm-dwarfdump] Fix wording adds 743754501b3 [libclang] Fix hang in release / assertion in debug when ev [...] adds 85ad662dfd5 AMDGPU/GlobalISel: Fix test adds dbb6d01d340 [MIPS GlobalISel] Regbanks for G_SELECT. Select i64, f32 an [...] adds fdd761af159 AMDGPU/GlobalISel: Prepare some tests for store selection adds be20e36107c [MIPS GlobalISel] Register bank select for G_PHI. Select i64 phi adds fb453353dab [InferFunctionAttrs] add more tests for derefenceable; NFC adds 781e3aff8c6 [ARM] Add test for MVE and no floats. NFC adds d9555730658 [HardwareLoops] NFC - move hardware loop checking code to i [...] adds b1e511bf5a4 Ignore trailing NullStmts in StmtExprs for GCC compatibility. adds b00d5f732cd [OpenCL][Sema] Fix builtin rewriting adds d36e130a86d [OpenCL][Sema] Improve address space support for blocks adds e625eb9defc [NFC] Added tests for D64285 adds d050e456317 [ADT] Remove MSVC-only "no two-phase name lookup" typename path. adds d3d88d08b5d [BPF] Support for compile once and run everywhere adds 57603cbde8b [DAGCombine] LoadedSlice - keep getOffsetFromBase() uint64_ [...] adds a448ed99dfd [libunwind] Fix Unwind-EHABI.cpp:getByte on big-endian targets adds 901d91e5f0f [NFC] Fixed tests adds 623282f0dd7 [mips] Explicitly select `mips32r2` CPU for test cases requ [...] adds e3892d84e0c [mips] Show error in case of using FP64 mode on pre MIPS32R2 CPU adds d088720edad Revert Revert Devirtualize destructor of final class. adds 6616e269a69 [AArch64][GlobalISel] Optimize conditional branches followe [...] adds 114d2db49b1 [RISCV] Fix ICE in isDesirableToCommuteWithShift adds b2d24bd5400 [AMDGPU] Created a sub-register class for the return addres [...] adds 521f77e6351 [TSan] Improve handling of stack pointer mangling in {set,l [...] adds ce84e6ae8ea Make pdbdump-objfilename test work again adds c9c55cf89b0 Rename llvm/test/tools/llvm-pdbdump to llvm/test/tools/llvm [...] adds 329c0320406 [unittest] Add bogus register info. adds 0efac296f14 Remove a comment that has been obsolete since r327679 adds abffae3a563 [ObjC] Add a warning for implicit conversions of a constant [...] adds 65f964c23eb Add lit.local.cfg to llvm-objdump tests adds 06fef0b359b Revert "[HardwareLoops] NFC - move hardware loop checking c [...] adds 077df019184 AMDGPU: Fix test failing since r365512 adds 5a458d6ada3 [clangd] Show documentation in hover, and fetch docs from i [...] adds 5f4d7c9d4f2 [InstCombine] add tests for trunc(load); NFC adds 837ae69f8b9 [Object][XCOFF] Add support for 64-bit file header and sect [...] adds 22b2c3d6511 [AMDGPU] gfx908 target adds 631b5f7dc0e [lldb, windows] Update two more locations that use LaunchTh [...] adds 2ea514c5662 [lldb-suite] Skip TestMachCore on Windows adds 0cfd75a07d0 [AMDGPU] gfx908 clang target adds 9cf71d10f82 [unittest] Add the missing bogus machine register info init [...] adds 3ce33947d4f gn build: Merge r365503. adds 2f760c44e6c [clangd] Rewrite of logic to rebuild the background index s [...] adds a1b2a27a384 [BPF] Fix a typo in the file name adds 20ecec6116b [lldb, windows] Include WindowsError instead of ErrorHandli [...] adds 95176d72c7e Revert "[TSan] Improve handling of stack pointer mangling i [...] adds 210314ae8c5 Try to appease the Windows build bots. adds f47a313e717 Add a transform pass to make the executable semantics of po [...] adds 6a4c2e4f0a9 [ThinLTO] only emit used or referenced CFI records to index adds 3b38b92541d [PoisonChecking] Add validation rules for "exact" on sdiv/udiv adds 294f37561ab [X86] LowerToHorizontalOp - use count_if to count non-UNDEF [...] adds f09d54ed2a7 Boilerplate for producing XCOFF object files from the Power [...] adds 3dbd7e98d86 [PoisonCheker] Support for out of bounds operands on shifts [...] adds 2d739940466 [libFuzzer] Include FuzzedDataProvider.h in the test withou [...] adds 3fbd8fda9a0 [OpenMP] Simplify getFloatTypeSemantics adds 9e77d0c6df1 [AMDGPU] gfx908 register file changes adds 51c2b99eff1 [lld][WebAssembly] Fix name of data section in PIC mode adds c236eeaf7d8 Fix build error for VC STL, use llvm::make_unique adds 84a1f073634 [X86][AMDGPU][DAGCombiner] Move call to allowsMemoryAccess [...] adds a6548d04375 [PoisonChecking] Flesh out complete todo list for full coverage adds 1366262b74d hwasan: Improve precision of checks using short granule tags. adds 5ca39e828c8 [SLP] Optimize getSpillCost(); NFCI adds 9abe8c48052 [lld][WebAssembly] Report undefined symbols during scanRelocations adds c11c43b64f3 [TSan] Refine longjmp key management on Darwin adds 9e04b532dfe [CXX] Exercise all paths through these tests. adds 8777df5270a De-templatize non-dependent VS macro logic, NFC adds 9b28d9c3318 Use the Itanium C++ ABI for the pipe_builtin.cl test adds fa9b96aeab8 XFAIL clang/test/Headers/max_align.c on i686 adds 90148db02a5 [Docs] Replace SVN revisions with lldb versions adds ba9eb483184 Reland "[TSan] Improve handling of stack pointer mangling i [...] adds 695f7821e2d [lldb_test_suite] Fix lldb test suite targeting remote Android adds 97d6fcce4ec build: use multiple `install` rather than building up a list adds 50d7f46460e [AMDGPU] gfx908 mAI instructions, MC part adds c5f8aa8bea6 [llvm-objdump] Keep warning for --disassemble-functions in [...] adds d6c15b661ab [Profile] Support raw/indexed profiles larger than 4GB adds 14a4495155c GlobalISel: Combine unmerge of merge with intermediate cast adds 269b9f940ff [lldb] Quick Fix: IRExecutionUnit check pointer before access it adds 9eb4b96be02 Add lldb type unit support to the release notes adds fa7eea9e4ec gn build: Merge r365531. adds d9f7162d4bf gn build: Merge r365541. adds 3ea053ad505 gn build: Merge r365532. adds 67a06d94954 gn build: Merge r365536. adds 1e9eae95afa [AMDGPU] gfx908 v_pk_fmac_f16 support adds 31babea94a3 [clang] DirectoryWatcher adds 3f1a34546cf AMDGPU/GlobalISel: Fix legality for G_BUILD_VECTOR adds 9145f265b0e [clangd] fix assert in test after r365531. adds 1ae60797cd9 [X86] Don't form extloads in combineExtInVec unless the loa [...] adds daf801bb115 [docs][Remarks] Add documentation for remarks in LLVM adds 4586a19da86 [MS] Treat ignored explicit calling conventions as an expli [...] adds 1a697aa6072 [Bitcode] Explicitly include Bitstream/BitCodes.h and Bitst [...] adds abce8c457dd Revert [clang] DirectoryWatcher adds 27cf6664437 [analyzer] CastValueChecker: Model casts adds b1843e130ad GlobalISel: Implement lower for G_FCOPYSIGN adds 6a29680efb0 Revert "[analyzer] CastValueChecker: Model casts" adds 693936ab8fe [analyzer] CastValueChecker: Model casts adds d0ba79fe7bf AMDGPU/GlobalISel: Add support for wide loads >= 256-bits adds 9c147bd40bc [Driver] Add float-divide-by-zero back to supported sanitiz [...] adds cc418a3af45 [Support] Move llvm::MemoryBuffer to sys::fs::file_t adds 50f70de5577 [X86] Limit getTargetConstantFromNode to only work on Norma [...] adds e856c0465d1 [analyzer] CastValueChecker: Remove a dump() adds 7f9a94e1f88 [ubsan][test] Restore float-divide-by-zero test adds 053eb356519 Try again to move common functionality from ProcessWindows [...] adds 6858f337a83 Revert accidental change to file adds 21b28fb8c5f Fix modular build issues caused by BitCodes.h adds 3837f4273fc [Coding style change] Rename variables so that they start w [...] adds 77392c3f5e7 Silence gcc warning by adding parentheses to condition [NFC] adds 3490aab63af [NFC][AArch64] Fix vector vqtb[lx][1-4]_s8 operand adds 625a0f70a98 [Syntax] Add assertion to catch invalid tokens early. NFC adds 97f19f3a497 [SimpleLoopUnswitch] Add a test case exposing a bug adds 4e09ef030e0 [test/Object/nm-trivial-object.test] - Remove 4 precompiled [...] adds eff868fdef2 [clangd] Added highlighting for class and enum types. adds 666414254a2 [docs][llvm-dwarfdump] Normalise some wording adds ed143c5d59b [ARM] Enable VPUSH/VPOP aliases when either MVE or VFP is present adds 7e296adec7a Make functions and member variables distinguishable even af [...] adds 18cb8e401c4 [clangd] Consume error to avoid assertion failures adds 57852878c0f [clangd] Stop recording tokens before running clang-tidy adds a8ce1610108 [NFC][AArch64] Fix vector vsqadd intrinsics operands adds 71cac61d018 [AArch64] Fix vector vuqadd intrinsics operands adds d000f8b69f7 [SimpleLoopUnswitch] Don't consider unswitching `switch` in [...] adds 988925c127f Fix "result of 32-bit shift implicitly converted to 64 bits [...] adds bb1167a3a18 Fix const/non-const lambda return type warning. NFCI. adds 6a58583951b [X86][SSE] EltsFromConsecutiveLoads - add basic dereference [...] adds 685911ffce9 [CMake] Remove extra lldb-framework target adds 05adc0f3170 [CMake] Distribution builds for LLDB standalone adds 110f97632e1 [CMake] `install-distribution` for LLDB on Darwin adds fb163b4b207 [ELF] Loose a condition for relocation with a symbol adds fcd978b0a6f [ELF] Update test case due to llvm r365618 adds c9721935835 [X86] EltsFromConsecutiveLoads - store Loads on a per-eleme [...] adds 94c84aca5d4 [DAGCombine] visitINSERT_SUBVECTOR - use uint64_t subvector [...] adds ef1aac31916 [X86] EltsFromConsecutiveLoads - LDBase is non-null. NFCI. adds 775b2f598a9 [NFC][ARM] Convert lambdas to static helpers adds f6ea43b8b30 [FileCheck] Fix @LINE value after match failure adds 2bf04f25ff0 [FileCheck] Simplify numeric variable interface adds 7b31491ae23 [MIPS GlobalISel] Select float and double load and store adds 7d0778ea6bc [MIPS GlobalISel] Select float and double phi adds 0a9479ef394 [X86] EltsFromConsecutiveLoads - cleanup Zero/Undef/Load el [...] adds 6b61519995e Loop pragma parsing. NFC. adds 479c2188c16 [docs][llvm-symbolizer] Fix grammar adds 6b043f05183 [clangd] Add a flag to clangdServer rename function to cont [...] adds fbafaf48feb [clangd] Trim spaces around parsed include in include extractor adds 8ceee915f35 gn build: Merge r365585 adds d5214dfa7b5 [clangd] Filter out non-governed files from broadcast adds c44a23f8f45 [LLD][ELF] - Linkerscript: fix FILL() expressions handling. adds 9cd82a4fbd2 [InferFunctionAttrs] add/adjust tests for dereferenceable; NFC adds 0735cc1954d [InstCombine] pow(C,x) -> exp2(log2(C)*x) adds 30d12be76c2 Remove two unused member variables. adds a23c5694fbb [analyzer]Add user docs rst adds bba37e89a57 [AMDGPU] Allow abs/neg source modifiers on v_cndmask_b32 adds 1c51073a3ad [NFC][InstCombine] Redundant masking before left-shift (PR42563) adds 28f44040cc4 NFC: fixed typo #ifdef --> #if to allow macro set to 0 work [...] adds 18ba9d60771 [AMDGPU] Increased the number of implicit argument bytes fo [...] adds f64b7f63828 [FileCheck] Use bool operator to test Expected adds 14cb8c1c70b docs/GithubMove.rst: Remove obsolete information adds 3700736aa82 [Remarks] Add cl::Hidden to -remarks-yaml-string-table adds 839e305eb14 [CMake] Polish Apple-lldb caches adds f554ce7f921 [CMake] Add Apple-lldb-Linux.cmake cache adds 86d3c9fd1fd [CMake][NFC] Polish comments in AddLLDB.cmake adds bf223dff7ef [CMake][NFC] Remove dead code lldb_append_link_flags() from [...] adds c5f92bd67be [PatternMatch] Generalize m_SpecificInt_ULT() to take ICmpI [...] adds 58426a3707d AMDGPU: Serialize mode from MachineFunctionInfo adds 0ace98c9df7 ObjectFileELF: Add support for gnu-style compressed sections adds 893448a3e41 [X86] EltsFromConsecutiveLoads - ensure element reg/store s [...] adds 093f4aa72fc [X86] EltsFromConsecutiveLoads - remove duplicate check for [...] adds e595a2c9644 GlobalISel: Define the full family of FP min/max instructions adds 6ce1b4fec54 GlobalISel: Legalization for G_FMINNUM/G_FMAXNUM adds f65f302cc7a [CodeExtractor] Simplify findAllocas, NFC adds 5eb6ba060a2 [CodeExtractor] Fix sinking of allocas with multiple bitcas [...] adds 893f8d719c0 MC: AArch64: Add support for pg_hi21_nc relocation specifier. adds d37edd0c794 ELF: Add support for R_AARCH64_ADR_PREL_PG_HI21_NC relocation. adds 20b45a61156 [NFC][InstCombine] Fixup some tests in just-added "omit mas [...] adds 8728e457065 [TargetLowering] support BlockAddress as "i" inline asm constraint adds 1abaeece719 Options: Reduce code duplication adds de811d1f51c [clang] Preserve names of addrspacecast'ed values. adds ab5a30ac9dc [X86] Add tests for an alternative sequence for _mm_storel_ [...] adds f9cb127ca92 [X86] Add guards to some of the x86 intrinsic tests to skip [...] adds caf6b71ab2e [X86] Change the IR sequence for _mm_storeh_pi and _mm_stor [...] adds 5a6d40be1f3 [X86] Regenerate tests. NFCI. adds 843f198a83d [ORC] Add custom IR compiler configuration to LLJITBuilder [...] adds 58a37754bb1 [LoopRotate + MemorySSA] Keep an <instruction-cloned instru [...] adds 5dd2af52487 [X86] EltsFromConsecutiveLoads - clean up element size calc [...] adds 43d75f97785 Recommit "[CommandLine] Remove OptionCategory and SubComman [...] adds 9fdfb045ae8 [System Model] [TTI] Update cache and prefetch TTI interfaces adds 89ed2e0a0af [scripts] Remove the unused 'shush' script. adds 6d1a64e489e Revert "[clangd] Filter out non-governed files from broadcast" adds f4572249d78 Move three folds for FADD, FSUB and FMUL in the DAG combine [...] adds d300a493df3 Revert "[System Model] [TTI] Update cache and prefetch TTI [...] adds 1a2c8809248 [TSan] Attempt to fix linker error on Linux/AArch64 adds c32742139ed Update libc++ include path detection to use VFS on Linux adds 3132968ae96 [GlobalISel][AArch64][NFC] Use getDefIgnoringCopies from Ut [...] adds 7c95925b133 [GlobalISel][AArch64] Use getOpcodeDef instead of findMIFromReg adds bbfa4cf70b9 Revert "[ELF] Loose a condition for relocation with a symbol" adds 6522bedefe3 Revert "[ELF] Update test case due to llvm r365618" adds 671bac74367 [clang-doc] Add a structured HTML generator adds d24faac0111 Add Python 3.6 and 3.7 to the version list adds 5f5237c2764 gn build: Merge r365687 adds 7a4d2df04a9 [AArch64][GlobalISel] Optimize compare and branch cases wit [...] adds 780030844d4 [OPENMP]Remove not used check line from the test, NFC. adds c23bc97e85f Add support for building with Python 3 adds 098e0a79fa7 [TSan] Fix compiler error on Linux/AArch64 adds 61cc6df5dc7 [NFC][InstCombine] Comb through just-added "omit mask befor [...] adds cbe3ed17fa9 My first test commit. new 461a9d98d70 [Expression] IR Instrumenters should have a UtilityFunction new 021ba49b31d [X86] Remove unused variable. NFC new 01718666723 [lldb] Fix handling of dollar characters in expr command new d7aae33a951 [Concepts] Concept definitions (D40381) new 9a6c17b5b86 [clang-scan-deps] Dependency directives source minimizer: s [...] new a2681296e0d [NFC]Fix IR/MC depency issue for function descriptor SDAG i [...] new d916f23b830 [X86] Add BLSR and BLSMSK to isUseDefConvertible. new 101c1afdfd1 driver: Don't warn about assembler flags being unused when [...]

The 8 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: clang-tools-extra/clang-doc/CMakeLists.txt | 1 + clang-tools-extra/clang-doc/Generators.cpp | 48 + clang-tools-extra/clang-doc/Generators.h | 6 + clang-tools-extra/clang-doc/HTMLGenerator.cpp | 517 +++ clang-tools-extra/clang-doc/MDGenerator.cpp | 73 +- clang-tools-extra/clang-doc/tool/ClangDocMain.cpp | 7 +- .../abseil/FasterStrsplitDelimiterCheck.cpp | 24 +- clang-tools-extra/clangd/CMakeLists.txt | 1 + clang-tools-extra/clangd/ClangdLSPServer.cpp | 2 +- clang-tools-extra/clangd/ClangdServer.cpp | 33 +- clang-tools-extra/clangd/ClangdServer.h | 9 +- clang-tools-extra/clangd/ClangdUnit.cpp | 11 +- clang-tools-extra/clangd/CodeComplete.cpp | 5 +- clang-tools-extra/clangd/FormattedString.cpp | 34 +- clang-tools-extra/clangd/QueryDriverDatabase.cpp | 2 +- clang-tools-extra/clangd/SemanticHighlighting.cpp | 52 +- clang-tools-extra/clangd/SemanticHighlighting.h | 2 + clang-tools-extra/clangd/XRefs.cpp | 46 +- clang-tools-extra/clangd/XRefs.h | 3 +- clang-tools-extra/clangd/index/Background.cpp | 63 +- clang-tools-extra/clangd/index/Background.h | 6 +- .../clangd/index/BackgroundRebuild.cpp | 137 + clang-tools-extra/clangd/index/BackgroundRebuild.h | 99 + clang-tools-extra/clangd/index/dex/dexp/Dexp.cpp | 2 +- clang-tools-extra/clangd/indexer/IndexerMain.cpp | 2 +- .../clangd/refactor/tweaks/CMakeLists.txt | 1 + .../clangd/refactor/tweaks/ExtractVariable.cpp | 243 ++ .../clangd/test/background-index.test | 2 +- .../clangd/test/semantic-highlighting.test | 6 + clang-tools-extra/clangd/tool/ClangdMain.cpp | 9 - .../clangd/unittests/BackgroundIndexTests.cpp | 113 +- .../clangd/unittests/ClangdUnitTests.cpp | 21 + .../clangd/unittests/FormattedStringTests.cpp | 17 +- .../clangd/unittests/SemanticHighlightingTests.cpp | 54 +- clang-tools-extra/clangd/unittests/SyncAPI.cpp | 2 +- clang-tools-extra/clangd/unittests/TweakTests.cpp | 142 +- clang-tools-extra/clangd/unittests/XRefsTests.cpp | 51 +- .../abseil-faster-strsplit-delimiter.cpp | 25 + .../unittests/clang-doc/CMakeLists.txt | 1 + .../unittests/clang-doc/HTMLGeneratorTest.cpp | 276 ++ clang/docs/ClangStaticAnalyzer.rst | 7 +- .../HardwareAssistedAddressSanitizerDesign.rst | 64 +- clang/docs/LanguageExtensions.rst | 55 +- clang/docs/ReleaseNotes.rst | 2 + clang/docs/analyzer/user-docs.rst | 4 + clang/include/clang/AST/ASTNodeTraverser.h | 5 + clang/include/clang/AST/DeclTemplate.h | 36 + clang/include/clang/AST/RecursiveASTVisitor.h | 5 + clang/include/clang/AST/Stmt.h | 25 +- clang/include/clang/AST/TextNodeDumper.h | 1 + clang/include/clang/Basic/Builtins.def | 4 + clang/include/clang/Basic/BuiltinsX86.def | 2 - clang/include/clang/Basic/Cuda.h | 1 + clang/include/clang/Basic/DeclNodes.td | 1 + clang/include/clang/Basic/DiagnosticGroups.td | 6 +- clang/include/clang/Basic/DiagnosticParseKinds.td | 10 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 59 +- clang/include/clang/Basic/Sanitizers.h | 2 +- clang/include/clang/Basic/TargetInfo.h | 8 +- clang/include/clang/Basic/TemplateKinds.h | 4 +- clang/include/clang/Basic/arm_neon.td | 20 +- clang/include/clang/Driver/Driver.h | 3 - clang/include/clang/Parse/Parser.h | 4 + clang/include/clang/Sema/Sema.h | 13 + clang/include/clang/Serialization/ASTBitCodes.h | 5 +- .../clang/StaticAnalyzer/Checkers/Checkers.td | 17 +- .../Core/PathSensitive/CheckerContext.h | 11 + clang/include/clang/Tooling/Syntax/Nodes.h | 17 +- clang/include/clang/Tooling/Syntax/Tokens.h | 3 +- clang/include/clang/Tooling/Syntax/Tree.h | 18 +- clang/lib/AST/ASTContext.cpp | 10 +- clang/lib/AST/ASTImporter.cpp | 2 + clang/lib/AST/ASTStructuralEquivalence.cpp | 20 + clang/lib/AST/DeclBase.cpp | 1 + clang/lib/AST/DeclPrinter.cpp | 9 +- clang/lib/AST/DeclTemplate.cpp | 20 + clang/lib/AST/ItaniumMangle.cpp | 31 +- clang/lib/AST/TextNodeDumper.cpp | 4 + clang/lib/Basic/Cuda.cpp | 5 + clang/lib/Basic/Targets.cpp | 13 - clang/lib/Basic/Targets.h | 4 - clang/lib/Basic/Targets/AArch64.cpp | 10 +- clang/lib/Basic/Targets/AArch64.h | 2 - clang/lib/Basic/Targets/AMDGPU.cpp | 6 + clang/lib/Basic/Targets/ARM.cpp | 2 - clang/lib/Basic/Targets/NVPTX.cpp | 1 + clang/lib/Basic/Targets/OSTargets.cpp | 79 + clang/lib/Basic/Targets/OSTargets.h | 63 +- clang/lib/Basic/Targets/PPC.h | 11 +- clang/lib/Basic/Targets/SystemZ.h | 2 +- clang/lib/Basic/Targets/X86.h | 4 +- clang/lib/CodeGen/CGBuilder.h | 15 + clang/lib/CodeGen/CGBuiltin.cpp | 42 +- clang/lib/CodeGen/CGDecl.cpp | 1 + clang/lib/CodeGen/CGExpr.cpp | 49 +- clang/lib/CodeGen/CGExprCXX.cpp | 30 +- clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp | 2 + clang/lib/CodeGen/CGStmt.cpp | 68 +- clang/lib/CodeGen/CodeGenFunction.h | 4 + clang/lib/CodeGen/CodeGenModule.cpp | 1 + clang/lib/CodeGen/TargetInfo.cpp | 6 +- clang/lib/Driver/SanitizerArgs.cpp | 16 +- clang/lib/Driver/ToolChain.cpp | 1 + clang/lib/Driver/ToolChains/Clang.cpp | 12 + clang/lib/Driver/ToolChains/Linux.cpp | 13 +- clang/lib/Headers/xmmintrin.h | 12 +- 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| 72 + llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 13 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | 3 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 107 +- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 4 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 116 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h | 2 + llvm/lib/Target/AMDGPU/AMDGPURegAsmNames.inc.cpp | 240 ++ llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 187 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h | 3 + llvm/lib/Target/AMDGPU/AMDGPURegisterInfo.cpp | 5 +- llvm/lib/Target/AMDGPU/AMDGPURegisterInfo.td | 2 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 5 + llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 25 + llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 3 + .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 219 +- .../AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 124 +- .../AMDGPU/Disassembler/AMDGPUDisassembler.h | 11 + llvm/lib/Target/AMDGPU/GCNProcessors.td | 4 + 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llvm/lib/Target/AMDGPU/VOP3Instructions.td | 24 +- llvm/lib/Target/AMDGPU/VOP3PInstructions.td | 110 + llvm/lib/Target/AMDGPU/VOPInstructions.td | 31 + llvm/lib/Target/ARM/ARMInstrFormats.td | 2 +- llvm/lib/Target/ARM/ARMInstrVFP.td | 8 +- llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp | 130 +- llvm/lib/Target/BPF/BPF.h | 5 + llvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp | 482 +++ llvm/lib/Target/BPF/BPFAsmPrinter.cpp | 20 +- llvm/lib/Target/BPF/BPFCORE.h | 24 + llvm/lib/Target/BPF/BPFMISimplifyPatchable.cpp | 163 + llvm/lib/Target/BPF/BPFTargetMachine.cpp | 12 + llvm/lib/Target/BPF/BTF.h | 63 +- llvm/lib/Target/BPF/BTFDebug.cpp | 489 ++- llvm/lib/Target/BPF/BTFDebug.h | 63 +- llvm/lib/Target/BPF/CMakeLists.txt | 2 + llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 159 + llvm/lib/Target/Mips/Mips64InstrInfo.td | 28 + llvm/lib/Target/Mips/MipsInstrInfo.td | 46 + llvm/lib/Target/Mips/MipsInstructionSelector.cpp | 95 +- llvm/lib/Target/Mips/MipsLegalizerInfo.cpp | 4 +- llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp | 79 +- llvm/lib/Target/Mips/MipsSubtarget.cpp | 5 + .../lib/Target/PowerPC/MCTargetDesc/CMakeLists.txt | 1 + .../Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp | 14 + .../Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp | 6 + .../lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h | 10 +- .../PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp | 25 + .../Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h | 3 + .../PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp | 29 + llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 11 + llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 79 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 2 +- llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp | 4 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 141 +- llvm/lib/Target/X86/X86ISelLowering.h | 4 +- llvm/lib/Target/X86/X86InstrInfo.cpp | 101 +- llvm/lib/Target/X86/X86InstrInfo.h | 3 + llvm/lib/Transforms/IPO/ArgumentPromotion.cpp | 52 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 2 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 3 +- .../InstCombine/InstCombineLoadStoreAlloca.cpp | 6 +- .../Transforms/InstCombine/InstCombineShifts.cpp | 3 +- llvm/lib/Transforms/Instrumentation/CMakeLists.txt | 1 + .../Instrumentation/HWAddressSanitizer.cpp | 98 +- .../Transforms/Instrumentation/PoisonChecking.cpp | 357 +++ llvm/lib/Transforms/Scalar/LICM.cpp | 4 +- llvm/lib/Transforms/Scalar/LoopPredication.cpp | 2 +- llvm/lib/Transforms/Scalar/MergeICmps.cpp | 2 +- llvm/lib/Transforms/Scalar/SROA.cpp | 16 +- llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp | 2 +- .../Transforms/Scalar/TailRecursionElimination.cpp | 2 +- llvm/lib/Transforms/Utils/CodeExtractor.cpp | 186 +- llvm/lib/Transforms/Utils/LoopRotationUtils.cpp | 12 +- llvm/lib/Transforms/Utils/LoopUnroll.cpp | 5 +- llvm/lib/Transforms/Utils/LoopUnrollPeel.cpp | 49 +- llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp | 25 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 16 +- llvm/lib/XRay/InstrumentationMap.cpp | 3 +- llvm/lib/XRay/Profile.cpp | 3 +- llvm/lib/XRay/Trace.cpp | 3 +- .../Analysis/MemorySSA/loop-rotate-valuemap.ll | 26 + .../irtranslator-fp-min-max-intrinsics.ll | 88 + .../GlobalISel/legalizer-info-validation.mir | 18 + .../AArch64/GlobalISel/localizer-arm64-tti.ll | 5 +- .../AArch64/GlobalISel/opt-fold-compare.mir | 27 + .../AArch64/GlobalISel/opt-shuffle-splat.mir | 22 + .../AArch64/GlobalISel/prelegalizercombiner-br.mir | 81 + .../test/CodeGen/AArch64/GlobalISel/select-cbz.mir | 132 +- .../AArch64/GlobalISel/select-jump-table-brjt.mir | 3 +- llvm/test/CodeGen/AArch64/GlobalISel/swifterror.ll | 17 +- .../test/CodeGen/AArch64/hwasan-check-memaccess.ll | 28 +- .../CodeGen/AArch64/inline-asm-blockaddress.ll | 12 + llvm/test/CodeGen/AArch64/speculation-hardening.ll | 11 +- .../artifact-combiner-unmerge-values.mir | 484 +++ .../CodeGen/AMDGPU/GlobalISel/inst-select-add.mir | 11 +- .../GlobalISel/inst-select-amdgcn.cvt.pkrtz.mir | 12 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-ashr.mir | 10 +- .../AMDGPU/GlobalISel/inst-select-bitcast.mir | 19 +- .../GlobalISel/inst-select-concat-vectors.mir | 735 +++++ .../AMDGPU/GlobalISel/inst-select-constant.mir | 17 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir | 25 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-fadd.mir | 12 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-fmul.mir | 11 +- .../AMDGPU/GlobalISel/inst-select-fptoui.mir | 10 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-icmp.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-implicit-def.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-inttoptr.mir | 10 +- .../AMDGPU/GlobalISel/inst-select-load-smrd.mir | 30 + .../AMDGPU/GlobalISel/inst-select-maxnum.mir | 16 +- .../AMDGPU/GlobalISel/inst-select-merge-values.mir | 565 ++++ .../AMDGPU/GlobalISel/inst-select-minnum.mir | 16 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-or.mir | 8 +- .../AMDGPU/GlobalISel/inst-select-sitofp.mir | 10 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-sub.mir | 70 + .../GlobalISel/inst-select-unmerge-values.mir | 231 ++ .../CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir | 19 +- .../AMDGPU/GlobalISel/legalize-build-vector.mir | 120 + .../AMDGPU/GlobalISel/legalize-concat-vectors.mir | 85 + .../CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir | 22 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir | 22 +- .../AMDGPU/GlobalISel/legalize-fcanonicalize.mir | 22 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fcmp.mir | 99 +- .../AMDGPU/GlobalISel/legalize-fcopysign.mir | 811 ++++- .../CodeGen/AMDGPU/GlobalISel/legalize-fma.mir | 22 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir | 533 ++++ .../CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir | 533 ++++ .../CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir | 22 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir | 22 +- .../CodeGen/AMDGPU/GlobalISel/legalize-frint.mir | 36 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir | 30 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir | 30 +- .../CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir | 766 ++++- .../CodeGen/AMDGPU/GlobalISel/legalize-load.mir | 30 + .../CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir | 19 +- .../CodeGen/AMDGPU/GlobalISel/legalize-phi.mir | 11 +- .../CodeGen/AMDGPU/GlobalISel/legalize-shl.mir | 19 +- .../CodeGen/AMDGPU/GlobalISel/legalize-smax.mir | 25 +- .../CodeGen/AMDGPU/GlobalISel/legalize-smin.mir | 25 +- .../CodeGen/AMDGPU/GlobalISel/legalize-umax.mir | 25 +- .../CodeGen/AMDGPU/GlobalISel/legalize-umin.mir | 25 +- .../AMDGPU/GlobalISel/regbankselect-icmp.mir | 308 +- .../AMDGPU/GlobalISel/regbankselect-icmp.s16.mir | 83 + .../AMDGPU/GlobalISel/regbankselect-load.mir | 488 +++ .../CodeGen/AMDGPU/call-graph-register-usage.ll | 22 +- .../CodeGen/AMDGPU/call-preserved-registers.ll | 10 +- llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll | 55 +- .../CodeGen/AMDGPU/callee-special-input-sgprs.ll | 5 +- llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll | 4 +- .../AMDGPU/cross-block-use-is-not-abi-copy.ll | 64 +- llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll | 3 + .../CodeGen/AMDGPU/elf-header-flags-sram-ecc.ll | 7 + llvm/test/CodeGen/AMDGPU/fneg-combines.ll | 2 +- llvm/test/CodeGen/AMDGPU/hsa-note-no-func.ll | 2 + llvm/test/CodeGen/AMDGPU/ipra-regmask.ll | 6 +- llvm/test/CodeGen/AMDGPU/llvm.log.f16.ll | 10 +- llvm/test/CodeGen/AMDGPU/llvm.log10.f16.ll | 10 +- llvm/test/CodeGen/AMDGPU/load-lo16.ll | 8 +- llvm/test/CodeGen/AMDGPU/nested-calls.ll | 10 +- llvm/test/CodeGen/AMDGPU/omod-nsz-flag.mir | 24 +- .../CodeGen/AMDGPU/select-fabs-fneg-extract.ll | 52 +- llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll | 6 +- llvm/test/CodeGen/AMDGPU/spill-before-exec.mir | 2 +- llvm/test/CodeGen/AMDGPU/wave32.ll | 8 +- .../CodeGen/ARM/{unsafe-fsub.ll => nnan-fsub.ll} | 2 +- llvm/test/CodeGen/BPF/BTF/binary-format.ll | 44 +- llvm/test/CodeGen/BPF/BTF/extern-global-var.ll | 12 +- llvm/test/CodeGen/BPF/BTF/filename.ll | 24 +- llvm/test/CodeGen/BPF/BTF/func-func-ptr.ll | 30 +- llvm/test/CodeGen/BPF/BTF/func-non-void.ll | 30 +- llvm/test/CodeGen/BPF/BTF/func-source.ll | 24 +- llvm/test/CodeGen/BPF/BTF/func-typedef.ll | 39 +- llvm/test/CodeGen/BPF/BTF/func-unused-arg.ll | 28 +- llvm/test/CodeGen/BPF/BTF/func-void.ll | 20 +- llvm/test/CodeGen/BPF/BTF/local-var.ll | 20 +- llvm/test/CodeGen/BPF/BTF/map-def.ll | 120 + llvm/test/CodeGen/BPF/BTF/ptr-prune-type.ll | 84 + .../CodeGen/BPF/BTF/static-var-derived-type.ll | 12 +- llvm/test/CodeGen/BPF/BTF/static-var-inited-sec.ll | 12 +- llvm/test/CodeGen/BPF/BTF/static-var-inited.ll | 12 +- .../CodeGen/BPF/BTF/static-var-readonly-sec.ll | 12 +- llvm/test/CodeGen/BPF/BTF/static-var-readonly.ll | 12 +- llvm/test/CodeGen/BPF/BTF/static-var-sec.ll | 12 +- .../CodeGen/BPF/BTF/static-var-zerolen-array.ll | 12 +- llvm/test/CodeGen/BPF/BTF/static-var.ll | 12 +- llvm/test/CodeGen/BPF/CORE/offset-reloc-basic.ll | 186 ++ .../CodeGen/BPF/CORE/offset-reloc-multilevel.ll | 197 ++ .../BPF/CORE/offset-reloc-struct-anonymous.ll | 213 ++ .../CodeGen/BPF/CORE/offset-reloc-struct-array.ll | 216 ++ llvm/test/CodeGen/BPF/CORE/offset-reloc-union.ll | 220 ++ .../patchable-extern-char.ll} | 60 +- .../patchable-extern-uint.ll} | 67 +- .../patchable-extern-ulonglong.ll} | 68 +- llvm/test/CodeGen/BPF/reloc-btf-2.ll | 2 +- .../MIR/AMDGPU/machine-function-info-no-ir.mir | 29 + .../CodeGen/MIR/AMDGPU/machine-function-info.ll | 40 + .../Mips/GlobalISel/instruction-select/load.mir | 94 + .../Mips/GlobalISel/instruction-select/phi.mir | 348 +- .../Mips/GlobalISel/instruction-select/select.mir | 152 +- .../Mips/GlobalISel/instruction-select/store.mir | 94 + .../test/CodeGen/Mips/GlobalISel/legalizer/phi.mir | 233 +- .../CodeGen/Mips/GlobalISel/legalizer/select.mir | 110 + llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/load.ll | 22 + llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/phi.ll | 155 +- .../test/CodeGen/Mips/GlobalISel/llvm-ir/select.ll | 56 + llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/store.ll | 22 + .../CodeGen/Mips/GlobalISel/regbankselect/phi.mir | 222 +- .../Mips/GlobalISel/regbankselect/select.mir | 117 + llvm/test/CodeGen/Mips/abiflags32.ll | 9 +- llvm/test/CodeGen/Mips/cconv/callee-saved-fpxx1.ll | 6 +- llvm/test/CodeGen/Mips/cconv/return-hard-float.ll | 30 +- llvm/test/CodeGen/Mips/cfi_offset.ll | 4 +- llvm/test/CodeGen/Mips/fp-contract.ll | 9 +- llvm/test/CodeGen/Mips/fp64a.ll | 6 +- llvm/test/CodeGen/Mips/msa/2r.ll | 4 +- llvm/test/CodeGen/Mips/msa/2r_vector_scalar.ll | 4 +- llvm/test/CodeGen/Mips/msa/2rf.ll | 4 +- llvm/test/CodeGen/Mips/msa/2rf_exup.ll | 4 +- llvm/test/CodeGen/Mips/msa/2rf_float_int.ll | 4 +- llvm/test/CodeGen/Mips/msa/2rf_fq.ll | 4 +- llvm/test/CodeGen/Mips/msa/2rf_int_float.ll | 4 +- llvm/test/CodeGen/Mips/msa/2rf_tq.ll | 4 +- llvm/test/CodeGen/Mips/msa/3r-a.ll | 4 +- llvm/test/CodeGen/Mips/msa/3r-b.ll | 4 +- llvm/test/CodeGen/Mips/msa/3r-c.ll | 4 +- llvm/test/CodeGen/Mips/msa/3r-d.ll | 4 +- llvm/test/CodeGen/Mips/msa/3r-i.ll | 4 +- llvm/test/CodeGen/Mips/msa/3r-m.ll | 4 +- llvm/test/CodeGen/Mips/msa/3r-p.ll | 4 +- llvm/test/CodeGen/Mips/msa/3r-s.ll | 4 +- llvm/test/CodeGen/Mips/msa/3r-v.ll | 4 +- llvm/test/CodeGen/Mips/msa/3r_4r.ll | 4 +- llvm/test/CodeGen/Mips/msa/3r_4r_widen.ll | 4 +- llvm/test/CodeGen/Mips/msa/3rf.ll | 4 +- llvm/test/CodeGen/Mips/msa/3rf_4rf.ll | 4 +- llvm/test/CodeGen/Mips/msa/3rf_4rf_q.ll | 4 +- llvm/test/CodeGen/Mips/msa/3rf_exdo.ll | 4 +- llvm/test/CodeGen/Mips/msa/3rf_float_int.ll | 4 +- llvm/test/CodeGen/Mips/msa/3rf_int_float.ll | 4 +- llvm/test/CodeGen/Mips/msa/3rf_q.ll | 4 +- llvm/test/CodeGen/Mips/msa/arithmetic.ll | 4 +- llvm/test/CodeGen/Mips/msa/arithmetic_float.ll | 4 +- .../CodeGen/Mips/msa/basic_operations_float.ll | 18 +- llvm/test/CodeGen/Mips/msa/bit.ll | 4 +- llvm/test/CodeGen/Mips/msa/bitcast.ll | 4 +- llvm/test/CodeGen/Mips/msa/bitwise.ll | 4 +- llvm/test/CodeGen/Mips/msa/bmzi_bmnzi.ll | 2 +- llvm/test/CodeGen/Mips/msa/compare.ll | 4 +- llvm/test/CodeGen/Mips/msa/compare_float.ll | 4 +- llvm/test/CodeGen/Mips/msa/elm_copy.ll | 4 +- llvm/test/CodeGen/Mips/msa/elm_cxcmsa.ll | 4 +- llvm/test/CodeGen/Mips/msa/elm_insv.ll | 4 +- llvm/test/CodeGen/Mips/msa/elm_move.ll | 4 +- llvm/test/CodeGen/Mips/msa/elm_shift_slide.ll | 4 +- llvm/test/CodeGen/Mips/msa/endian.ll | 4 +- llvm/test/CodeGen/Mips/msa/frameindex.ll | 6 +- llvm/test/CodeGen/Mips/msa/i10.ll | 4 +- llvm/test/CodeGen/Mips/msa/i5-a.ll | 4 +- llvm/test/CodeGen/Mips/msa/i5-b.ll | 4 +- llvm/test/CodeGen/Mips/msa/i5-c.ll | 4 +- llvm/test/CodeGen/Mips/msa/i5-m.ll | 4 +- llvm/test/CodeGen/Mips/msa/i5-s.ll | 6 +- llvm/test/CodeGen/Mips/msa/i5_ld_st.ll | 4 +- llvm/test/CodeGen/Mips/msa/i8.ll | 4 +- llvm/test/CodeGen/Mips/msa/immediates-bad.ll | 2 +- llvm/test/CodeGen/Mips/msa/immediates.ll | 3 +- llvm/test/CodeGen/Mips/msa/inline-asm.ll | 2 +- .../CodeGen/Mips/msa/llvm-stress-s1704963983.ll | 4 +- .../CodeGen/Mips/msa/llvm-stress-s1935737938.ll | 4 +- .../Mips/msa/llvm-stress-s2090927243-simplified.ll | 4 +- .../Mips/msa/llvm-stress-s2501752154-simplified.ll | 4 +- .../CodeGen/Mips/msa/llvm-stress-s2704903805.ll | 4 +- .../CodeGen/Mips/msa/llvm-stress-s3861334421.ll | 4 +- .../CodeGen/Mips/msa/llvm-stress-s3926023935.ll | 4 +- .../CodeGen/Mips/msa/llvm-stress-s3997499501.ll | 4 +- .../Mips/msa/llvm-stress-s449609655-simplified.ll | 4 +- .../CodeGen/Mips/msa/llvm-stress-s525530439.ll | 4 +- .../CodeGen/Mips/msa/llvm-stress-s997348632.ll | 4 +- .../CodeGen/Mips/msa/llvm-stress-sz1-s742806235.ll | 4 +- llvm/test/CodeGen/Mips/msa/shift-dagcombine.ll | 2 +- llvm/test/CodeGen/Mips/msa/shift_constant_pool.ll | 12 +- llvm/test/CodeGen/Mips/msa/shift_no_and.ll | 4 +- llvm/test/CodeGen/Mips/msa/shuffle.ll | 4 +- llvm/test/CodeGen/Mips/msa/special.ll | 2 +- llvm/test/CodeGen/Mips/msa/spill.ll | 4 +- llvm/test/CodeGen/Mips/msa/vec.ll | 6 +- llvm/test/CodeGen/Mips/msa/vecs10.ll | 4 +- llvm/test/CodeGen/Mips/stack-alignment.ll | 2 +- llvm/test/CodeGen/PowerPC/aix-xcoff-basic.ll | 37 + llvm/test/CodeGen/PowerPC/machine-pre.ll | 55 + llvm/test/CodeGen/RISCV/add-before-shl.ll | 19 + llvm/test/CodeGen/Thumb2/mve-nofloat.ll | 139 + llvm/test/CodeGen/X86/avx2-intrinsics-canonical.ll | 174 +- llvm/test/CodeGen/X86/fmul-combines.ll | 8 +- llvm/test/CodeGen/X86/fp-fast.ll | 2 +- llvm/test/CodeGen/X86/load-partial.ll | 57 +- .../CodeGen/X86/merge-consecutive-stores-nt.ll | 24 +- llvm/test/CodeGen/X86/smul_fix_sat.ll | 2 +- llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll | 122 +- llvm/test/CodeGen/X86/vector-shuffle-128-v4.ll | 16 +- ...volatile-memstores-nooverlapping-load-stores.ll | 83 + .../MIR/X86/avoid-single-entry-value-location.mir | 67 + .../MIR/X86/dbgcall-site-interpretation.mir | 200 ++ .../MIR/X86/dbgcall-site-lea-interpretation.mir | 140 + llvm/test/DebugInfo/MIR/X86/dbginfo-entryvals.mir | 79 + .../DebugInfo/MIR/X86/debug-call-site-param.mir | 158 + .../MIR/X86/multiple-param-dbg-value-entry.mir | 83 + .../MIR/X86/regcoalescing-clears-dead-dbgvals.mir | 243 -- llvm/test/DebugInfo/PDB/Inputs/objfilename.yaml | 6 + llvm/test/DebugInfo/PDB/pdbdump-objfilename.test | 7 + llvm/test/DebugInfo/PDB/pdbdump-objfilename.yaml | 14 - .../DebugInfo/X86/dwarf-callsite-related-attrs.ll | 7 +- .../HWAddressSanitizer/alloca-with-calls.ll | 3 +- .../Instrumentation/HWAddressSanitizer/alloca.ll | 15 +- .../Instrumentation/HWAddressSanitizer/basic.ll | 52 +- .../HWAddressSanitizer/kernel-alloca.ll | 5 +- .../PoisonChecking/basic-flag-validation.ll | 322 ++ .../Instrumentation/PoisonChecking/ub-checks.ll | 137 + llvm/test/MC/AArch64/adrp-relocation2.s | 7 + llvm/test/MC/AMDGPU/accvgpr-altnames.s | 10 + llvm/test/MC/AMDGPU/dl-insts.s | 1 + llvm/test/MC/AMDGPU/mai-err.s | 50 + llvm/test/MC/AMDGPU/mai.s | 985 ++++++ llvm/test/MC/AMDGPU/xdl-insts-gfx908.s | 46 + llvm/test/MC/ARM/mve-fp-registers.s | 32 + llvm/test/MC/Disassembler/AMDGPU/dl-insts.txt | 1 + llvm/test/MC/Disassembler/AMDGPU/mai.txt | 979 ++++++ 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llvm/test/CodeGen/BPF/CORE/offset-reloc-multilevel.ll create mode 100644 llvm/test/CodeGen/BPF/CORE/offset-reloc-struct-anonymous.ll create mode 100644 llvm/test/CodeGen/BPF/CORE/offset-reloc-struct-array.ll create mode 100644 llvm/test/CodeGen/BPF/CORE/offset-reloc-union.ll copy llvm/test/CodeGen/BPF/{BTF/extern-global-var.ll => CORE/patchable-extern-char [...] copy llvm/test/CodeGen/BPF/{BTF/extern-global-var.ll => CORE/patchable-extern-uint [...] copy llvm/test/CodeGen/BPF/{BTF/extern-global-var.ll => CORE/patchable-extern-ulon [...] create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/instruction-select/load.mir create mode 100644 llvm/test/CodeGen/Mips/GlobalISel/instruction-select/store.mir create mode 100644 llvm/test/CodeGen/PowerPC/aix-xcoff-basic.ll create mode 100644 llvm/test/CodeGen/PowerPC/machine-pre.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-nofloat.ll create mode 100644 llvm/test/CodeGen/X86/volatile-memstores-nooverlapping-load-stores.ll create mode 100644 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llvm/test/MC/AMDGPU/accvgpr-altnames.s create mode 100644 llvm/test/MC/AMDGPU/mai-err.s create mode 100644 llvm/test/MC/AMDGPU/mai.s create mode 100644 llvm/test/MC/AMDGPU/xdl-insts-gfx908.s create mode 100644 llvm/test/MC/Disassembler/AMDGPU/mai.txt create mode 100644 llvm/test/MC/Disassembler/AMDGPU/xdl-insts-gfx908.txt create mode 100644 llvm/test/MC/Mips/macro-sge.s create mode 100644 llvm/test/MC/Mips/macro-sge64.s create mode 100644 llvm/test/MC/Mips/macro-sgt.s create mode 100644 llvm/test/MC/Mips/macro-sgt64.s delete mode 100644 llvm/test/Object/Inputs/absolute.elf-x86-64 delete mode 100644 llvm/test/Object/Inputs/relocatable-with-section-address.elf-x86-64 delete mode 100644 llvm/test/Object/Inputs/thumb-symbols.elf.arm delete mode 100644 llvm/test/Object/Inputs/weak.elf-x86-64 create mode 100644 llvm/test/ThinLTO/X86/Inputs/cfi-icall-only-bazqux.ll create mode 100644 llvm/test/ThinLTO/X86/cfi-icall-only-defuse.ll create mode 100644 llvm/test/Transforms/HotColdSplit/sink-multiple-bitcasts-of-all [...] create mode 100644 llvm/test/Transforms/InstCombine/redundant-left-shift-input-mas [...] create mode 100644 llvm/test/Transforms/InstCombine/redundant-left-shift-input-mas [...] create mode 100644 llvm/test/Transforms/InstCombine/redundant-left-shift-input-mas [...] create mode 100644 llvm/test/Transforms/InstCombine/redundant-left-shift-input-mas [...] create mode 100644 llvm/test/Transforms/InstCombine/redundant-left-shift-input-mas [...] create mode 100644 llvm/test/Transforms/InstCombine/redundant-left-shift-input-mas [...] rename llvm/test/Transforms/InstCombine/{redundant-shift-input-masking.ll => redun [...] create mode 100644 llvm/test/Transforms/InstCombine/trunc-load.ll create mode 100644 llvm/test/Transforms/InstSimplify/ashr-lshr.ll create mode 100644 llvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch-red [...] create mode 100644 llvm/test/tools/llvm-dwarfdump/X86/stats-dbg-callsite-info.ll create mode 100644 llvm/test/tools/llvm-objdump/lit.local.cfg rename llvm/test/tools/{llvm-pdbdump => llvm-pdbutil}/Inputs/ClassLayoutTest.cpp (100%) rename llvm/test/tools/{llvm-pdbdump => llvm-pdbutil}/Inputs/ClassLayoutTest.pdb (100%) rename llvm/test/tools/{llvm-pdbdump => llvm-pdbutil}/Inputs/ComplexPaddingTest.cp [...] rename llvm/test/tools/{llvm-pdbdump => llvm-pdbutil}/Inputs/ComplexPaddingTest.pd [...] rename llvm/test/tools/{llvm-pdbdump => llvm-pdbutil}/Inputs/FPOTest.pdb (100%) rename llvm/test/tools/{llvm-pdbdump => llvm-pdbutil}/Inputs/FilterTest.cpp (100%) rename llvm/test/tools/{llvm-pdbdump => llvm-pdbutil}/Inputs/FilterTest.pdb (100%) rename llvm/test/tools/{llvm-pdbdump => llvm-pdbutil}/Inputs/InjectedSource.pdb (100%) rename llvm/test/tools/{llvm-pdbdump => llvm-pdbutil}/Inputs/LoadAddressTest.cpp (100%) rename llvm/test/tools/{llvm-pdbdump => llvm-pdbutil}/Inputs/LoadAddressTest.pdb (100%) rename llvm/test/tools/{llvm-pdbdump => llvm-pdbutil}/Inputs/PrettyFuncDumperTest. [...] rename llvm/test/tools/{llvm-pdbdump => llvm-pdbutil}/Inputs/PrettyFuncDumperTest. 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