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from 4c013b3a56e [X86][GlobalISEL] Support lowering aligned unordered atomics new 9daee5ff7bc [AArch64][GlobalISel] Regbankselect: Fix G_BUILD_VECTOR try [...] new 915dcbebc00 [InstCombine] add tests for masked store/scatter; NFC
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Summary of changes: lib/Target/AArch64/AArch64RegisterBankInfo.cpp | 7 +++-- .../GlobalISel/regbankselect-build-vector.mir | 34 ++++++++++++++++++++++ test/Transforms/InstCombine/masked_intrinsics.ll | 27 +++++++++++++++++ 3 files changed, 66 insertions(+), 2 deletions(-) create mode 100644 test/CodeGen/AArch64/GlobalISel/regbankselect-build-vector.mir