This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig in repository toolchain/ci/llvm-project.
from 5bd4a4806aa Remove ::gets for FreeBSD 13 and later adds 37dd59298fd [X86] Make getZeroVector return floating point vectors in t [...] adds 486b173cfeb [NewPM][Sancov] Create the Sancov Pass after building the p [...] adds acf81f4210c [StackMap] Current stackmap version should be 3. NFC. adds 3262084384c [X86][SSE] Add support for <64 x i1> bool reduction adds 9d570020708 [X86] Add test case for PR32546 adds 178cd2cd3a6 [X86][SSE] Fix out of range shift introduced in D67070/rL371328 adds df2501adcac [ARM] Remove declaration of unimplemented function. NFC. adds 8b70139e959 [NFC] Make the describeLoadedValue() hook return machine op [...] adds 5a583665f4c [DebugInfo][X86] Describe call site values for zero-valued imms adds c8afbf3d95d Do not intercept malloc_usable_size on NetBSD adds 14f1990921f Enable leak-detection for NetBSD/amd64 in test/asan adds 307daa71a8f [ASan] Only run dlopen-mixed-c-cxx.c with static runtime adds 90d2be0163e Stop marking 5 ASan tests as failing on NetBSD/i386 adds def6ca8b330 Enable LSan tests for NetBSD/i386 adds 64965430db5 [NFC][InstSimplify] Some tests for dropping null check afte [...] adds aff5bee35fb [InstCombine] fold extract+insert into identity shuffle adds 080ecafdd8b Move prop-sink branch to monorepo. adds 30837abd962 [X86] Teach materializeVectorConstant to not call getZeroVe [...] adds dac34f52d3f [DAGCombiner][X86][ARM] Teach visitMULO to fold multiplies [...] adds 97d41b89174 [X86] Use DAG.getConstant instead of getZeroVector in combi [...] adds 94db67f0e1c [X86] X86DAGToDAGISel::combineIncDecVector(): call getSplat [...] adds 354a46444ce [InstCombine] add tests for icmp with srem operand; NFC adds 6e2c5c87103 [InstSimplify] simplifyUnsignedRangeCheck(): if we know tha [...] adds 9c119012566 [X86] Remove call to getZeroVector from materializeVectorCo [...] adds 77dd86ee4aa [X86] Add a hack to combineVSelectWithAllOnesOrZeros to tur [...] new 139a9d6c0e0 [InstCombine][NFC] Some tests for usub overflow+nonzero che [...] new e0ea746215c [X86][SSE] SimplifyDemandedVectorEltsForTargetNode - add fa [...]
The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: clang/lib/CodeGen/BackendUtil.cpp | 24 +- .../Checkers/GenericTaintChecker.cpp | 94 ++-- clang/test/Analysis/taint-generic.c | 42 ++ .../sanitizer_platform_interceptors.h | 3 +- .../test/asan/TestCases/Linux/dlopen-mixed-c-cxx.c | 5 +- .../test/asan/TestCases/Posix/coverage-reset.cpp | 2 - compiler-rt/test/asan/TestCases/Posix/coverage.cpp | 1 - .../Posix/interception-in-shared-lib-test.cpp | 2 - .../test/asan/TestCases/suppressions-library.cpp | 1 - compiler-rt/test/asan/lit.cfg.py | 3 +- compiler-rt/test/lsan/lit.common.cfg.py | 2 +- llvm/include/llvm/CodeGen/TargetInstrInfo.h | 2 +- llvm/include/llvm/Object/StackMapParser.h | 4 +- llvm/lib/Analysis/InstructionSimplify.cpp | 33 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 42 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 22 +- llvm/lib/CodeGen/TargetInstrInfo.cpp | 6 +- llvm/lib/Target/ARM/ARMBaseRegisterInfo.h | 2 - llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 9 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 130 +++-- llvm/lib/Target/X86/X86InstrAVX512.td | 21 + llvm/lib/Target/X86/X86InstrInfo.cpp | 7 +- llvm/lib/Target/X86/X86InstrSSE.td | 17 +- .../InstCombine/InstCombineVectorOps.cpp | 52 ++ llvm/test/CodeGen/ARM/select.ll | 4 +- llvm/test/CodeGen/X86/2012-04-26-sdglue.ll | 4 +- llvm/test/CodeGen/X86/avx-basic.ll | 2 +- llvm/test/CodeGen/X86/avx2-gather.ll | 4 +- llvm/test/CodeGen/X86/avx512-cmp-mask.ll | 51 ++ llvm/test/CodeGen/X86/combineIncDecVector-crash.ll | 51 ++ llvm/test/CodeGen/X86/fold-load-vec.ll | 2 +- llvm/test/CodeGen/X86/nontemporal-3.ll | 149 ++---- llvm/test/CodeGen/X86/packss.ll | 22 +- llvm/test/CodeGen/X86/vec_ss_load_fold.ll | 4 +- llvm/test/CodeGen/X86/vector-reduce-and-bool.ll | 149 ++---- llvm/test/CodeGen/X86/vector-reduce-mul.ll | 573 ++++++++++----------- llvm/test/CodeGen/X86/vector-reduce-or-bool.ll | 155 ++---- llvm/test/CodeGen/X86/vector-reduce-xor-bool.ll | 286 ++++------ .../CodeGen/X86/vector-shuffle-combining-ssse3.ll | 6 +- llvm/test/CodeGen/X86/xmulo.ll | 12 +- .../DebugInfo/X86/dbgcall-site-zero-valued-imms.ll | 68 +++ .../Transforms/InstCombine/icmp-div-constant.ll | 124 ++++- .../InstCombine/insert-extract-shuffle.ll | 17 +- .../result-of-usub-is-non-zero-and-no-overflow.ll | 343 ++++++++++++ ...l-check-in-uadd_with_overflow-of-nonnull-ptr.ll | 246 +++++++++ 45 files changed, 1757 insertions(+), 1041 deletions(-) create mode 100644 llvm/test/CodeGen/X86/avx512-cmp-mask.ll create mode 100644 llvm/test/CodeGen/X86/combineIncDecVector-crash.ll create mode 100644 llvm/test/DebugInfo/X86/dbgcall-site-zero-valued-imms.ll create mode 100644 llvm/test/Transforms/InstCombine/result-of-usub-is-non-zero-and [...] create mode 100644 llvm/test/Transforms/InstSimplify/redundant-null-check-in-uadd_ [...]