[Tcwg-commits] [llvm] branch stable updated (36b8e0d064a -> 85d638808ba)

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from 36b8e0d064a Creating branches/google/stable and tags/google/stable/2018 [...] adds af2984265a8 [Hexagon] Add patterns for shifts of v2i16 adds b2251b3e323 DebugInfo: Move addAddrBase from DwarfUnit to DwarfCompileUnit adds 3cc32f95a30 [codeview] Add begin/endSymbolRecord helpers, NFC adds b4b260e1797 DebugInfo: Avoid using split DWARF when the split unit woul [...] adds fb3de31920f [NVPTX] Lower instructions that expand into libcalls. adds 726751627e3 [Util] Refer to [s|z]exts of args when converting dbg.decla [...] adds e4bfa17a91e [NewGVN] Update use counts for SSA copies when replacing th [...] adds e2f3e50df6a [WebAssembly] Check if the section order is correct adds 7a4d0b9a104 [X86] Make hasNoCarryFlagUses/hasNoSignedComparisonUses tak [...] adds bf1554b9031 [X86] Rename hasNoSignedComparisonUses to hasNoSignFlagUses [...] adds c3c2387894d [SILoadStoreOptimizer] Use std::abs to avoid truncation. adds 1921566f91e [Power9][NFC] add setb exploitation test case adds c54b6d11d6b [mips] Fix test typo in rL348914 adds 7c45236930c [InstSimplify] Add tests for saturating add/sub + icmp; NFC adds 1fe1ffe00e0 [TargetLowering] Add ISD::OR + ISD::XOR handling to Simplif [...] adds cd3015238be Fix -Wunused-variable warning. NFCI. adds 75e4c6215f0 Regenerate neon copy tests. NFCI. adds b0f4bab2db1 [CodeGen] Enhance machine PHIs optimization adds 267dfed3ade Register kASan shadow offset for NetBSD/amd64 adds 50df229c26a Add NetBSD support in needsRuntimeRegistrationOfSectionRange. adds f7f12476f99 [X86] Add optsize SHLD/SHRD tests adds 0ef8b711371 [X86] Lower to SHLD/SHRD on slow machines for optsize adds f0db4e74b45 [X86] Begin cleaning up combineOr -> SHLD/SHRD. NFCI. adds 4ade6c45f2c [X86] Autogenerate complete checks. NFC adds 0c53afc25d2 [gn build] Add build files for llvm-as, llvm-dis, llvm-dwar [...] adds 6189ca00b18 [gn build] Add build files for obj2yaml, yaml2obj, and lib/ [...] adds 10cdfc9e777 [gn build] Merge r349167 adds 7f737c44006 [X86] Add computeKnownBits tests for funnel shift intrinsics adds c1aee892b9c [SelectionDAG] Add FSHL/FSHR support to computeKnownBits adds 6154b3404b1 Document the usage of BOOTSTRAP_XXX with stage2 builds adds c23bed32d43 Use backquotes to avoid a sphinx unexpected error: Unknown [...] adds e253500cfce Update the list of platforms & archs adds c5f4a842fff [DAGCombiner] allow hoisting vector bitwise logic ahead of [...] adds d353a688c4e [x86] increment/decrement constant vector with min/max in v [...] adds f96c9df4385 [InstCombine] add tests for vector widening transforms (PR4 [...] adds 421218c7405 [InstCombine] regenerate test checks; NFC adds dbb2df9229b [InstCombine] Add additional saturating add/sub + icmp tests; NFC adds ac6fe2834cb [InstCombined] Add more tests for cttz/ctlz + icmp; NFC adds 3937045b029 [InstCombine] Regenerate test checks; NFC adds 67f59bef66c Revert "[InstCombine] Regenerate test checks; NFC" adds af08be2c8a5 [X86] Autogenerate complete checks. NFC adds 53dfd27cfe8 [X86] Remove truncation handling from EmitTest. Replace it [...] adds 80a3a8cae42 Regenerate test (merges X86+X64 cases). NFCI. adds 96b0ff50830 [InstCombine] Make cttz/ctlz knownbits tests more robust; NFC adds 032b00a5404 [X86] Pull out constant splat rotation detection. adds 745ea2fc32a [InstCombine] Regenerate test checks; NFC adds 8f7655d1e44 [InstCombine] Add cttz/ctlz + select non-bitwidth tests; NFC adds 37676b50b62 [EarlyCSE] If DI can't be salvaged, mark it as unavailable. adds fae8aa36b36 [gn build] Add build files for opt and its dependency Trans [...] adds d279ef3f2d7 [Power9][NFC]Make pre-inc-disable case more robust adds 847f938b2ee [Power9][NFC]update vabsd case for better dumping adds 8f40271f0cb [X86] Fix bad operand lookup for cmov introduced in r349315 adds 7aae36e750b [X86] Add test case for PR39968. NFC adds 8178ac881e1 [llvm-mca] Move llvm-mca library to llvm/lib/MCA. adds c89c03b58be DebugInfo: Assume an absence of ranges or high_pc on a CU m [...] adds 6c9df68ed93 [AArch64] Re-run load/store optimizer after aggressive tail [...] adds 4c18d279009 [MIPS GlobalISel] Lower G_UADDE and narrowScalar G_ADD adds e52a0ade964 [AggressiveInstCombine] add test for rotate insertion point; NFC adds ef027ed59f3 Regenerate test in prep for SimplifyDemandedBits improvements. adds 4ed822d1608 [MCA] Don't assume that createMCInstrAnalysis() always retu [...] adds cc188a7f8bb Revert "DebugInfo: Assume an absence of ranges or high_pc o [...] adds 765a7627d9b [MCA] Add support for BeginGroup/EndGroup. adds e2e53c456d4 ARM: use acquire/release instruction variants when available. adds a7f5217bfb5 [MIPS GlobalISel] Remove switch statement (fix r349346 for MSVC) adds 18f6a2ac130 [MS Demangler] Add a helper function to print a Node as a string. adds a8e4afaa8d6 [PDB] Add some helper functions for working with scopes. adds 785589d4997 Add missing include file. adds 4a9ee89912a FastIsel: take care to update iterators when removing instr [...] adds 51120d77dfd [AMDGPU][MC][DOC] Updated AMD GPU assembler description adds e84034484b9 [InstSimplify] Simplify saturating add/sub + icmp adds 29dd0aa5bb9 [AMDGPU][MC][DOC] A fix for build failure in r349368 adds 1987714929e [TargetLowering] Add DemandedElts mask to SimplifyDemandedB [...] adds 23da1106786 [AMDGPU][MC][DOC] A fix for build failure in r349370 adds a54a3917dc9 AsmParser: test .double NaN and .double inf adds 1ea2e05be9e NFC: remove unused variable adds ffdc67646ac Convert (CMP (srl/shl X, C), 0) to (CMP (and X, C'), 0) whe [...] adds e23763e5beb [InstCombine] don't widen an arbitrary sequence of vector o [...] adds b7aabefcef8 [SelectionDAG] Fix noop detection for vectors in AssertZext [...] adds 2bf594e6caf [SDAG] Clarify the origin of chain in REG_SEQUENCE in comment, NFC adds 6789c7f5ced DebugInfo: Update gold plugin tests due to CU attribute reo [...] adds fae3cc44a92 [AggressiveInstCombine] convert rotate with guard branch in [...] adds f3b65bc4f2f [X86][SSE] Split SimplifyDemandedBitsForTargetNode X86ISD:: [...] adds 96b0873b25d [codeview] Flush labels before S_DEFRANGE* fragments adds c163300de59 [X86] Add T1MSKC and TZMSK to isDefConvertible used by opti [...] adds bcb7d765928 [WebAssembly] Fix assembler parsing of br_table. adds aa3674df5b5 [X86][SSE] Improve immediate vector shift known bits handling. adds 754733f9f9f [VFS] Add isLocal to ProxyFileSystem and add unit tests. adds 7c87d1aa46f hwasan: Move ctor into a comdat. adds 625d4a7a0d6 [X86] Add baseline tests for D55780 adds e1af89a06fd [FileCheck] Annotate input dump (1/7) adds 3fc136c9a9e [FileCheck] Annotate input dump (2/7) adds 7e86f826b9b [FileCheck] Annotate input dump (3/7) adds 8a1f7d65f79 [FileCheck] Annotate input dump (4/7) adds cf38e31d996 [FileCheck] Annotate input dump (5/7) adds 0b0cf2671a9 [FileCheck] Annotate input dump (6/7) adds c4c24a8093c [FileCheck] Annotate input dump (7/7) adds 302fa307d9f [FileCheck] Annotate input dump (final tweaks) adds 5ba1929dff5 Recommit r348806: DebugInfo: Use symbol difference for CU l [...] adds 80213579044 [codeview] Align symbol records to save 441MB during linkin [...] adds c0102bb7f8e [FileCheck] Try to fix test on windows due to r349418 adds 6022f00f350 [codeview] Update comment on aligning symbol records adds e0bb219a274 [Support] Fix GNU/kFreeBSD build adds 5ebd7af2ed1 [PowerPC] Improve vec_abs on P9 adds 234f7380ec8 [CaptureTracking] Pass MaxUsesToExplore from wrappers to th [...] adds 34ef4ce8299 [NFC] fix test case issue that with wrong label check. adds e33ed814287 [X86] Const correct some helper functions X86InstrInfo.cpp. NFC adds 7dc49173c67 [X86] Add test case for PR40060. NFC adds a2fa464a640 [NFC] Add new test to cover the lhs scheduling issue for P9. adds a032360a02d [PowerPC] Exploit power9 new instruction setb adds d662b752865 [PowerPC][NFC]Update vabsd cases with vselect test cases adds d67543f4164 [X86] Add test cases to show isel failing to match BMI blsm [...] adds 0b730b16a10 [AArch64] [MinGW] Allow enabling SEH exceptions adds 21db422faf6 Introduce control flow speculation tracking pass for AArch64 adds ce5a6119833 [X86][SSE] Replace (VSRLI (VSRAI X, Y), 31) -> (VSRLI X, 31) fold. adds 94f848082d6 [X86][SSE] Move VSRAI sign extend in reg fold into Simplify [...] adds d38a2490f32 AMDGPU/GlobalISel: Legalize/regbankselect fneg/fabs/fsub adds 563dd25b0e4 GlobalISel: Improve crash on invalid mapping adds 69008a07a6c SROA: preserve alignment tags on loads and stores. adds fe8acf3ad35 [TargetLowering] Fallback from SimplifyDemandedVectorElts t [...] adds 08319618c5c AMDGPU: Legalize/regbankselect fma adds 5af2f5e1047 AMDGPU: Legalize/regbankselect frame_index adds f14481850f5 [IPO][AVR] Create new Functions in the default address spac [...] adds 20b2043d8be [X86][SSE] Add 128-bit vector funnel shift tests adds 4acf41029c5 [X86][AVX] Add 256/512-bit vector funnel shift tests adds a0875a91cbb [AArch64] - Return address signing dwarf support adds 7fe679909d1 [MIPS GlobalISel] ClampScalar G_AND G_OR and G_XOR adds a002f3a8ef0 [llvm-dwarfdump] - Do not error out on R_X86_64_DTPOFF64/R_ [...] adds f6775ea3ff7 [docs] Improve HowToCrossCompilerBuiltinsOnArm adds 7c859dd19bc [SelectionDAG][X86] Fix [US](ADD|SUB)SAT vector legalizatio [...] adds 97b31b7b6f9 [X86] Use UADDSAT/USUBSAT instead of ADDUS/SUBUS adds 6b6826dc5bb [X86][SSE] Add shift combine 'out of range' tests with UNDEFs adds cbe186ea735 [gn build] Add build files for llvm-ar, llvm-nm, llvm-objdu [...] adds 907f5668d22 [gn build] Add build file for llvm-bcanalyzer adds 4770e3f8d89 [gn build] Add build file for llvm-pdbutil adds 046371adb09 [MIPS GlobalISel] Select G_SDIV, G_UDIV, G_SREM and G_UREM adds cfa2cf74cd9 [X86][SSE] Don't use 'sign bit select' vXi8 ROTL lowering f [...] adds 25333a14e77 [LoopUnroll] Honor '#pragma unroll' even with -fno-unroll-loops. adds 1b35b9e8551 [X86][SSE] Don't use 'sign bit select' vXi8 ROTL lowering f [...] adds 6b71eaac0a2 [LoopVectorize] Rename pass options. NFC. adds 2128fd1c561 Add FMF management to common fp intrinsics in GlobalIsel adds 1bc20f09859 [InstCombine] add tests for scalarization; NFC adds 93e27891ee4 [llvm-symbolizer] Omit stderr output when symbolizing a crash adds daedb463ee2 [CMake] Default options for faster executables on MSVC adds 6eed1f875bd Buildfix for r345516 (Clang compilation failing). adds 9c62d5728b3 [X86] Create PSUBUS from (add (umax X, C), -C) adds 6933dc723b2 [X86] Use SADDSAT/SSUBSAT instead of ADDS/SUBS adds a04db6078af [InstCombine] refactor isCheapToScalarize(); NFC adds 401feb8405f [X86] Don't use SplitOpsAndApply to create ISD::UADDSAT/ISD [...] adds 2d08f9b6516 [SCCP] Get rid of redundant call for getPredicateInfoFor (NFC). adds 6ea39d18c57 DebugInfo: Fix missing local imported entities after r349207 adds efd098d00b1 [AMDGPU] Removed the unnecessary operand size-check-assert [...] adds a0b99f282ac [InstCombine] Simplify cttz/ctlz + icmp eq/ne into mask check adds 1193c410de0 [X86] Add BSR to isUseDefConvertible. adds 7ad137666b7 Change the objc ARC optimizer to use the new objc.* intrinsics adds 9b284bbafd9 [llvm-mca] Dump mask in hex adds a9a68e43308 [llvm-mca] Update the Exynos test cases (NFC) adds 76d00595dda Fix MSVC dependency issue between Clang-tablegen and LLVM-tablegen adds e7e39420a0c [AARCH64] Added test case for PR40091 adds 974ebed4b6a [asan] In llvm.asan.globals, allow entries to be non-Global [...] adds 3a364fda921 Revert r349541 (Fix MSVC dependency issue between Clang-tab [...] adds faf7b5daf52 [InstCombine] auto-generate complete checks; NFC adds e15b0c691db [AArch64] Avoid crashing on .seh directives in assembly adds 7c9e35df238 Rewrite objc intrinsics to runtime methods in PreISelIntrin [...] adds 83544a50cc4 [LoopVectorize] auto-generate complete checks; NFC adds b9f7652283e [asan] Restore ODR-violation detection on vtables adds efdc43373b8 [LAA] Introduce enum for vectorization safety status (NFC). adds d2c49ab726c Add nonlazybind to objc_retain/objc_release when converting [...] adds 1a95f98a319 Preserve the linkage for objc* intrinsics as clang will set [...] adds 77376c854e2 [InstCombine] add tests for extract of vector load; NFC adds 6cd86b7cd2b [DebugInfo] Move several private headers to include directory adds ab30375a390 [llvm-mca] Improve test (NFC) adds a5a5e44a42e [AArch64] Fix instructions order (NFC) adds 174382c7045 [AArch64] Simplify the Exynos M3 pipeline model adds 3eabb09fb02 Add llvm-objdump man page adds afdba0b9d45 Re-land "Fix MSVC dependency issue between Clang-tablegen a [...] adds 4bc3cc6dbf2 [gn build] Add build file for llvm-objcopy adds 979b87d6b77 [PowerPC]Exploit P9 vabsdu for unsigned vselect patterns adds 11acfd478b7 Fix use-after-free with profile remapping. adds 79550f6c951 [bugpoint][PR29027] Reduce function attributes adds 35e719f872a [DebugInfo] Make AsmPrinter struct HandlerInfo and Handlers [...] adds e318fd6a26d [llvm-objcopy] Initial COFF support adds fcaab038f73 [llvm-objcopy] [COFF] Fix the Object forward declaration adds 028b8a60456 AMDGPU/GlobalISel: Regbankselect for fsub adds 331ffd31b3d [ARM GlobalISel] Support G_CONSTANT for Thumb2 adds 8cea59c941e AMDGPU/InsertWaitcnts: Update VGPR/SGPR bounds when bracket [...] adds 92b052b4844 [llvm-objdump] - Demangle the symbols when printing symbol [...] adds 927407d000e [llvm-objdump] - Fix BB. adds 8468ad25af6 [X86][SSE] Remove SSE ADDUS/SUBUS saturation intrinsics fro [...] adds de6808bcecb [SelectionDAG] Optional handling of UNDEF elements in match [...] adds 96c60eab748 [llvm-objdump] - Fix one more BB. adds f835629b79c AMDGPU: Use an ABS32_LO relocation for SCRATCH_RSRC_DWORD1 adds f8823459f33 [X86][SSE] Remove use of SSE ADDS/SUBS saturation intrinsic [...] adds a395f9853f0 Fix test MC/AMDGPU/reloc.s adds 0bc70d331a3 Let TableGen write output only if it changed, instead of do [...] adds cd3782549ec [TargetLowering] Fix propagation of undefs in zero extensio [...] adds e072f8b7259 [SelectionDAG] Optional handling of UNDEF elements in match [...] adds 0d195adc70c [SelectionDAG] Optional handling of UNDEF elements in match [...] adds ece16472bf8 [X86][SSE] Auto upgrade PADDUS/PSUBUS intrinsics to UADD_SA [...] adds 50ca11abbd0 Test commit adds 97de56dd446 [Object] Deduplicate long archive member names adds 725ddc363a1 [gn build] Merge r349605 adds 95dad60d32c [BPF] Generate BTF DebugInfo under BPF target adds 50eb45a1900 [ValueTracking] remove unused parameters from helper functi [...] adds 455880c4c1e [X86] Remove already upgraded llvm.x86.avx512.mask.padds/ps [...] adds 82da72ec40b Test commit adds 917e49e5a48 Regenerate test adds 27b9d229c3b [llvm-mca] Split test (NFC) adds 0a1392186ff [AArch64] Improve the Exynos M3 pipeline model adds 80ebdb91415 Revert r349517 "[CMake] Default options for faster executab [...] adds a7c670436df Revert r349517 "[CMake] Default options for faster executab [...] adds 6bad72cc707 [llvm-mca] Add an error handler for error from parseCodeRegions adds c3f9ab51440 [X86] Fix assert fails in pass X86AvoidSFBPass adds edc71ed5f57 [X86] Don't match TESTrr from (cmp (and X, Y), 0) during is [...] adds 4b7ed4f1030 [llvm-mca] Rename an error variable. adds 39d65885534 [GlobalISel][AArch64] Add support for @llvm.ceil adds dc8dd58c4c4 [ThinLTO] Remove dllimport attribute from locally defined symbols adds 838b95b50e9 llvm-dwarfdump: Improve/fix pretty printing of array dimensions adds 7bdfb496627 [X86] Remove a bunch of 'else' after returns in reduceVMULW [...] adds 97a44c83111 Re-land "Fix MSVC dependency issue between Clang-tablegen a [...] adds c93c3839e7f [BDCE][DemandedBits] Detect dead uses of undead instructions adds fc162457469 [gn build] Add build file for clang/lib/Basic and dependencies adds 576e6bc9fb2 Revert 349677, it contained a whole bunch of stuff I did no [...] adds f85aa0eda78 [gn build] Add build file for clang/lib/Basic and dependenc [...] adds 34890f3f7b7 [x86] add test to show ddup hole; NFC (PR37502) adds 8099039d57d [llvm-ar] Simplify string table get-or-insert pattern with [...] adds 992a545f9b6 Revert "[BDCE][DemandedBits] Detect dead uses of undead ins [...] adds f236e027c64 [AArch64] Use canonical copy idiom adds a403dca63b3 [AArch64] Improve Exynos predicates adds 289ef28882f [llvm-mca] Update Exynos test cases (NFC) adds d45f58d794c [llvm-mca] Rename directory for the Cortex tests (NFC) adds 1b084f058fb Test commit adds 2f8229eb68f Fix test commit adds ac0962643bb [CodeGenPrepare] Fix bad IR created by large offset GEP splitting. adds 934db57c7d6 AMDGPU: Add patterns for v4i16/v4f16 -> v4i16/v4f16 bitcasts adds 28950127b08 [X86] Remove TLI variable from ReplaceNodeResults. NFC adds d24b4c89122 [gn build] Add check-lld target and make it work adds 722838d767d [DwarfExpression] Fix a typo in a doxygen comment. NFC. adds 94edab2572a [gn build] Make `ninja check-lld` also run LLD's unit tests adds a94c9341011 [asan] Prevent folding of globals with redzones adds b7cd6fd37a7 [asan] Undo special treatment of linkonce_odr and weak_odr adds c6f008464fe AMDGPU/GlobalISel: Legality/regbankselect for atomicrmw/ato [...] adds e675164b4b1 AMDGPU/GlobalISel: RegBankSelect for fp conversions adds f6ea1298bb3 [binutils] NFC: fix clang-tidy warning: use empty() instead [...] adds 80fa53ba4eb [AArch64][GlobalISel] Implement selection og G_MERGE of two [...] adds 32e66b72648 [X86] Disable custom widening of signed/unsigned add/sub sa [...] adds 48efaa117f9 AMDGPU/GlobalISel: Fix ValueMapping tables for i1 adds 6493b367051 AMDGPU: Make i1/i64/v2i32 and/or/xor legal adds d0092eb5f9f [WebAssembly] Gate unimplemented SIMD ops on flag adds b15ca8072a1 Fix build errors introduced by r349712 on aarch64 bots. adds 347590f8fc8 [WebAssembly] Emit a splat for v128 IMPLICIT_DEF adds 42a382c2040 Introduce llvm.loop.parallel_accesses and llvm.access.group [...] adds f41808d09e5 [DAGCombiner] Fix a place that was creating a SIGN_EXTEND w [...] adds 26f63006cb9 [PowerPC] Implement the isSelectSupported() target hook adds 631b5bc6125 [HWASAN] Add support for memory intrinsics adds 768b489cfb9 [CodeGen][ExpandMemcmp] Add an option for allowing overlapp [...] adds 74d8f37a649 [NFC] Fix trailing comma after function. adds 0564fdd741d Revert r349731 "[CodeGen][ExpandMemcmp] Add an option for a [...] adds 8d01ccedc85 [MSan] Don't emit __msan_instrument_asm_load() calls adds 41901c01d44 [InstCombine][AMDGPU] Handle more buffer intrinsics adds 64002dd8fea [yaml2obj/obj2yaml] - Support dumping/parsing ABI version. adds 1224b482b42 [llvm-objcopy] - Do not drop the OS/ABI and ABIVersion fiel [...] adds 84d1605bd4a [X86] Change 'simple nonmem' intrinsic test to not use PADDSW adds 2033f0377d0 [llvm-objcopy] Use ELFOSABI_NONE instead of 0. NFC. adds 8581951a8a4 [X86] Update PADDSW/PSUBSW intrinsic usage with generic sat [...] adds 9fbd1c2311f [X86][SSE] Auto upgrade PADDS/PSUBS intrinsics to SADD_SAT/ [...] adds 6f90d45552d [SystemZ] Make better use of VLDEB adds d60a72a44b2 Re-land r349731 "[CodeGen][ExpandMemcmp] Add an option for [...] adds 182b5fec214 [SystemZ] Make better use of VGEF/VGEG adds 17177f1518b [SystemZ] Make better use of VLLEZ adds 12840a3e14d [gn build] Add build files for clang/lib/Lex and clang/lib/AST adds bc1c22befe4 [gn build] Add build files for clang/lib/{Analysis,Edit,Sema} adds dbbc3972320 [InstCombine] Make x86 PADDS/PSUBS constant folding tests generic adds 45e56bf0638 Fix gcc7 -Wdangling-else warning. NFCI. adds a564872860d [SystemZ] "Generic" vector assembler instructions shoud clobber CC adds 542c6ea9a58 [X86][AVX512] Don't custom lower v16i8 rotations. adds 55b9f76408b [RISCV] Properly evaluate fixup_riscv_pcrel_lo12 adds 0d758b2e709 [SelectionDAGBuilder] Enable funnel shift building to custo [...] adds f1c5165f1ae [Hexagon] Add patterns for funnel shifts adds ca9a824a2bf Test commit adds b1c989d798d [x86] add test to show missed movddup load fold; NFC adds dfccb77250a [InstCombine] Preserve access-group metadata. adds 959a4129de6 [CodeView] Emit global variables within lexical scopes to l [...] adds f1db33c5c1a [BPF] Disable relocation for .BTF.ext section adds 26adbdcf48c Add PLATFORM constants for iOS, tvOS, and watchOS simulators adds 2fdb358113e [CMake] Add libunwind when 'all' is being passed as LLVM_EN [...] adds 5a3982a3afb Add missing -oso-prepend-path to dsymutil test. adds 2e8e13e712d [LAA] Avoid generating RT checks for known deps preventing [...] adds 6db7914b689 [X86] Auto upgrade XOP/AVX512 rotation intrinsics to generi [...] adds fccd344a447 [MC] [AArch64] Support resolving fixups for abs_g0 etc. adds bf6fba072fb [MC] [AArch64] Correctly resolve ":abs_g1:3" etc. adds 367fb6a40ef [ConstantFolding] Split up saturating add/sub tests; NFC adds 0204292cb3a [ConstantFolding] Add tests for sat add/sub with undefs; NFC adds 884e3a402b9 [ConstantFolding] Add tests for funnel shifts with undef op [...] adds 6fce7d4a64f [ConstantFolding] Regenerate test checks; NFC adds 3198a6f4835 [ConstantFolding] Add undef tests for overflow intrinsics; NFC adds f52646ddc70 [ConstantFolding] Consolidate and extend bitcount intrinsic [...] adds d600b2ff74a [llvm-objcopy] [COFF] Don't call memcpy() with a null argum [...] adds 3a2fddd18bf DebugInfo: Fix for missing comp_dir handling with r349207 adds d446706e45f [GlobalISel][AArch64] Add G_FCEIL to isPreISelGenericFloati [...] adds 9023451c39e [llvm-objcopy] [COFF] Avoid memcpy() with null parameters i [...] adds b22434f2fdb [gn build] Add build files for clang-format and lib/{Format [...] adds 1d809c659bd [gn build] Add build file for clang/lib/Parse adds 0c0eb1c0e0a [gn build] Add build file for clang/lib/Driver adds 0a016b3a8b5 [gn build] Add build files for clang/lib/{Frontend,Frontend [...] adds de1f6390602 [gn build] Add build file for clang/lib/CodeGen and llvm/li [...] adds 819c36d5352 [gn check] Unbreak check-lld if llvm_install_binutils_symli [...] adds 69e8318af3e cmake: Remove add_llvm_loadable_module() adds 61d8223a436 Fix Windows build failures caused by r349839 adds 00fa977077b [InstCombine] [NFC] testcases for canonicalize MUL with NEG [...] adds 8e797de70d4 [ARM] Complete the Thumb1 shift+and->shift+shift transforms. adds 6bed3bd96dc [X86] Add memory forms of some SETCC instructions to hasNoC [...] adds a92af9e7d9e [X86] Refactor hasNoCarryFlagUses and hasNoSignFlagUses in [...] adds bc6d669439b [X86] Autogenerate complete checks. NFC adds 982f18131cc [LoopUnroll] Don't verify domtree by default with +Asserts. adds 99c797052e7 [memcpyopt] Add debug logs when forwarding memcpy src to dst adds 8043ea37259 AMDGPU/GlobalISel: Redo legality for build_vector adds 29b3914a49d GlobalISel: Correct example PartialMapping table adds 5547f9f07e6 AMDGPU/GlobalISel: RegBankSelect for some fp ops adds 2faa975e747 AMDGPU/GlobalISel: RegBankSelect for amdgcn.wqm.vote adds bfcb4d15130 [WebAssembly] Fix invalid machine instrs in -O0, verify in tests adds 9ba4489eca7 [X86][SSE] Auto upgrade PADDS/PSUBS intrinsics to SADD_SAT/ [...] adds b48bc9992e4 [Dwarf/AArch64] Return address signing B key dwarf support adds 34239a9c6f7 [NewPM] -print-module-scope -print-after now prints module [...] adds 6897d9b5be6 [ADT] IntervalMap: add overlaps(a, b) method adds 9996be3e328 [AArch64] Adding missing REQUIRES in aarch64 dwarf test adds 7e00db0dc55 [X86] Always use the version of computeKnownBits that retur [...] adds cf4d42cf34a [PPC] Always use the version of computeKnownBits that retur [...] adds 761005715c1 [Lanai] Always use the version of computeKnownBits that ret [...] adds 44ddf8fbce7 [SystemZ] Always use the version of computeKnownBits that r [...] adds ad5be70b1a8 [SelectionDAG] Always use the version of computeKnownBits t [...] adds 73c663e01e3 [AArch64] Always use the version of computeKnownBits that r [...] adds 7edfa8c28b5 [ARM] Always use the version of computeKnownBits that retur [...] adds e4b6275cbad [WebAssembly] Always use the version of computeKnownBits th [...] adds 418d2418ed4 [AMDGPU] Always use the version of computeKnownBits that re [...] adds 2a19b812055 [Sparc] Always use the version of computeKnownBits that ret [...] adds 14e24b5ac7b [XCore] Always use the version of computeKnownBits that ret [...] adds bdcae566d25 [AArch64] Refactor Exynos predicate (NFC) adds 8a98e4e457a [pstl] Initial integration with LLVM's CMake adds e68290348a7 [x86] move test for movddup; NFC adds 8584d265e51 ReleaseNotes: Document removal of add_llvm_loadable_module [...] adds d52b47622b2 [x86] add tests for possible horizontal op transform; NFC adds 08d71b25d59 [GlobalISel][AArch64] Add support for widening G_FCEIL adds 417ee94bf1d [x86] move misplaced tests; NFC adds 2d8917d2a69 [x86] remove excess check lines; NFC adds 8089dbf9158 [SelectionDAG] Remove KnownBits output paramater version. adds 8688ce4f76b [ARM] Set Defs = [CPSR] for COPY_STRUCT_BYVAL, as it clobbe [...] adds e5aaa246f8d [x86] add movddup specialization for build vector lowering [...] adds 77cc2398608 [RuntimeUnrolling] NFC: Add TODO and comments in connectProlog adds bf6ada6e17e [BasicAA] Fix AA bug on dynamic allocas and stackrestore adds ec2e0f93053 [TextAPI][elfabi] Fix YAML support for weak symbols adds 44dd5040ee7 AMDGPU: Don't peel of the offset if the resulting base coul [...] adds 2446e03eb9d [X86] Don't allow optimizeCompareInstr to replace a CMP wit [...] adds d77e346b122 [DAGCombiner] simplify code leading to scalarizeExtractedVe [...] adds d083aa46662 [X86] Add isel patterns to match BMI/TBMI instructions when [...] adds 3995aa63f69 [TextAPI][elfabi] Fix failing tests from D56020 adds eeb1971b1cf [IR] Add Instruction::isLifetimeStartOrEnd, NFC adds 1e9194315ce Reapply: DebugInfo: Assume an absence of ranges or high_pc [...] adds 001ab10906b [llvm] API for encoding/decoding DWARF discriminators. adds d518045effb Silence warning in assert introduced in rL349973. adds fe471b0f02f [MC] Enable .file support on COFF and diagnose it on unsupp [...] adds 8a12381a935 libDebugInfo: Refactor error handling in range list parsing adds b57910bcdff [NVPTX] Reduce stack size in NVPTXAsmPrinter::doInitialization(). adds e2d896b6d05 [X86] FixupLEAs, reduce number of calls to getOperand and u [...] adds 05728bca0af DebugInfo: Remove extra attribute lookup adds 476811f68e9 [gn build] Add build files for clang/lib/{ASTMatchers,Cross [...] adds f7f9e1587eb [gn build] Add build file for clang/lib/ARCMigrate adds 7543ae58fdd [gn build] Add build file for clang/lib/FrontendTool adds 3921b24e582 [gn build] Add build files for llvm-cat, llvm-lto, llvm-lto [...] adds 0e521aca45d Fix mingw build failures caused by r349839 adds 5442e1319f4 [gn build] Add build files for clang, clang-offload-bundler [...] adds 9c2a9197c91 [gn build] Embed __TEXT __info_plist section into clang bin [...] adds 2136d7d799c DebugInfo: Refactor named section dumping into a reusable helper adds 2260761a43b llvm-dwarfdump: Print the section name/number for addr_inde [...] adds 80a90f9ff34 llvm-dwarfdump: Remove extraneous space between '(' and 'indexed' adds 581bcc3605f [NFC][CodeGen][X86][AArch64] Tests for bit extract (pat. b) [...] adds 0ac5a1f2f88 [NFC][CodeGen][X86][AArch64] Bit extract: add nounwind attr [...] adds 9d33cfb2eb0 NFC][CodeGen][X86][AArch64] Tests for bit extract (pat. a/c [...] adds ed78f25ec76 [x86] add load fold patterns for movddup with vzext_load adds 4452b74d571 [DAGCombiner] allow narrowing of add followed by truncate adds 8619504f643 [Analysis] s/uint64_t/LocationSize; NFC adds f50772a679f [Analysis] More LocationSize cleanup; NFC adds 66952424568 llvm-dwarfdump: Dump the section name/number for addr attributes adds e9c8ee7d536 DebugInfo: Accurately propagate the section used by a reloc [...] adds 3dc07ebc183 [X86] Autogenerate complete checks. NFC adds 1c98a2b870d [X86] Fix an old FIXME about folding the zero constant into [...] adds 99017253bb6 [AAEval] Use LocationSize instead of ints; NFC adds 1a44b0bf677 [Lint] Use LocationSize instead of ints; NFC adds 8bf0c718a93 [Loads] Use LocationSize instead of ints; NFC adds fdf69948e58 [MemoryLocation] Use LocationSize instead of ints; NFC adds 21aebe46de4 [X86] Return false from hasAndNotCompare if the comparision [...] adds c03f924a0ca [MemCpyOpt] Use LocationSize instead of ints; NFC adds a698e231ae9 [ORC] Remove redundant instruction from MIPS resolver code. NFC adds 0406da47c31 [ORC] clang-format OrcMips32 and OrcMips64 code. NFC adds 39d36652968 [ORC] Rename register in the OrcMips64 resolver code comments. NFC adds fca3d1233d6 [gn build] Add build files for clang/tools/{clang-diff,clan [...] adds cc7f348434b [gn build] Add build files for clang/tools/{clang-refactor, [...] adds 832b3d83390 [gn build] Add build files for clang/tools/{arcmt-test,clan [...] adds 836b5476046 [x86] add tests for vector extend + logic ops; NFC adds 5d87a4a6994 [DAGCombiner] allow hoisting vector bitwise logic ahead of extends adds 60598d9958e [x86] add test for vector shuffle --> extend transform (PR4 [...] adds 70157e39818 [DAGCombiner] limit shuffle to extend transform (PR40146) adds 983d617e6eb [llvm-exegesis] Clustering: don't enqueue a point multiple times adds 73711055bbf [X86] Remove the ANDN check from EmitTest. adds 69ba13fd382 [X86] Autogenerate complete checks. NFC adds 7ea4f4dee2c [X86] Move the optimization that turns 'CMP (AND+IMM64), 0' [...] adds c3cdffaac18 [SelectionDAGBuilder] Use ::precise LocationSizes; NFC adds 6246d608792 [X86] Remove unused variables left after r350041. NFC adds 22e9b8d4d46 [LoopIdioms] More LocationSize::precise annotations; NFC adds 7b3352e5544 Return "[LoopSimplifyCFG] Delete dead in-loop blocks" adds 8d4113a3df2 llvm-dwarfdump: Skip address index info (and dump only the [...] adds d3a42f9fbeb DebugInfo: Add assembly comments for debug_addr contributio [...] adds e90a06c33ff DebugInfo: Use assembly label arithmetic for address pool s [...] adds 998b0e20dd3 [LoopSimplifyCFG] Delete dead exiting edges adds bd73674e92a Fix build - follow-up to r350048 which broke headerless (v4 [...] adds c040b414544 Revert rL350048 and rL350050 adds db50b6fe399 ReleaseNotes: X86 Target: bdver2 sched model was added (D52779) adds 0470456f142 [gn build] Add build files for clang/tools/{c-arcmt-test,c- [...] adds 73121b2cc82 [HWASAN] Instrument memorty intrinsics by default adds 7d9874e568f [X86] Add test cases for PR40142. NFC adds 4f8964c9727 [X86] Use GetDemandedBits to simplify the operands of PMULD [...] adds 91377328c6e [gn build] Make NOSORT line actually work adds d2ca398f080 [PowerPC] Fix the bug of ISD::ADDE to set its second return [...] adds 30ed1b37bec [NFC] Reuse variables instead of re-calling getParent adds a8f8c0e6e65 [MIPS GlobalISel] Select G_SELECT adds 08ef2bb50ec [NFC] Use utility function for guards detection adds f77e034b28f [AMDGPU] Regenerate i64 shift tests. adds 655a52dced3 [NVPTX] Allow libcalls that are defined in the current module. adds 3fba0f7f7b6 [codeview] Check if this 'this' type of a method is a pointer adds 05253fe705a [LoopIdiomRecognize] Add CTTZ support adds ad12b4d7689 [WebAssembly] Fix typos in comments in RegStackify (NFC) adds 03b93e4a1a1 [WebAssembly] Delete an unnecessary line in RegStackify adds c895ddf3acb manpages: Update the URL for https adds 0d8845bdddf [WebAssembly] Make assembler check for proper nesting of co [...] adds 9452a3c8e65 [WebAssembly] Added basic support for if/else/end_if in MC layer. adds 52920b07310 [X86] Merge getBitTestCondition into LowerAndToBT. Don't cr [...] adds 994efbbb180 [X86] Factor the core code out of LowerSETCC into a helper [...] adds 718039ebb75 [X86] Remove check that avoids creating PMULDQ with illegal [...] adds c61b4c9d9b1 [gn build] Add check-clang target and make it work adds 6bef5bc6af5 [CallSite removal] Add and flesh out APIs on the new `CallB [...] adds e63b22587b6 [PowerPC] fix register class after converting X-FORM instru [...] adds b534db940ca [PowerPC] Fix assert from machine verify pass that atomic p [...] adds 99610fde484 [NFC] clang-format functions related to r350113 adds d966eee3287 [PowerPC] Remove the implicit use of the register if it is [...] adds 9800ccf3538 [LoopSimplifyCFG] Delete dead blocks in RPO adds c489b656e8d Temporarily disable term folding in LoopSimplifyCFG, add tests adds bb0efe84120 [PowerPC] handle ISD:TRUNCATE in BitPermutationSelector adds 5f7a872f427 [NFC] Add failing test on LCSSA form preservation of LoopSi [...] adds 78dfeb7de61 [AMDGPU][MC][DOC] Updated AMD GPU assembler description. adds 6c199314a74 [CodeView] Extend the `MemberAttributes` interface with the [...] adds f8f37e9bf15 [AArch64] Add command-line option for SB adds cf32dd51513 [UnrollRuntime] NFC: Add comment and verify LCSSA adds 52b836d86e6 [X86] Directly emit X86ISD::PMULUDQ from the ReplaceNodeRes [...] adds 1ac2f5ca3d0 [UnrollRuntime] NFC: Updated exiting tests and added more tests adds 87edd2cd3c1 [X86] Don't mark SEXTLOAD v4i8->v4i64 and v8i8->v8i64 as cu [...] adds 671f3a73df4 Add vtable anchor to classes. adds 7a5cc00d560 [WebAssembly] Fix comments in ExplicitLocals (NFC) adds 67c6c6aed80 Drop SE cache early because loop parent can change in LoopS [...] adds 2ccabc1c0e8 [X86] Add test case from PR38217. NFC adds 1b58d6ff0db [mips] Show a regular error message on attempt to use one b [...] adds f667513b65f [mips] Show an error on attempt to use 64-bit PC-relative r [...] adds d7217b281a9 [PowerPC] Fix CR Bit spill pseudo expansion adds b7c3be51e43 [InstCombine] [NFC] update testcases for canonicalize MUL w [...] adds 4125b366e19 [PowerPC] Complete the custom legalization of vector int to [...] adds 6ccb5e3350d [PowerPC][NFC] Macro for register set defs for the Asm Parser adds d3118fe4225 [X86] Add custom type legalization for SIGN_EXTEND_VECTOR_I [...] adds eaec59f545e [X86] Don't mark SEXTLOAD from v4i8/v4i16/v8i8 as Custom on [...] adds dcca3661450 [PowerPC] Fix ADDE, SUBE do not know how to promote operator adds 465440846e3 [NFC] Fixed extra semicolon warning -This line, and those b [...] adds 55e4ae96b05 [PowerPC] Fix machine verify pass error for PATCHPOINT pseu [...] adds 7d9f83ae33f [llvm-objcopy] [COFF] Use Error/Expected returns instead of [...] adds 99aac248aac [AArch64] Implement the .arch_extension directive adds de6599953ce [gn build] Make `ninja check-clang` also run Clang's unit tests adds 99afb2d8c86 [DAGCombiner] Add missing one use check on the shuffle in t [...] adds cb6e4f5e324 [MSan] Handle llvm.is.constant intrinsic adds d0000b549c6 [AArch64] Accept "sve" as arch feature in assembler adds af1df624e4a [test] Fix propagating HOME envvar to unittests adds f6c97571984 Keep tablegen commands in alphabetical order. NFCI. adds e25fa6c4afd [X86] Add X86ISD::VSRAI to computeKnownBitsForTargetNode. adds ead22e207a8 [SelectionDAG] Add SIGN_EXTEND_VECTOR_INREG support to comp [...] adds 28fcc5839d5 [X86] Add additional RUN lines to prepare for D56156. NFC adds 9ea1a361788 [X86] Add PR34641 masked shld/shrd test cases adds b6aec2aa0b8 [gn build] Add some llvm/tools: llvm-rc, llvm-rtdyld adds 059c128e6ee [gn build] Add some llvm/tools: llvm-exegesis, llvm-extract [...] adds 0ed16f7c213 [InstCombine] canonicalize MUL with NEG operand adds e3c665a0ab3 Omit range checks from jump tables when lowering switches w [...] adds 81b403db295 Reversing the commit in revision 350186. Revision causes r [...] adds e00207538cd Reapply "[BDCE][DemandedBits] Detect dead uses of undead in [...] adds 6b1995d4a7b [BDCE] Remove -instsimplify from BDCE test; NFC adds 0e954606e56 [BDCE] Regenerate test checks; NFC adds e655b11ced3 [x86] move/rename helper for horizontal op codegen; NFC adds 8dcd98d80f5 [X86] Add test cases to show where LowerSELECT doesn't sele [...] adds 02b99f6373d [X86] Remove KNL specific check prefix from xaluo.ll test. NFC adds 477cc832319 [LLVM-C] Add Accessors for Discarding Value Names in the IR adds db590e11fc2 [LLVM-C] bool -> LLVMBool adds c41364cb4e2 [X86] Factor the core code out of LowerXALUO into a helper [...] adds 873a3e95c8d [InstCombine] canonicalize raw IR rotate patterns to funnel shift adds 2e17d1cbef9 [X86] Remove KNL specific check prefix from xmulo.ll test. NFC adds 26962fa6679 [X86] Add i8/i16 smulo/umulo test cases where the overflow [...] adds d06a5b99800 [X86] Allow LowerSELECT and LowerBRCOND to directly lower i [...] adds 6ded091c83d [X86] Remove the separate SMUL8/UMUL8 X86ISD opcodes by mer [...] adds 14e0643d98e Revert rL350035 "[llvm-exegesis] Clustering: don't enqueue [...] adds 85979bea18b [AMDGPU] Handle OR as operand of raw load/store adds 7063fded132 [gn build] Add some llvm/tools: llvm-xray, sancov, sanstats [...] adds a2e417f031c [gn build] Add some llvm/tools: llvm-size, llvm-split, llvm [...] adds 74decf81229 [gn build] Add some llvm/tools: llvm-mca, llvm-mt adds 102d41bf753 [gn build] Add some llvm/tools: llvm-diff, llvm-dwp adds 74cc6dc8665 [gn build] Add some llvm/tools: llvm-cxxdump, llvm-cxxfilt, [...] adds d885950c2b2 [gn build] Add some llvm/tools: llvm-c-test, llvm-cfi-verif [...] adds 9477a50c187 [gn build] Add some llvm/tools: bugpoint, dsymutil, llvm-op [...] adds 2735936d0af [MCA] Minor refactoring of method DefaultResourceStrategy:: [...] adds 60162315869 Extend Module::getOrInsertGlobal to control the constructio [...] adds ccb51b9cdd3 [BasicAA] Support arbitrary pointer sizes (and fix an overf [...] adds 4fc28082ec7 [x86] add more tests for potential horizontal ops; NFC adds 440f5b291e2 [X86] Support SHLD/SHRD masked shift-counts (PR34641) adds 86d9738a1c9 [PowerPC] Remove SeenUse check when optimizing conditional [...] adds daf05fe577a [gn build] Add some llvm/tools: lli, lli-child-target adds d0bc1feadee [gn build] Add build files for bugpoint-passes and LLVMHell [...] adds 6529ef607e0 [DAGCombiner][X86][PowerPC] Teach visitSIGN_EXTEND_INREG to [...] adds 6ed7489c1e7 [LegalizeIntegerTypes] When promoting the result of an extr [...] adds e15bc558bc7 [X86] Adding full coverage of MC encoding for the XOP and L [...] adds 5de63703c23 [gn build] Add fuzzers in llvm/tools that are needed for ch [...] adds 4bdf65768e7 [DAGCombiner] After performing the division by constant opt [...] adds ed72a6443a3 [MS Demangler] Add a flag for dumping types without tag specifier. adds c5e9935add0 [X86] Remove X86ISD::INC/DEC. Just select them from X86ISD: [...] adds 09f6d282072 Fix MSVC PointerUnion visualizer adds d4b895e8194 Format AggresiveInstCombine.cpp. NFC adds 91806338838 Git ignore CLion project configuration files. NFC adds da74d6f1e64 [BDCE] Remove instructions without demanded bits adds 1c37268cc01 [WebAssembly][NFC] Elaborate on simd-noopt test comment adds 6006c2a684f Fix assert in ObjCARC optimizer when deleting retainBlock o [...] adds 28dd6dcb26b [BDCE] Fix typo in test; NFC adds 978b6cf21d4 [ThinLTO] Scan all variants of vague symbol for reachability. adds 34ec2185536 [WebAssembly] made assembler parse block_type adds b349d9e5375 [X86] Add test cases to show that we fail to fold loads int [...] adds b7b739409d5 [X86] Add load folding support to the custom isel we do for [...] adds ff6355c1208 MSVC Visualizer for PointerUnion3 adds 02e82c3508b [gold] emit assembly listing from gold plugin on LTO stage adds 5367c025826 [tblgen][disasm] Emit record names again when decoder confl [...] adds f25ae44e165 [LLVM-C] Expand LLVMRelocMode adds 8a13966ffb0 Fix MSVC visualizer for PointerUnion4 adds a116bba31ce Teach ObjCARC optimizer about equivalent PHIs when eliminat [...] adds 90ae81a0faa [Power9] Enable the Out-of-Order scheduling model for P9 hw adds c392ae5bf05 Don't go over 80 chars in MCStreamer.cpp. NFC. adds 527dfff180d [X86] Add test cases for opportunities to use KTEST when ch [...] adds 0239fd32a43 [llvm-readobj] [COFF] Print the symbol index for relocations adds 3e86d1d0088 [CodeGen] Skip over dbg-instr in twoaddr pass adds a99d6d2122c Resubmit rL345008 "Split MachinePipeliner code into header [...] adds 114b83cbe24 [AMDGPU] Change section name with metadata access adds 355edd6d2c9 [X86] Add ADD/SUB SSAT/USAT cost tests (PR40123) adds b57398b5f9e [X86] Add ADD/SUB SSAT/USAT vector costs (PR40123) adds ebc7c27d028 [MachinePipeliner] Add missing header file to MachinePipeliner.h adds 750bca5056a [SLPVectorizer][X86] Add ADD/SUB SSAT/USAT tests (PR40123) adds 0048957ec65 [ARM] Add command-line option for SB adds d0fe19165fc [SLPVectorizer] Flag ADD/SUB SSAT/USAT intrinsics trivially [...] adds f5af6a3e1a7 [X86] Cleanup saturated add/sub tests Use X86/X64 check pre [...] adds af9a90b34ad [NFC] Fix missing testfile change of rL350299 adds 4956e307f3e [NewPM] Port Msan adds 60ccceba743 Python compat - print statement adds 9d106538ada Python compat - assertRaisesRegex adds 083a68ec95c Pythran compat - range vs. xrange adds 3050b0cd319 [NFC] Remove unused Python import adds ed38195683b Python compat - portable way of raising exceptions adds fdc4ee5d0ba Python compat - iteritems() vs. items() adds e09ecd02e50 Python compat - map/filter adds ee72f59247b Python compat - has_key vs. in operator adds 9f3acd1159d Python compat - urllib adds 247f1c68c48 Python compat - test if type is integral adds 7633906b426 Python compat - decode/encode string adds 517ecb0d373 [RISCV][MC] Accept %lo and %pcrel_lo on operands to li adds 2ae663f5c35 [MCA] Improve code comment and reuse an helper function in [...] adds 39c11273d10 [CostModel][X86] Add truncate cost tests to cover all legal [...] adds 19b8509e559 Python compat - iterator protocol adds 6da47bee848 Python compat - no explicit reference to Python version adds 559b7f6aec2 [AArch64] Add new scheduling predicates adds c5be1fd0194 [UnrollRuntime] Add DomTree verification under debug mode adds 8dbe072cd59 [llvm-objcopy][ELF] Implement a mutable section visitor tha [...] adds 22cd3d31e89 Fix typos in comments adds a8887cf0173 [x86] add tests for buildvector with extracted element; NFC adds 9e31dd76e32 Rename TapiTests to TextAPITests adds 18952b81f88 [elfabi] Introduce tool for ELF TextAPI adds 0818ca06ff6 [MCStreamer] Use report_fatal_error in EmitRawTextImpl adds aff9f2f0b9b [llvm-objcopy] Fix buildbots on older compilers adds 155efb71d2c Revert "[MachinePipeliner] Add missing header file to Machi [...] adds ce0779c34c0 Revert "Resubmit rL345008 "Split MachinePipeliner code into [...] adds ce64d36d5b6 Unbreak the modules build by splitting Target out into its [...] adds e367ebacf27 Reflow module.modulemap for readability adds f29d75749e3 Remove unused %host_cc lit pattern adds 8ef7f0e5487 [UnrollRuntime] Move the DomTree verification under expensi [...] adds bf5049eaf13 [AMDGPU] Fix scalar operand folding bug that causes SHOC pe [...] adds a25a3447d13 [CaptureTracking] Add a unit test for MaxUsesToExplore adds 40b2c31e67d [AVR] Update integration/blink.ll as we now generate sbi/cb [...] adds 7f753722162 [DAGCombiner][x86] scalarize binop followed by extractelement adds 9ccd63b1e4c [X86] Remove terrible DX Register parsing hack in parse ope [...] adds b8e8b823ce1 [x86] add common FileCheck prefix to reduce assert duplicat [...] adds 798ea3748ca [x86] split tests for FP and integer horizontal math adds 156e2dcece9 [x86] remove dead CHECK lines from test file; NFC adds 822a4f8574c [X86] Add test case for D56283. adds b2dffa2256e [x86] add AVX512 runs for horizontal ops; NFC adds b5f1a87f74d [x86] add 512-bit vector tests for horizontal ops; NFC adds f3361c432e1 [WebAssembly] Made InstPrinter more robust adds 976e457274e [WebAssembly] Fixed disassembler not knowing about new brli [...] adds 0db40de6caa [WebAssembly] Optimize Irreducible Control Flow adds 3622c84e6f1 [x86] lower extracted fadd/fsub to horizontal vector math adds 6263c2b7542 revert r350369: [x86] lower extracted fadd/fsub to horizont [...] adds d4316bc01b6 [X86] Add post-isel peephole to fold KAND+KORTEST into KTES [...] adds d9ad64b2129 [memcpyopt] Remove a few unnecessary isVolatile() checks. NFC adds d0537adb235 [WebAssembly] Split the checking from the sorting logic. adds 9128e2a74de [CMake] Use XCODE_ATTRIBUTE properties for code signing and [...] adds e533c8c0638 [AArch64] Add command-line option predres adds f7d3b9baa6a [MCA] Store extra information about processor resources in [...] adds 1943349b126 [gn build] Make write_cmake_config.py check that each key p [...] adds 5692e204f17 [ValueTracking] Fix a misuse of APInt in GetPointerBaseWith [...] adds fa356908429 [X86] Split immediate shifts tests. NFCI. adds 7fccc80ce9b [MCA] Improved handling of in-order issue/dispatch resources. adds 98472a7053e [X86] Add VPSLLI/VPSRLI ((X >>u C1) << C2) SimplifyDemanded [...] adds 0333e48f081 Fix typo: "with he MODULE" -> "with the MODULE" adds 2c32ed44d3c [CostModel][X86] Add SSE1 fp cost tests adds 1ac5e01f9fa Revert patches 348835 and 348571 because they're causing co [...] adds 4f03641b8a1 [CostModel][X86] Fix SSE1 FADD/FSUB costs adds a1e08851347 Undo r350355 "[X86] Remove terrible DX Register parsing hac [...] adds 23c6eb92813 [gn build] Add build files for llvm/lib/{LineEditor,Testing [...] adds 1b53749575e [LICM] Adjust how moving the re-hoist point works adds c7e95818e2e [gn build] Add build file for libLTO.dylib adds 4dabe1f688d [gn build] Add check-llvm target and make it work adds d02210fd4f7 [gn build] Start adding build files for LLVM unittests adds 65998e0de6a [gn build] Add more build files for LLVM unittests adds 1442f91fd85 [gn build] Add even more build files for LLVM unittests adds 12707c9d831 [gn build] Commit change that should have been in r350410. adds 8bc3ea39810 [gn build] Merge r350351 adds 392e9299f53 [InstCombine] reduce raw IR narrowing rotate patterns to fu [...] adds bbbee1ff504 [CodeExtractor] Do not extract unsafe lifetime markers adds 3ce08bac2a4 [x86] lower extracted fadd/fsub to horizontal vector math; 2nd try adds 1f63024b270 [ThinLTO] Handle chains of aliases adds 1011e428fd0 hwasan: Implement lazy thread initialization for the interc [...] adds 9f623cb147a [x86] add tests for potential horizontal vector ops; NFC adds d096eb7cf09 [X86] Add INSERT_SUBVECTOR to ComputeNumSignBits adds 8ffa038b3ef [AArch64] Adjust the cost model for Exynos M3 adds ef0f0e1084e [BDCE] Remove dead uses of arguments adds e3c5a5113ba Update the pr_datasz of .note.gnu.property section. Patch b [...] adds 0e2aef924e0 [X86] Fix warning; NFC adds faf20473497 [PGO] Use SourceFileName rather module name in PGOFuncName adds 86b1ba9bf70 [gn build] Add build file for DebugInfoPDBTests adds 4d51285021f Revert "Revert "[hwasan] Android: Switch from TLS_SLOT_TSAN [...] adds 44900997ab2 [gn build] Add build files for unittests that load shared l [...] adds f33ed6da001 [X86] Require second operand of X86vshiftuniform to be an i [...] adds a4c540d4fc7 [Inliner] Optimize shouldBeDeferred adds 4e450109c17 [gn build] Add build files for unittests under llvm/unittes [...] adds bb2acb750ea [gn build] Merge r350423 adds d5ac05fb53d [InstCombine] Add vector tests for select + ctlz/cttz; NFC adds afafc1c7d5d [InstCombine] Relax cttz/ctlz with select on zero adds b22b2e92585 [InstCombine] Add cttz/ctlz + icmp ugt/ult tests; NFC adds b1b3e118f18 Enhance MSVC visualization of PointerUnions adds b77ce1890a8 [InstCombine] Improve cttz/ctlz + icmp tests; NFC adds 0716b2a298b [X86] Allow LowerTRUNCATE to use PACKUS/PACKSS for v16i16-> [...] adds 4f4f1900616 [X86] Regenerate test to merge 32-bit and 64-bit check lines. NFC adds f04e8d9380c Added single use check to ShrinkDemandedConstant adds 1b1457fd624 [X86] Allow combinevxi1Bitcast to use pmovmskb on avx512 ta [...] adds 16d8f6a1c9a [X86] Use two pmovmskbs in combineBitcastvxi1 for (i64 (bit [...] adds bfaf433903b [X86][AsmParser] Don't allow X86::DX in CheckBaseRegAndInde [...] adds 3a7c0dbc629 [LegalizeVectorOps] Add FSHL/FSHR to the list of vector ope [...] adds c35c01fb0bf [gn build] Add build files for LLVM unittests with a custom [...] adds 97a275864c9 Resubmit rL345008 "Split MachinePipeliner code into header [...] adds c9bf5677942 [gn build] Merge r350341 adds d5bcb1b0229 [x86] explicitly set cost of integer add/sub adds 063801a2078 Revert "Resubmit rL345008 "Split MachinePipeliner code into [...] adds a3acf0b8485 [X86] Add support for matching vector funnel shift to AVX51 [...] adds 1ceebb9f5ca [gn build] Add build files for llvm/lib/Target/AArch64 + tests adds 24554eac90b [gn build] Add build files for llvm/lib/Target/ARM + tests adds 4196919f29b [CallSite removal] Add `CallBase` support to the `InstVisit [...] adds 81aa712273f [CallSite removal] Migrate all Alias Analysis APIs to use t [...] adds 4966d750d46 [X86] Update VBMI2 vshld/vshrd tests to use an immediate th [...] adds 53b5bc8bea0 [CallSite removal] Move the verifier to use `CallBase` inst [...] adds 9d8b7a0ea6f [CallSite removal] Port `IndirectCallSiteVisitor` to use `C [...] adds 9f32dc98ef8 [CallSite removal] Move the rest of IR implementation code [...] adds 8adb73fcabb Regenerate test. adds 493c4702152 Regenerate test. adds 57fed470f06 AMDGPU: Remove VS/SV mappings from select adds 76a69bd36fe AMDGPU: Remove v16i8 from register classes adds c5ca54a30fb [CodeView] More appropriate name and type for a Microsoft p [...] adds 8a839cf9598 [llvm-nm] Add --portability as alias for --format=posix adds 016461668f6 AMDGPU: test for uniformity of branch instruction, not its [...] adds ef1bd283c25 [x86] add more tests for LowerToHorizontalOp(); NFC adds b37be36a728 [llvm-demangle-fuzzer] Also fuzz microsoftDemangle(). adds e410b0a76b0 [lit] Respect PYTHONPATH adds f570c1cad56 [llvm-objcopy] Handle -O <format> flag. adds 6101a1a3201 [elfabi] Add option to manually specify file read format adds 6def08fd709 [DemandedBits] Use SetVector for Worklist adds 321f5ddb609 [X86] Add OR(AND(X,C),AND(Y,~C)) bit select tests adds f0511a7257e Revert "[DemandedBits] Use SetVector for Worklist" adds aed2d64e3d0 [MemorySSA] Extend the clobber walker with the option to sk [...] adds 08d38f01b39 [ARM] ComputeKnownBits to handle extract vectors adds 9d78d08a5cd [X86] Remove AVX512VBMI2 concat and shift intrinsics. Repla [...] adds 8ed7a6f2579 [MemorySSA] Refactor CachingWalker. adds 2d88ada4d7b [TargetLowering][AMDGPU] Remove the SimplifyDemandedBits fu [...] adds 2c6b4b67602 [MemorySSA] Add SkipSelfWalker. adds e862164938e Revert r350554 "[X86] Remove AVX512VBMI2 concat and shift i [...] adds 82be5f534b3 [X86][AutoUpgrade] Make some tweaks to reduce the number of [...] adds 6ccdeef1530 [ObjectYAML] [COFF] Support multiple symbols with the same name adds 10ecfd69442 Recommit r350554 "[X86] Remove AVX512VBMI2 concat and shift [...] adds 671f057a2cf [ValueTracking] Adjust comment in test adds 639e1eaac48 [Verifier] Reject invalid type for DILocalVariable. adds bf0230910cf [PGO] Use SourceFileName rather module name in PGOFuncName adds 20767d1ad4d [dsymutil] Upstream unobfuscation logic. adds a2285277c7f [RegisterCoalescer] dst register's live interval needs to b [...] adds 51bae74c33f fix comment typo - NFC adds 68e5e50395c AMDGPU/GlobalISel: InstrMapping for G_UNMERGE_VALUES adds 9054ffcfc83 AMDGPU/GlobalISel: RegBankSelect for add/sub with carry out adds 8ece8d35864 [dsymutil] Fix assertion triggered by empty address range. adds 2128ba0c856 AMDGPU/GlobalISel: RegBankSelect for carry-in adds 2bb35671cc5 AMDGPU/GlobalISel: Disallow VGPR->SCC copies adds f3f5c43b96f [WebAssembly] Use 'I' multiclass template for br_table (NFC) adds 1720133d5c8 RegBankSelect: Fix copy insertion point for terminators adds 6a8d6b310bb [WebAssembly] Move CFG-changing passes before RegStackify adds 7f47b71ebb3 Fix typos adds a62ff5dd41f AMDGPU/GlobalISel: Legalize concat_vectors adds 4f496b838ba gn build: Merge r350580. adds 249f5599bf4 gn build: Stop passing -o to ar. adds 5d9602f03d9 [NFC] Remove empty line as a test commit. adds 15c70a3ec30 [MC] [AArch64] Support resolving signed fixups for :abs_g0_s: etc. adds 655bef92b0c [LLVM-C] Allow Specifying Signedness in Int Cast adds 146b0f2c220 [LLVM-C] Allow For Creating a BasicBlock without a Parent Function adds 37a984b8bc0 [WebAssembly] Massive instruction renaming adds 2363fe8f868 AMDGPU/GlobalISel: Introduce vcc reg bank adds c108e2cef76 [ARM] Add missing patterns for DSP muls adds 6fb9d218ddf [llvm-readobj] Don't print '@' at end of unversioned dynsym names adds e5efa6a22a3 [GlobalISel] Fix unused variable warning in Release builds. adds 8af0c56aa26 AArch64: avoid splitting vector truncating stores. adds b4be4da6e39 Revert "Revert "Resubmit rL345008 "Split MachinePipeliner c [...] adds 77ae2fc610e [X86][Darwin] Emit compact-unwind for register-sized stack [...] adds d7b7319bc2a [DA][NewPM] Add a printerpass and port the testsuite adds 7885d2ca5ae [GlobalISel] Fix choice of instruction selector for AArch64 [...] adds 17f0b86c6e3 [gn build] Add build files for llvm/lib/Target/WebAssembly + tests adds 1f67e9ecaca [gn build] Add build files for llvm/lib/Target/PowerPC + tests adds 55534df34f2 [MachineVerifier] Include offending register in allocatable [...] adds 007d8a4f699 [gn build] Make sync_source_lists_from_cmake.py check that [...] adds bb7c7762ba5 [gn build] Update readme adds 87a5aa4fc57 [BPF] Fix .BTF.ext reloc type assigment issue adds 3f407d73ea1 [UnrollRuntime] Fix domTree failures in multiexit unrolling adds 9597cfd242c Rename DIFlagFixedEnum to DIFlagEnumClass. NFC adds 3a13126751f [x86] add tests for PR40243; NFC adds bad365135f9 [NewPM] Port tsan adds 690edfcda1c Work around a linker error caused by https://reviews.llvm.o [...] adds 6080114c3bf Revert "Work around a linker error caused by https://review [...] adds c802439b024 Revert "Revert "Revert "Resubmit rL345008 "Split MachinePip [...] adds 51d88162e48 Don't write #include "Windows/WindowsSupport.h" from the Wi [...] adds f4448ba2089 [llvm-undname] Add support for demangling msvc's noexcept types. adds 8c244a62d85 Fix go bindings for r350647: missed a function rename adds 6fbbd583d59 [llvm-mca] Improve debugging (NFC) adds 68691047f3d [llvm-mca] Update the Exynos test cases (NFC) adds f5b78899a01 [AArch64] Adjust the cost model for Exynos adds f9380afdb8e [PGO] Revert r350442 to fix commit message. adds f9a5bcde91e [WebAssembly] Rename StoreResults to MemIntrinsicResults adds 5f281ed0fca [PGO] Revert r350579 to fix commit message. adds d7d79030fba [PGO] Use SourceFileName rather module name in PGOFuncName adds 41d08309c8c [InstCombine] canonicalize another raw IR rotate pattern to [...] adds c445cab044b [llvm-profdata] add value-cutoff functionality in show command adds 9c9345cd728 [InstCombine] remove stale comments; NFC adds 533714cdc2b RegisterCoalescer: Defer clearing implicit_def lanes adds e25b508818e RegisterCoalescer: Assume CR_Replace for SubRangeJoin adds 26652ec5190 Remove check for single use in ShrinkDemandedConstant adds 1a79f8b30a8 [PowerPC] Fix assert from machine verify pass that unmatche [...] adds ca3d5270844 gn build: Fix a Python2ism in write_vcsrevision.py. adds 04492321fc5 [X86] Correct the MaskVT for avx512 gather/scatter intrinsi [...] adds e0e40d41315 gn build: Copy file permissions from input file in configur [...] adds 7a9527e0ebd [NFC] fix trivial typos in comments adds bccca22e8c3 Revert "[PowerPC] Fix assert from machine verify pass that [...] adds c80a38c134a [IPT] Drop cache less eagerly in GVN and LoopSafetyInfo adds 1c5b3e2b340 GlobalISel: Implement widenScalar for implicit_def adds 9550bf5c5c5 GlobalISel: Implement fewerElements for implicit_def adds e81d719f146 [DebugInfo] Omit location list entries with empty ranges adds 6e5b17e41ab Make the write_cmake_config.py script python3-compatible adds 33b7d2ceb89 [X86] Fix gcc7 -Wunused-but-set-variable warning. NFCI. adds efea7114d4f [AArch64] Move feature predctrl to predres adds 18381bbdcec [X86] Add extra test coverage for combining shuffles to PAC [...] adds fcd719b9671 [gn build] Add a TODO.txt file adds a5cdf514ea2 [gn build] Merge r350669 adds 9ba9ef7b241 [MSP430] Fix crash while lowering llvm.stacksave/stackrestore adds 7edabba9cf0 [gn build] Run `git ls-files '*.gn' '*.gni' | xargs -n 1 gn [...] adds 6a2a4f9b3e1 [MSP430] Optimize 'shl x, 8[+ N] -> swpb(zext(x)) [<< N]' for i16 adds 9024892e845 [X86] Enable combining shuffles to PACKSS/PACKUS for 256/51 [...] adds c547d68a568 Revert r350647: "[NewPM] Port tsan" adds e3e2923a39c [AMDGPU] Fix DPP combiner adds 7d03bc32b05 [X86][SSE] Cleanup shuffle combining test check prefixes adds e83eaf0f94d Fix typo in comment adds 56b18a6bdf2 [llvm-objdump] - Print symbol addressed when dumping disass [...] adds bac64e15758 Initial AArch64 SLH implementation. adds 8daf7f98151 Revert "[AMDGPU] Fix DPP combiner" adds ddd93146aef [DEBUGINFO][NVPTX]Make tests more strict, NFC. adds 7a86fe03b52 [mips][micrompis] Emit 16bit NOPs by default adds f740ffbc9a2 [unittests][Support] AIX: Skip sticky bit file tests adds ab8c9a26cc9 [x86] use 'nounwind' to remove test noise; NFC adds 6072588d96e [WebAssembly] Standardize order of SIMD bitselect arguments adds e9630c49863 Fix visualization of intrusive reference counted objects in MSVC. adds 2e6a4a6f5c9 refactor BlockFrequencyInfo::view to take a title parameter adds 9ea2e7f6a49 [Inliner] Assert that the computed inline threshold is non- [...] adds 849dd13009b [CodeGen] Ignore return sext/zext attributes of unused resu [...] adds 116e08026ce Refactor synthetic profile count computation. NFC. adds 2c1ba43178d [AArch64] Add test for constant shrinking with multiple use [...] adds e7d4cc83c71 [WebAssembly] Print a debug message at the start of each pass adds af085b4c8a2 Don't require a null terminator when loading objects adds 8b3efeb1030 [SimplifyLibCalls] Fix memchr expansion for constant strings. adds bb50ac5e3fe [llvm-mca] Display masks in hex adds 6d3d2f90b1d [WebAssembly] Add unimplemented-simd128 subtarget feature adds ddb3a12687d [X86] After turning VSELECT into SHRUNKBLEND, make we push [...] adds d70b6fe7365 [MemorySSA] Remove optimized value when reseting optimized. adds b56b09db881 Revert "[WebAssembly] Add unimplemented-simd128 subtarget feature" adds 2213e7fa1db Revert "Fix go bindings for r350647: missed a function rename" adds 38f7d82a39e [WebAssembly] Add simd128-unimplemented subtarget feature adds 802080d0e05 [AMDGPU] Separate feature dot-insts adds 54f94c3a2ed Revert "[WebAssembly] Add simd128-unimplemented subtarget feature" adds 8004ab40762 [AArch64] Emit the correct MCExpr relocations specifiers li [...] adds b813f92d5eb Recommit "[PowerPC] Fix assert from machine verify pass tha [...] adds b6b44e81068 [X86] Disable DomainReassignment pass when AVX512BW is disa [...] adds f4787241e56 [ARM] Size reduce teq to eors adds 8fbfe678d89 Fix RUN line in test/Transforms/LoopDeletion/crashbc.ll adds 4f41c19bff3 [LoopUnroll] add parsing for unroll parameters in -passes pipeline adds 322f6c9d898 [ARM] Fix for verifier buildbot adds 437f3bdb235 [MCA] Fix wrong definition of ResourceUnitMask in DefaultRe [...] adds 267dc8d764f [llvm-symbolizer] Add support for specifying addresses on c [...] adds 6abd350ee69 [X86] Add SSE41 vector abs tests adds 5482030e571 [llvm-objdump] - Implement -z/--disassemble-zeroes. adds 595cc08b386 [AArch64] Fix operation actions for FP16 vector intrinsics adds 731bbf3c3ab [x86] fix horizontal binop matching for 256-bit vectors (PR40243) adds 53902848786 gn build: Merge r350819 adds 07f211e13f8 [x86] fix remaining miscompile bug in horizontal binop matc [...] adds 26aa5dcb686 [RISCV][MC] Add support for evaluating constant symbols as [...] adds 2b64d3cfc4c [llvm-symbolizer] Add -p as alias to -pretty-print adds 719df2ec69b [opaque pointer types] Remove some calls to generic Type su [...] adds 6b347bc3823 [SelectionDAGBuilder] Refactor visitInlineAsm. NFC. adds 73e5c58621f [AMDGPU] Fix dwordx3/southern-islands failures. adds 4a9e2193a3a [SelectionDAGBuilder] Fix formatting. NFC. adds 03e297e48e3 [llvm-objdump] - Do not include reserved undefined symbol i [...] adds 0c81e7aa767 [SelectionDAGBuilder] Refactor GetRegistersForValue. NFCI. adds d2ea65b7da8 Repair compilation of llvm-stress after r350835. adds e38897a6d06 [DAGCombiner] simplify code; NFC adds b56fdf02a5e [Docs] add note to avoid 'errno' for better vectorization ( [...] adds 337d71157f6 [Docs] fix typo, adjust text order adds c54f433f459 [llvm-objdump][MachO] Correctly handle the llvm::Error when [...] adds 74733b9cac5 [llvm-objdump][MachO] Use the -dsym file name when reportin [...] adds d89383adbf9 [FileCheck] Don't propagate `FILECHECK_DUMP_INPUT_ON_FAILUR [...] adds b40f52c0291 [llvm-objdump][MachO] Fix error reporting after r350848 and [...] adds ba41586e368 [lit] Make it possible for the lit test suite to pass with [...] adds 11f8919bd36 [llvm-objdump][MachO] Fix test to work on Windows adds 47f150c32d3 [X86] Simplify the BRCOND handling for FCMP_UNE. adds 288df965703 [X86] Call SimplifyDemandedBits on conditions of X86ISD::SH [...] adds 33ad34648d9 Use MemorySSA in LICM to do sinking and hoisting. adds 922a9c9d66b [GVN] Update BlockRPONumber prior to use. adds ec5ab87c769 Avoid use-after-free in ~LegacyRTDyldObjectLinkingLayer adds 318c4f12ea9 [llvm-objcopy] [COFF] Add support for removing symbols adds 6c01c2ddf40 gn build: Merge r350893 adds 3c10eaa3db0 [MemorySSA] Disable checkClobberSanity for SkipSelfWalker. adds 7ed9683f7d0 [MachineCombiner][NFC] Prevent dereferencing past-the-end o [...] adds 5320efb380e gn build: Use "git rev-parse --git-dir" to discover the pat [...] adds 6abfdc627ef [llvm-objcopy] [COFF] Fix warnings abuilt missing field ini [...] adds 982b31b19dd [llvm-objcopy] [COFF] Fix a test matching pathnames for Win [...] adds 09b08520409 [WebAssembly] Add unimplemented-simd128 subtarget feature adds 127b21ae0f8 [MSP430] Add missing instruction forms adds 9f7039dc33b [MSP430] Minor fixes/improvements for assembler/disassembler adds f44add8257d gn build: Merge r350852 adds 8ee1e3f8cea gn build: Add a template for calling write_cmake_config.py adds d5697a92c2e [WebAssembly] Fix stack pointer store check in RegStackify adds 8bcc9b475c6 [llvm-objdump][MachO] Disable some invalid input tests adds b375b525011 [X86] Change vXi1 extract_vector_elt lowering to be legal i [...] adds 4ad7a7e37f9 Revert "[SelectionDAGBuilder] Refactor GetRegistersForValue [...] adds a16ce913f5d [llvm-symbolizer] Add -exe, -e as aliases to -obj adds fecfc2b3026 [llvm-objcopy] [COFF] Fix writing object files without symb [...] adds 8185e09ae22 [llvm-objcopy] [COFF] Implmement --strip-unneeded and -x/-- [...] adds b80a9e6dba7 [x86] allow insert/extract when matching horizontal ops adds 250f13c0363 [Jump Threading] Unfold a select insn that feeds a switch v [...] adds d559263f4a6 [MergeFunc] Use Instruction::getFunction as a cleanup, NFC adds d8a0f8ec36f [MergeFunc] Erase unused duplicate functions if they are di [...] adds 4bc09513497 [llvm-objcopy][NFC] Consistenly use two dashes for flags in tests. adds e39377580b4 [LTO] Record whether LTOUnit splitting is enabled in index adds fbc74ee51cb [Legalizer] Use correct ValueType of SELECT_CC node during [...] adds 7cfbd6d75fe [AArch64] Create feature set for Exynos M4 adds 3436463bf70 [CMake] Export utility targets to the build/install tree de [...] adds ab243d78379 [AArch64] Add pipeline model for Exynos M4 adds ea63b792484 [llvm-mca] Update tests for Exynos (NFC) adds 1f8f4875dff [RISCV][NFC] Add CHECK lines for atomic operations on RV64I adds fc9155493f8 gn build: s/root_out_dir/root_build_dir/g in llvm/utils/gn/ [...] adds cae2d736b31 gn build: Create a variable for the host toolchain and star [...] adds 707fa0e7c6f [X86] Fix incomplete handling of register-assigned variable [...] adds afe472d270f [SLP]Update test checks for the SPL vectorizer, NFC. adds d5cc99d571f [SLP]Moved NVPTX test under NVPTX directory, NFC. adds 01f4bc2efa8 [ConstantFolding] Fold undef for integer intrinsics adds 83f886b8d15 gn build: Merge r350958. adds 82647e1dc56 [AArch64] Improve Exynos predicates adds ed4b90300db gn build: Create a template for unix toolchains. adds 06a887ac8a6 gn build: Add a stage2 toolchain for Android. adds 1f17850eae2 [X86] Add ISD nodes for masked truncate so we can properly [...] adds 2162d5fc62d [ARM] Fix typo adds 550155b0874 [X86] Change some patterns that select MOVZX16rm8 to instea [...] adds 4967aab1dc2 [X86] When lowering v1i1/v2i1/v4i1/v8i1 load/store with avx [...] adds 3b1d40d0cd9 [X86] Remove unnecessary code from getMaskNode. adds 8cc42ba97bf [RISCV] Add patterns for RV64I SLLW/SRLW/SRAW instructions adds 1efb7b6d364 [RISCV] Introduce codegen patterns for RV64M-only instructions adds 79827733a7f [X86] Add ISD node for masked version of CVTPS2PH. adds 867645e09fb [X86] Remove X86ISD::SELECT as its no longer used by any of [...] adds eaa6e93a3a6 [llvm-objcopy] [COFF] Remove pointless Reader/Writer base c [...] adds 14b956f5300 Reapply "[DemandedBits] Use SetVector for Worklist" adds 927c2b02731 [X86][AARCH64] Improve ISD::ABS support adds f456055a363 [X86] Improve vXi64 ISD::ABS codegen with SSE41+ adds 06ac862fa69 [ORC][MIPS] Setup t9 register and call function through thi [...] adds c3e5232f2b8 [ORC][MIPS] Fill delay-slot after `jr` instruction adds efb513f5bd0 [X86] Add more usub.sat vector tests; NFC adds 516944648c0 gn build: Unbreak Windows build adds 019755c53ef Use getShiftAmountTy for shift amounts. adds 04fde6bab35 [llvm-objdump] - Change the output for --all-headers. adds e252cc3f671 [DAGCombiner] fold insert_subvector of insert_subvector adds 2a9e5ad32e9 [Algorithm] Add make_const_ref corresponding to make_const_ptr adds d4e1d2f7746 [LoopVectorizer] give more advice in remark about failure t [...] adds f9c8d4957b4 [X86] More aggressive shuffle mask widening in combineExtra [...] adds 114f0172187 Give helper classes/functions local linkage. NFC. adds 47100f5f523 [X86] Add X86ISD::VMFPROUND to handle the masked case of VC [...] adds 27d15ecc2b8 [X86] Add more ISD nodes to handle masked versions of VCVT( [...] adds 28a460d130f Remove TypeBuilder.h, and fix the few locations using it. adds b1e7adfcfe4 [X86] Rename overly verbose method; NFC adds f7f753b17fd [LegalizeDAG] Remove 'NeedInvert' code from expansion of BR [...] adds b66a27453d8 [X86] Add some basic add/sub saturation combine tests. adds 75e47eac7cb [DAGCombiner] Some very basic add/sub saturation combines. adds 5fba77096ae Fix unused variable warning. NFCI. adds e78bbef5dbb [DAGCombiner] If add_sat(x,y) can't overflow -> add(x,y) adds bdfe15d215b [X86] Remove mask parameter from vpshufbitqmb intrinsics. C [...] adds 9f2dba2774b [X86] Remove FPCLASS intrinsic handler. Use INTR_TYPE_2OP i [...] adds 05cbc0bf591 [X86] Remove unused intrinsic handlers. NFC adds a7d724bd4f1 [X86] Update type profile for DBPSADBW to indicate the imme [...] adds 0c294019923 [X86] Add new test file that was supposed to go with r351028. adds eebe489c8e5 [X86] Remove mask parameter from avx512 pmultishiftqb intri [...] adds eea49edd70d Add support for prefix-only CLI options adds fe0523d1bd7 Detect incorrect FileCheck variable CLI definition adds bd6bff77d7b Fix defines.txt adds 7fd3419390d [llvm-symbolizer] Add -addresses, -a as aliases for -print-address adds 987465b35bd [BasicBlockUtils] Generalize DeleteDeadBlock to deal with m [...] adds ed000e33aae [MIPS GlobalISel] Add pre legalizer combiner pass adds 08223c34d49 Replace "no-frame-pointer-*" function attributes with "fram [...] adds a490b3ede88 [VFS] Allow multiple RealFileSystem instances with independ [...] adds 1da08e25141 [AMDGPU] Add support for TFE/LWE in image intrinsics. 2nd try adds 09be36deab8 [SelectionDAG] Add type sanity assertions for add/sub satur [...] adds 40b75b2f129 [ARM GlobalISel] Import MOVi32imm into GlobalISel adds fc46ecd5d4c [DAGCombiner] Add add saturation constant folding tests. adds 8f2514f1161 [DebugInfo] Remove un-necessary logic from HoistThenElseCodeToIf adds 1ced556ec10 [mips] Optimize shifts for types larger than GPR size (mips [...] adds 1041c737ca2 [DAGCombiner] Enable add saturation constant folding adds 38ab6cd3809 gn build: Add gn.py wrapper script that adds --dotfile= and [...] adds 7a1a8bd9cec [X86] Add add/sub saturation undef tests. adds c0c74af4933 [DAGCombiner] add saturation instructions are commutative adds a4d2283f74b [MIPS GlobalISel] Fix release build make-check after r351046 adds 4b96a01615e [VFS] Fix unused variable warning. NFC adds cfe0eb0ee46 [DAGCombiner] Add add/sub saturation undef handling adds dd81d192fac [X86] Add sub saturation constant folding and self tests. adds 70291ab191c [DAGCombiner] Enable sub saturation constant folding adds e84a99a487d [DAGCombiner] Add (sub_sat x, x) -> 0 combine adds 7cae0753be3 Reland "Refactor GetRegistersForValue. NFCI." adds 4f613a607d8 Remove NameLen argument from newly-introduced IR C APIs. adds 4b3832cfb3c Reapply r345008 "Split MachinePipeliner code into header an [...] adds 3686b46357e [X86] Add PR40306 shuffle test case adds 450250e0165 [VFS] Disable unix-assuming VFS test on windows adds b197c2dd6c1 [WebAssembly] Add a release notes blurb adds 7bc85db61e9 [WebAssembly] Remove old intrinsics adds 57f0c2cd44e gn build: svn propset svn:executable on utils/gn/gn.py adds 332a2699bc7 [WebAssembly] Remove tests for old intrinsics. adds cbad289a736 cmake: Don't install plugins used for examples or tests adds cfdd779221c gn build: Fix path to gn.py in docs adds 05aa561e3f8 gn build: Unbreak mac build after r350977 adds f1309ffebf7 Revert "[VFS] Allow multiple RealFileSystem instances with [...] adds ad1cf6ea639 Merge branch 'arcpatch-D55094' adds c0b52ffd9cc [x86] lower extracted add/sub to horizontal vector math adds fe1b0979143 [MC][X86] Add test case for invalid use of "(%dx)" operand. adds 89cc3836e56 Revert "Merge branch 'arcpatch-D55094'" adds f718430ce40 [llvm-objcopy] [COFF] Test absolute symbols wrt --strip-unn [...] adds 7c395d1b358 [llvm-objcopy] [COFF] Remove unreferenced undefined externa [...] adds fcee5558c4d Ignore PhiNodes when mapping sample profile data adds e7868c9338a [X86][SSSE3] Bailout of lowerVectorShuffleAsPermuteAndUnpac [...] adds a36820100b9 [llvm][IRBuilder] Introspection for CreateAlignmentAssumpti [...] adds 004aa6132b1 expand DIContext interface a bit adds 532f8f48633 [X86] Silence a -Wparentheses warning on gcc. NFC adds 4b787d74829 [lit] llvm-lit.in: specify file encoding to UTF-8 adds 8c1bb502a7e [SanitizerCoverage][NFC] Use appendToUsed instead of include adds 19263d1daaa [llvm-ar] Flatten thin archives. adds f806f42158f [opaque pointer types] Update CallInst creation APIs to con [...] adds 7a5d86473a5 [opaque pointer types] Update InvokeInst creation APIs to c [...] adds 4ed9d9e7977 [opaque pointer types] Update LoadInst creation APIs to con [...] adds 14bebff7f26 [opaque pointer types] Update GetElementPtr creation APIs t [...] adds ec124e9d4d5 [CodeGen][X86] Expand USUBSAT to UMAX+SUB, also for vectors adds 6ff26040c3c [llvm-ar] Temporarily remove failing test which is breaking [...] adds caa05ae5fad [WebAssembly][FastISel] Do not assume naive CmpInst lowering adds d2d60da2b76 [Object] Return a symbol_iterator, rather than a basic_symb [...] adds f0a0953bb6e Revert "[CodeGen][X86] Expand USUBSAT to UMAX+SUB, also for [...] adds 8986b31304a Update GettingStarted guide to recommend that people use th [...] adds ea7303ed5d0 [X86] Fix unused variable warning in Release builds. NFC. adds 0ac160f4a63 [ORC] Move ORC Core symbol map and set types into their own [...] adds 3afec904927 [AArch64] Add new target feature to fuse arithmetic and log [...] adds b11690da65a [AArch64] Explicitly use v1i64 type for llvm.aarch64.neon.a [...] adds 5383975a2f7 [EarlyIfConversion] Don't if-convert unconditional branches. adds 0cbb0f1189f [AArch64] Fix typo (NFC) adds 95389c78608 [AArch64] Fix typo (NFC) adds df7e0218205 [X86] Avoid clobbering ESP/RSP in the epilogue. adds 548b0e2a26d [AArch64] Adjust the feature set for Exynos adds 68fa6767b40 AMDGPU: Add a fast path for icmp.i1(src, false, NE) adds 9fbbcd04411 [WebAssembly] Expand SIMD shifts while V8's implementation [...] adds 8f15bc80180 gn build: Stop defining LLVM_ON_UNIX globally. adds ba365cef647 gn build: Split no-RTTI flag into a config. adds 5aae26ab876 Revert alignment assumptions changes adds bc7bfd2d4df [X86] Switch the triple on avx2-intrinsics-x86.ll to be -un [...] adds 4093359788b [X86] Add test cases for D56695. NFC adds 43abb774454 [WebAssembly] Support multilibs for wasm32 and add a wasm O [...] adds 8ef46a90f0f [X86] Upgrade some avx512bw shift intrinsics that were remo [...] adds 98e46e129e2 gn build: Switch to using current_os in lib/Support/BUILD.gn. adds 5f4130f544a gn build: Make a couple of improvements to the unix toolchain. adds 42c9ee8c247 gn build: Rename llvm_host_triple to llvm_current_triple an [...] adds 45d116d45ea [llvm-objdump] - Cleanup the code. NFCI. adds 72ae258de0c [llvm-objcopy] [COFF] Remove pointless comment chars from . [...] adds 33c1aca75eb [llvm-objcopy] [COFF] Implement --strip-all[-gnu] for symbols adds 809a10dd781 [llvm][IRBuilder] Introspection for CreateAlignmentAssumpti [...] adds 4e1d3007baf [NFC] Move some functions to LoopUtils adds bd978f06f98 [NFC] Decrease if nest adds a7778a1670e [NFC][X86] extract-bits.ll: add test with truncation with e [...] adds 0dc857a515a [NFC] Remove obsolete enum RangeCheckKind adds 0a0a77690bc [NFC] Remove some code duplication adds 4d62074ac28 [InstCombine] Don't undo 0 - (X * Y) canonicalization when [...] adds daf8332471c [llvm-obdump] - Fix the help lines for -stop-address and -z. adds d9f143b610c [SimpleLoopUnswitch] Increment stats counter for unswitchin [...] adds e7521d52c41 Update year in license files adds c32dca79164 Revert r351138 "[ORC] Move ORC Core symbol map and set type [...] adds f764968e177 [DAGCombiner] reduce buildvec of zexted extracted element t [...] adds 5f930f43b56 [SLP][X86] Split prefer-256-bit 'AVX256BW' tests from AVX2 checks adds 46d00b498a7 Remove irrelevant references to legacy git repositories fro [...] adds 9222a7e41a9 [X86] Add PR40318 shuffle test case adds a9ba146cfa7 gn build: Don't assume valgrind.h exists on Linux adds b8f7485f871 [X86] Bailout of lowerVectorShuffleAsPermuteAndUnpack for s [...] adds 416cb77e36e [llvm-objcopy] Use SHT_NOTE for added note sections. adds e55d66cf170 [llvm-readelf] Allow single-letter flags to be merged. adds 4e878ddc59d [X86] Fix register class for assembly constraints to ST(7). NFCI. adds a42cde68412 [SelectionDAG] Check membership of register in class for si [...] adds f991503715e We can improve the performance (generally) by memo-izing th [...] adds 2ff9c4575f2 [WebAssembly] Update release notes adds bb3d0e960a9 [WebAssembly] Fix updating/moving DBG_VALUEs in RegStackify adds b96b37dc8fb Reapply "[CodeGen][X86] Expand USUBSAT to UMAX+SUB, also fo [...] adds 173e19582ac [Nios2] Remove Nios2 backend adds 73cc65ab14c [MSP430] Recognize '{' as a line separator adds a15cc59ad79 [X86] Add versions of the avx512 gather intrinsics that tak [...] adds e9414c26cee llvm-objdump -m -D should disassemble all text segments adds d33fbc19a2c [SLP] Added test for PR40310, NFC. adds c7e0e274239 gn build: Merge r351216, r351228. adds c844b463763 gn build: Add build files for compiler-rt/lib/{hwasan,inter [...] adds b2800c91d94 [SanitizerCoverage] Don't create comdat for interposable fu [...] adds c61ff3fc409 gn build: Move target flags from toolchain to a .gni file. adds 00f59269287 treat invoke like call adds 3e0a21b5bc3 X86DAGToDAGISel::matchBitExtract() with truncation (PR36419) adds 66ebbb91232 [X86] Add the GCCBuiltin name back to the deprecated avx512 [...] adds 1f44ac99dd0 gn build: Add a resource_dir.gni file. adds 913cfad4167 [llvm-ar] Resubmit recursive thin archive test with fix for [...] adds 1d3503ac84c gn build: Add a stage2 host toolchain and make the hwasan r [...] adds 2e3d9f75740 [libObject] Tweak expected error output from llvm-ar adds 568131197e0 [VFS] Move RedirectingFileSystem interface into header (NFC) adds bf3266d130c [VFS] Add getter for mapping entries. adds 844041aadf0 AMDGPU: Raise the priority of MAD24 in instruction selection. adds 0e3399be408 [X86] Add avx512 scatter intrinsics that use a vXi1 mask in [...] adds fa2027e6fbd gn build: Add check-hwasan target. adds ddeda4ea73d [X86] Rename SHRUNKBLEND ISD node to BLENDV. adds 1b044afcdb8 [LangRef] Fix typo adress->address. NFC adds bbf3052e90f [EH] Rename llvm.x86.seh.recoverfp intrinsic to llvm.eh.recoverfp adds 66f2370bc22 [GISel]: Add support for CSEing continuously during GISel passes. adds 29aeb335004 [WebAssembly] Store section alignment as a power of 2 adds b456d6fdcf0 gn build: Merge r351283. adds e877ff61451 [InstCombine]Avoid introduction of unaligned mem access adds 356397dc912 Only promote args when function attributes are compatible adds 153844c6c6b [WebAssembly] COWS has been renamed to WASI. adds 2eebdab8bdc [llvm-symbolizer] Add -C as a short alias to -demangle adds b13b025f15a [llvm-rc] Support '--' for delimiting options from input paths adds ad21d2d0af0 Include lldb in Win snapshots again (PR37307) adds b95047e9902 [DAGCombine] Fix ReduceLoadWidth for shifted offsets adds 6dbe225afee [NewPM][TSan] Reiterate the TSan port adds b8c855b48d4 [Support] Remove error return value from one overload of fs [...] adds 82a2c96ee81 [SelectionDAG] Update check in createOperands to reflect ma [...] new 85d638808ba Creating branches/google/stable and tags/google/stable/2019 [...]

The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: .gitignore | 2 + CMakeLists.txt | 2 +- CODE_OWNERS.TXT | 2 +- LICENSE.TXT | 2 +- RELEASE_TESTERS.TXT | 4 +- bindings/go/llvm/InstrumentationBindings.cpp | 8 +- bindings/go/llvm/InstrumentationBindings.h | 2 +- bindings/go/llvm/transforms_instrumentation.go | 4 +- bindings/python/llvm/core.py | 24 +- bindings/python/llvm/tests/base.py | 5 + bindings/python/llvm/tests/test_bitreader.py | 6 +- bindings/python/llvm/tests/test_core.py | 4 +- bindings/python/llvm/tests/test_disassembler.py | 6 +- bindings/python/llvm/tests/test_object.py | 16 +- cmake/modules/AddLLVM.cmake | 80 +- cmake/modules/TableGen.cmake | 26 +- docs/AMDGPU/AMDGPUAsmGFX7.rst | 1411 +++ docs/AMDGPU/AMDGPUAsmGFX8.rst | 1846 ++++ docs/AMDGPU/AMDGPUAsmGFX9.rst | 2102 +++++ docs/AMDGPU/gfx7_addr_buf.rst | 24 + docs/AMDGPU/gfx7_addr_ds.rst | 17 + docs/AMDGPU/gfx7_addr_flat.rst | 17 + docs/AMDGPU/gfx7_addr_mimg.rst | 21 + docs/AMDGPU/gfx7_attr.rst | 30 + docs/AMDGPU/gfx7_base_smem_addr.rst | 17 + docs/AMDGPU/gfx7_base_smem_buf.rst | 17 + docs/AMDGPU/gfx7_bimm16.rst | 14 + docs/AMDGPU/gfx7_bimm32.rst | 14 + docs/AMDGPU/gfx7_data_buf_atomic128.rst | 21 + docs/AMDGPU/gfx7_data_buf_atomic32.rst | 21 + docs/AMDGPU/gfx7_data_buf_atomic64.rst | 21 + docs/AMDGPU/gfx7_data_mimg_atomic_cmp.rst | 27 + docs/AMDGPU/gfx7_data_mimg_atomic_reg.rst | 26 + docs/AMDGPU/gfx7_data_mimg_store.rst | 18 + docs/AMDGPU/gfx7_dst_buf_128.rst | 17 + docs/AMDGPU/gfx7_dst_buf_64.rst | 17 + docs/AMDGPU/gfx7_dst_buf_96.rst | 17 + docs/AMDGPU/gfx7_dst_buf_lds.rst | 21 + docs/AMDGPU/gfx7_dst_flat_atomic32.rst | 19 + docs/AMDGPU/gfx7_dst_flat_atomic64.rst | 19 + docs/AMDGPU/gfx7_dst_mimg_gather4.rst | 17 + docs/AMDGPU/gfx7_dst_mimg_regular.rst | 20 + docs/AMDGPU/gfx7_fimm32.rst | 14 + docs/AMDGPU/gfx7_hwreg.rst | 60 + docs/AMDGPU/gfx7_label.rst | 30 + docs/AMDGPU/gfx7_mod.rst | 14 + docs/AMDGPU/gfx7_msg.rst | 72 + docs/AMDGPU/gfx7_offset_buf.rst | 17 + docs/AMDGPU/gfx7_offset_smem.rst | 21 + docs/AMDGPU/gfx7_opt.rst | 14 + docs/AMDGPU/gfx7_param.rst | 22 + docs/AMDGPU/gfx7_ret.rst | 14 + docs/AMDGPU/gfx7_rsrc_buf.rst | 17 + docs/AMDGPU/gfx7_rsrc_mimg.rst | 17 + docs/AMDGPU/gfx7_samp_mimg.rst | 17 + docs/AMDGPU/gfx7_sdst128_0.rst | 17 + docs/AMDGPU/gfx7_sdst256_0.rst | 17 + docs/AMDGPU/gfx7_sdst32_0.rst | 17 + docs/AMDGPU/gfx7_sdst32_1.rst | 17 + docs/AMDGPU/gfx7_sdst32_2.rst | 17 + docs/AMDGPU/gfx7_sdst512_0.rst | 17 + docs/AMDGPU/gfx7_sdst64_0.rst | 17 + docs/AMDGPU/gfx7_sdst64_1.rst | 17 + docs/AMDGPU/gfx7_simm16.rst | 14 + docs/AMDGPU/gfx7_src32_0.rst | 17 + docs/AMDGPU/gfx7_src32_1.rst | 17 + docs/AMDGPU/gfx7_src32_2.rst | 17 + docs/AMDGPU/gfx7_src32_3.rst | 17 + docs/AMDGPU/gfx7_src64_0.rst | 17 + docs/AMDGPU/gfx7_src64_1.rst | 17 + docs/AMDGPU/gfx7_src64_2.rst | 17 + docs/AMDGPU/gfx7_src_exp.rst | 28 + docs/AMDGPU/gfx7_ssrc32_0.rst | 17 + docs/AMDGPU/gfx7_ssrc32_1.rst | 17 + docs/AMDGPU/gfx7_ssrc32_2.rst | 17 + docs/AMDGPU/gfx7_ssrc32_3.rst | 17 + docs/AMDGPU/gfx7_ssrc32_4.rst | 17 + docs/AMDGPU/gfx7_ssrc64_0.rst | 17 + docs/AMDGPU/gfx7_ssrc64_1.rst | 17 + docs/AMDGPU/gfx7_ssrc64_2.rst | 17 + docs/AMDGPU/gfx7_ssrc64_3.rst | 17 + docs/AMDGPU/gfx7_tgt.rst | 24 + docs/AMDGPU/gfx7_type_dev.rst | 14 + docs/AMDGPU/gfx7_uimm16.rst | 14 + docs/AMDGPU/gfx7_vcc_64.rst | 17 + docs/AMDGPU/gfx7_vdata128_0.rst | 17 + docs/AMDGPU/gfx7_vdata32_0.rst | 17 + docs/AMDGPU/gfx7_vdata64_0.rst | 17 + docs/AMDGPU/gfx7_vdata96_0.rst | 17 + docs/AMDGPU/gfx7_vdst128_0.rst | 17 + docs/AMDGPU/gfx7_vdst32_0.rst | 17 + docs/AMDGPU/gfx7_vdst64_0.rst | 17 + docs/AMDGPU/gfx7_vdst96_0.rst | 17 + docs/AMDGPU/gfx7_vsrc128_0.rst | 17 + docs/AMDGPU/gfx7_vsrc32_0.rst | 17 + docs/AMDGPU/gfx7_vsrc64_0.rst | 17 + docs/AMDGPU/gfx7_waitcnt.rst | 55 + docs/AMDGPU/gfx8_addr_buf.rst | 22 + docs/AMDGPU/gfx8_addr_ds.rst | 17 + docs/AMDGPU/gfx8_addr_flat.rst | 17 + docs/AMDGPU/gfx8_addr_mimg.rst | 21 + docs/AMDGPU/gfx8_attr.rst | 30 + docs/AMDGPU/gfx8_base_smem_addr.rst | 17 + docs/AMDGPU/gfx8_base_smem_buf.rst | 17 + docs/AMDGPU/gfx8_bimm16.rst | 14 + docs/AMDGPU/gfx8_bimm32.rst | 14 + docs/AMDGPU/gfx8_data_buf_atomic128.rst | 21 + docs/AMDGPU/gfx8_data_buf_atomic32.rst | 21 + docs/AMDGPU/gfx8_data_buf_atomic64.rst | 21 + docs/AMDGPU/gfx8_data_buf_d16_128.rst | 20 + docs/AMDGPU/gfx8_data_buf_d16_32.rst | 17 + docs/AMDGPU/gfx8_data_buf_d16_64.rst | 20 + docs/AMDGPU/gfx8_data_buf_d16_96.rst | 20 + docs/AMDGPU/gfx8_data_mimg_atomic_cmp.rst | 27 + docs/AMDGPU/gfx8_data_mimg_atomic_reg.rst | 26 + docs/AMDGPU/gfx8_data_mimg_store.rst | 18 + docs/AMDGPU/gfx8_data_mimg_store_d16.rst | 24 + docs/AMDGPU/gfx8_dst_buf_128.rst | 17 + docs/AMDGPU/gfx8_dst_buf_64.rst | 17 + docs/AMDGPU/gfx8_dst_buf_96.rst | 17 + docs/AMDGPU/gfx8_dst_buf_d16_128.rst | 21 + docs/AMDGPU/gfx8_dst_buf_d16_32.rst | 17 + docs/AMDGPU/gfx8_dst_buf_d16_64.rst | 21 + docs/AMDGPU/gfx8_dst_buf_d16_96.rst | 21 + docs/AMDGPU/gfx8_dst_buf_lds.rst | 21 + docs/AMDGPU/gfx8_dst_flat_atomic32.rst | 19 + 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lib/IR/AsmWriter.cpp | 15 +- lib/IR/AutoUpgrade.cpp | 472 +- lib/IR/BasicBlock.cpp | 6 +- lib/IR/ConstantFold.cpp | 9 +- lib/IR/Constants.cpp | 5 +- lib/IR/Core.cpp | 155 +- lib/IR/DIBuilder.cpp | 4 +- lib/IR/DataLayout.cpp | 8 + lib/IR/DebugInfo.cpp | 5 +- lib/IR/DebugInfoMetadata.cpp | 43 + lib/IR/DiagnosticInfo.cpp | 8 + lib/IR/Function.cpp | 17 +- lib/IR/Instruction.cpp | 8 + lib/IR/Instructions.cpp | 131 +- lib/IR/LLVMContext.cpp | 1 + lib/IR/Module.cpp | 22 +- lib/IR/SafepointIRVerifier.cpp | 2 +- lib/IR/Value.cpp | 26 +- lib/IR/Verifier.cpp | 570 +- lib/LLVMBuild.txt | 1 + lib/LTO/LTO.cpp | 15 +- lib/LTO/SummaryBasedOptimizations.cpp | 14 +- lib/MC/MCAsmInfoCOFF.cpp | 2 +- lib/MC/MCAsmStreamer.cpp | 27 +- lib/MC/MCCodeView.cpp | 4 +- lib/MC/MCDwarf.cpp | 33 +- lib/MC/MCObjectFileInfo.cpp | 2 +- lib/MC/MCObjectStreamer.cpp | 6 +- lib/MC/MCParser/AsmParser.cpp | 12 +- lib/MC/MCParser/DarwinAsmParser.cpp | 5 +- lib/MC/MCStreamer.cpp | 36 +- lib/MC/MCWin64EH.cpp | 8 +- lib/MC/WasmObjectWriter.cpp | 4 +- lib/MCA/CMakeLists.txt | 23 + lib/MCA/Context.cpp | 65 + lib/MCA/HWEventListener.cpp | 23 + lib/MCA/HardwareUnits/HardwareUnit.cpp | 25 + lib/MCA/HardwareUnits/LSUnit.cpp | 190 + lib/MCA/HardwareUnits/RegisterFile.cpp | 491 + lib/MCA/HardwareUnits/ResourceManager.cpp | 331 + lib/MCA/HardwareUnits/RetireControlUnit.cpp | 88 + lib/MCA/HardwareUnits/Scheduler.cpp | 247 + lib/MCA/InstrBuilder.cpp | 698 ++ lib/MCA/Instruction.cpp | 205 + {tools/llvm-mca/lib => lib/MCA}/LLVMBuild.txt | 0 lib/MCA/Pipeline.cpp | 97 + lib/MCA/Stages/DispatchStage.cpp | 193 + lib/MCA/Stages/EntryStage.cpp | 76 + lib/MCA/Stages/ExecuteStage.cpp | 225 + lib/MCA/Stages/InstructionTables.cpp | 69 + lib/MCA/Stages/RetireStage.cpp | 62 + lib/MCA/Stages/Stage.cpp | 29 + lib/MCA/Support.cpp | 94 + lib/Object/ArchiveWriter.cpp | 24 +- lib/Object/Binary.cpp | 3 +- lib/Object/COFFObjectFile.cpp | 22 + lib/Object/Error.cpp | 1 + lib/Object/MachOObjectFile.cpp | 2 +- lib/Object/WasmObjectFile.cpp | 76 +- lib/ObjectYAML/COFFYAML.cpp | 3 +- lib/ObjectYAML/ELFYAML.cpp | 1 + lib/ObjectYAML/WasmYAML.cpp | 8 +- lib/Passes/PassBuilder.cpp | 100 + lib/Passes/PassRegistry.def | 14 +- lib/Passes/StandardInstrumentations.cpp | 246 +- lib/ProfileData/InstrProf.cpp | 11 +- lib/Support/CommandLine.cpp | 19 +- lib/Support/Error.cpp | 1 + lib/Support/FileCheck.cpp | 159 +- lib/Support/FormatVariadic.cpp | 2 + lib/Support/Path.cpp | 33 +- lib/Support/Signals.cpp | 14 +- lib/Support/Triple.cpp | 13 +- lib/Support/Unix/Path.inc | 2 +- lib/Support/VirtualFileSystem.cpp | 510 +- lib/Support/Windows/Threading.inc | 2 +- lib/Support/raw_ostream.cpp | 2 + lib/TableGen/Main.cpp | 32 +- lib/Target/AArch64/AArch64.h | 2 + lib/Target/AArch64/AArch64.td | 45 +- lib/Target/AArch64/AArch64AsmPrinter.cpp | 13 + lib/Target/AArch64/AArch64FastISel.cpp | 18 +- lib/Target/AArch64/AArch64FrameLowering.cpp | 19 +- lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 9 +- lib/Target/AArch64/AArch64ISelLowering.cpp | 91 +- lib/Target/AArch64/AArch64InstrInfo.cpp | 15 +- lib/Target/AArch64/AArch64InstrInfo.td | 22 +- lib/Target/AArch64/AArch64InstructionSelector.cpp | 83 +- lib/Target/AArch64/AArch64LegalizerInfo.cpp | 28 +- lib/Target/AArch64/AArch64MCInstLower.cpp | 37 +- lib/Target/AArch64/AArch64MacroFusion.cpp | 104 +- lib/Target/AArch64/AArch64PreLegalizerCombiner.cpp | 2 +- lib/Target/AArch64/AArch64RegisterBankInfo.cpp | 1 + lib/Target/AArch64/AArch64RegisterInfo.cpp | 4 + lib/Target/AArch64/AArch64SchedExynosM1.td | 15 +- lib/Target/AArch64/AArch64SchedExynosM3.td | 116 +- lib/Target/AArch64/AArch64SchedExynosM4.td | 1004 +++ lib/Target/AArch64/AArch64SchedPredExynos.td | 116 +- lib/Target/AArch64/AArch64SchedPredicates.td | 121 +- lib/Target/AArch64/AArch64SpeculationHardening.cpp | 641 ++ lib/Target/AArch64/AArch64Subtarget.h | 17 +- lib/Target/AArch64/AArch64SystemOperands.td | 2 +- lib/Target/AArch64/AArch64TargetMachine.cpp | 17 + lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp | 83 +- lib/Target/AArch64/CMakeLists.txt | 1 + .../AArch64/MCTargetDesc/AArch64AsmBackend.cpp | 99 +- .../AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp | 3 + lib/Target/AArch64/Utils/AArch64BaseInfo.h | 4 + lib/Target/AMDGPU/AMDGPU.h | 4 + lib/Target/AMDGPU/AMDGPU.td | 22 +- lib/Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp | 10 +- lib/Target/AMDGPU/AMDGPUGenRegisterBankInfo.def | 78 +- lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 10 +- lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 103 +- lib/Target/AMDGPU/AMDGPUInstructions.td | 2 + lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 105 +- lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 192 +- lib/Target/AMDGPU/AMDGPURegisterBankInfo.h | 2 + lib/Target/AMDGPU/AMDGPURegisterBanks.td | 5 +- lib/Target/AMDGPU/AMDGPURewriteOutArguments.cpp | 6 +- lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 7 + lib/Target/AMDGPU/AMDGPUSubtarget.h | 17 + lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 1 + lib/Target/AMDGPU/AMDGPUTargetObjectFile.cpp | 2 +- lib/Target/AMDGPU/CMakeLists.txt | 1 + .../AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp | 6 +- lib/Target/AMDGPU/MIMGInstructions.td | 10 +- lib/Target/AMDGPU/SIAddIMGInit.cpp | 181 + lib/Target/AMDGPU/SIAnnotateControlFlow.cpp | 2 +- lib/Target/AMDGPU/SIFoldOperands.cpp | 10 +- lib/Target/AMDGPU/SIISelLowering.cpp | 362 +- lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 3 + lib/Target/AMDGPU/SIInstrInfo.cpp | 36 + lib/Target/AMDGPU/SIInstructions.td | 7 + lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 19 +- lib/Target/AMDGPU/SIRegisterInfo.td | 6 +- lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 1 + lib/Target/AMDGPU/VOP3PInstructions.td | 8 +- lib/Target/ARM/ARM.td | 10 +- lib/Target/ARM/ARMFastISel.cpp | 3 +- lib/Target/ARM/ARMFrameLowering.cpp | 5 +- lib/Target/ARM/ARMFrameLowering.h | 2 +- lib/Target/ARM/ARMISelLowering.cpp | 96 +- lib/Target/ARM/ARMISelLowering.h | 2 + lib/Target/ARM/ARMInstrInfo.td | 118 +- lib/Target/ARM/ARMInstrThumb2.td | 61 +- lib/Target/ARM/ARMLegalizerInfo.cpp | 8 +- lib/Target/ARM/ARMSubtarget.h | 4 +- lib/Target/ARM/Thumb2SizeReduction.cpp | 32 +- lib/Target/BPF/BPFAsmPrinter.cpp | 14 + lib/Target/BPF/BTF.def | 33 + lib/Target/BPF/BTF.h | 209 + lib/Target/BPF/BTFDebug.cpp | 759 ++ lib/Target/BPF/BTFDebug.h | 285 + lib/Target/BPF/CMakeLists.txt | 1 + lib/Target/BPF/MCTargetDesc/BPFELFObjectWriter.cpp | 18 + lib/Target/Hexagon/HexagonISelLowering.cpp | 18 +- lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp | 3 +- lib/Target/Hexagon/HexagonPatterns.td | 100 +- lib/Target/LLVMBuild.txt | 1 - lib/Target/Lanai/LanaiISelLowering.cpp | 4 +- lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp | 6 +- .../MSP430/Disassembler/MSP430Disassembler.cpp | 12 + lib/Target/MSP430/MCTargetDesc/MSP430MCAsmInfo.cpp | 1 + .../MSP430/MCTargetDesc/MSP430MCCodeEmitter.cpp | 2 +- lib/Target/MSP430/MSP430ISelLowering.cpp | 27 +- lib/Target/MSP430/MSP430InstrInfo.td | 124 +- lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 19 +- lib/Target/Mips/CMakeLists.txt | 1 + .../Mips/MCTargetDesc/MipsELFObjectWriter.cpp | 9 +- .../Mips/MCTargetDesc/MipsTargetStreamer.cpp | 6 +- lib/Target/Mips/Mips.h | 2 + lib/Target/Mips/Mips16HardFloat.cpp | 14 +- lib/Target/Mips/Mips16ISelLowering.cpp | 23 +- lib/Target/Mips/MipsCondMov.td | 10 + lib/Target/Mips/MipsISelLowering.cpp | 88 + lib/Target/Mips/MipsISelLowering.h | 2 + lib/Target/Mips/MipsInstructionSelector.cpp | 36 + lib/Target/Mips/MipsLegalizerInfo.cpp | 57 +- lib/Target/Mips/MipsPreLegalizerCombiner.cpp | 92 + lib/Target/Mips/MipsRegisterBankInfo.cpp | 11 + lib/Target/Mips/MipsSEISelDAGToDAG.cpp | 18 + lib/Target/Mips/MipsTargetMachine.cpp | 6 + lib/Target/NVPTX/CMakeLists.txt | 1 + lib/Target/NVPTX/NVPTX.h | 1 + lib/Target/NVPTX/NVPTXAsmPrinter.cpp | 12 +- lib/Target/NVPTX/NVPTXISelLowering.cpp | 60 +- lib/Target/NVPTX/NVPTXISelLowering.h | 1 + lib/Target/NVPTX/NVPTXInstrInfo.td | 21 +- lib/Target/NVPTX/NVPTXProxyRegErasure.cpp | 122 + lib/Target/NVPTX/NVPTXTargetMachine.cpp | 8 + lib/Target/Nios2/CMakeLists.txt | 30 - lib/Target/Nios2/InstPrinter/CMakeLists.txt | 1 - lib/Target/Nios2/InstPrinter/LLVMBuild.txt | 23 - lib/Target/Nios2/InstPrinter/Nios2InstPrinter.cpp | 66 - lib/Target/Nios2/InstPrinter/Nios2InstPrinter.h | 49 - lib/Target/Nios2/LLVMBuild.txt | 66 - lib/Target/Nios2/MCTargetDesc/CMakeLists.txt | 9 - lib/Target/Nios2/MCTargetDesc/LLVMBuild.txt | 26 - lib/Target/Nios2/MCTargetDesc/Nios2AsmBackend.cpp | 130 - lib/Target/Nios2/MCTargetDesc/Nios2AsmBackend.h | 81 - lib/Target/Nios2/MCTargetDesc/Nios2BaseInfo.h | 38 - .../Nios2/MCTargetDesc/Nios2ELFObjectWriter.cpp | 43 - lib/Target/Nios2/MCTargetDesc/Nios2FixupKinds.h | 41 - lib/Target/Nios2/MCTargetDesc/Nios2MCAsmInfo.cpp | 44 - lib/Target/Nios2/MCTargetDesc/Nios2MCAsmInfo.h | 31 - lib/Target/Nios2/MCTargetDesc/Nios2MCExpr.cpp | 76 - lib/Target/Nios2/MCTargetDesc/Nios2MCExpr.h | 60 - .../Nios2/MCTargetDesc/Nios2MCTargetDesc.cpp | 102 - lib/Target/Nios2/MCTargetDesc/Nios2MCTargetDesc.h | 52 - .../Nios2/MCTargetDesc/Nios2TargetStreamer.cpp | 22 - lib/Target/Nios2/Nios2.h | 35 - lib/Target/Nios2/Nios2.td | 59 - lib/Target/Nios2/Nios2AsmPrinter.cpp | 153 - lib/Target/Nios2/Nios2CallingConv.td | 34 - lib/Target/Nios2/Nios2FrameLowering.cpp | 27 - lib/Target/Nios2/Nios2FrameLowering.h | 39 - lib/Target/Nios2/Nios2ISelDAGToDAG.cpp | 76 - lib/Target/Nios2/Nios2ISelLowering.cpp | 188 - lib/Target/Nios2/Nios2ISelLowering.h | 63 - lib/Target/Nios2/Nios2InstrFormats.td | 235 - lib/Target/Nios2/Nios2InstrInfo.cpp | 54 - lib/Target/Nios2/Nios2InstrInfo.h | 49 - lib/Target/Nios2/Nios2InstrInfo.td | 109 - lib/Target/Nios2/Nios2MCInstLower.cpp | 117 - lib/Target/Nios2/Nios2MachineFunction.cpp | 14 - lib/Target/Nios2/Nios2MachineFunction.h | 62 - lib/Target/Nios2/Nios2RegisterInfo.cpp | 55 - lib/Target/Nios2/Nios2RegisterInfo.h | 52 - lib/Target/Nios2/Nios2RegisterInfo.td | 60 - lib/Target/Nios2/Nios2Schedule.td | 39 - lib/Target/Nios2/Nios2Subtarget.cpp | 56 - lib/Target/Nios2/Nios2Subtarget.h | 97 - lib/Target/Nios2/Nios2TargetMachine.cpp | 111 - lib/Target/Nios2/Nios2TargetMachine.h | 45 - lib/Target/Nios2/Nios2TargetObjectFile.cpp | 18 - lib/Target/Nios2/Nios2TargetObjectFile.h | 26 - lib/Target/Nios2/Nios2TargetStreamer.h | 30 - lib/Target/Nios2/TargetInfo/CMakeLists.txt | 1 - lib/Target/Nios2/TargetInfo/LLVMBuild.txt | 23 - lib/Target/Nios2/TargetInfo/Nios2TargetInfo.cpp | 24 - lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 165 +- .../PowerPC/Disassembler/PPCDisassembler.cpp | 209 +- lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h | 60 + lib/Target/PowerPC/P9InstrResources.td | 2 +- lib/Target/PowerPC/PPCFastISel.cpp | 40 +- lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 322 +- lib/Target/PowerPC/PPCISelLowering.cpp | 610 +- lib/Target/PowerPC/PPCISelLowering.h | 23 + lib/Target/PowerPC/PPCInstr64Bit.td | 8 +- lib/Target/PowerPC/PPCInstrInfo.cpp | 61 +- lib/Target/PowerPC/PPCInstrInfo.h | 2 + lib/Target/PowerPC/PPCInstrVSX.td | 102 +- lib/Target/PowerPC/PPCPreEmitPeephole.cpp | 2 +- lib/Target/PowerPC/PPCRegisterInfo.cpp | 13 +- lib/Target/PowerPC/PPCScheduleP9.td | 6 + lib/Target/PowerPC/README.txt | 1 - lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 27 +- lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp | 39 + lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h | 7 +- lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp | 82 + lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h | 10 + lib/Target/RISCV/RISCVISelLowering.cpp | 67 + lib/Target/RISCV/RISCVInstrInfo.td | 55 +- lib/Target/RISCV/RISCVInstrInfoM.td | 31 + lib/Target/Sparc/SparcISelLowering.cpp | 4 +- lib/Target/SystemZ/SystemZISelDAGToDAG.cpp | 11 +- lib/Target/SystemZ/SystemZISelLowering.cpp | 77 +- lib/Target/SystemZ/SystemZISelLowering.h | 1 + lib/Target/SystemZ/SystemZInstrFormats.td | 23 +- lib/Target/SystemZ/SystemZInstrVector.td | 6 +- lib/Target/SystemZ/SystemZOperators.td | 42 +- lib/Target/TargetMachineC.cpp | 9 + .../WebAssembly/AsmParser/WebAssemblyAsmParser.cpp | 213 +- lib/Target/WebAssembly/CMakeLists.txt | 3 +- .../Disassembler/WebAssemblyDisassembler.cpp | 25 +- .../InstPrinter/WebAssemblyInstPrinter.cpp | 161 +- .../InstPrinter/WebAssemblyInstPrinter.h | 4 +- .../MCTargetDesc/WebAssemblyMCCodeEmitter.cpp | 8 - .../MCTargetDesc/WebAssemblyMCTargetDesc.h | 13 +- .../MCTargetDesc/WebAssemblyTargetStreamer.cpp | 14 +- lib/Target/WebAssembly/README.txt | 18 +- lib/Target/WebAssembly/WebAssembly.h | 4 +- lib/Target/WebAssembly/WebAssembly.td | 9 +- .../WebAssemblyAddMissingPrototypes.cpp | 2 +- .../WebAssembly/WebAssemblyCallIndirectFixup.cpp | 2 +- .../WebAssembly/WebAssemblyDebugValueManager.cpp | 46 + .../WebAssembly/WebAssemblyDebugValueManager.h | 38 + .../WebAssemblyEHRestoreStackPointer.cpp | 4 + .../WebAssembly/WebAssemblyExceptionInfo.cpp | 5 +- .../WebAssembly/WebAssemblyExplicitLocals.cpp | 63 +- lib/Target/WebAssembly/WebAssemblyFastISel.cpp | 19 +- .../WebAssembly/WebAssemblyFixFunctionBitcasts.cpp | 2 + .../WebAssemblyFixIrreducibleControlFlow.cpp | 442 +- .../WebAssembly/WebAssemblyFrameLowering.cpp | 4 +- lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp | 4 + lib/Target/WebAssembly/WebAssemblyISelLowering.cpp | 80 +- lib/Target/WebAssembly/WebAssemblyISelLowering.h | 1 + lib/Target/WebAssembly/WebAssemblyInstrAtomics.td | 76 +- lib/Target/WebAssembly/WebAssemblyInstrControl.td | 68 +- lib/Target/WebAssembly/WebAssemblyInstrConv.td | 90 +- lib/Target/WebAssembly/WebAssemblyInstrFormats.td | 4 +- lib/Target/WebAssembly/WebAssemblyInstrInfo.td | 49 +- lib/Target/WebAssembly/WebAssemblyInstrMemory.td | 35 +- lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 37 +- .../WebAssembly/WebAssemblyLateEHPrepare.cpp | 8 +- .../WebAssemblyLowerEmscriptenEHSjLj.cpp | 2 + .../WebAssembly/WebAssemblyLowerGlobalDtors.cpp | 2 + .../WebAssembly/WebAssemblyMemIntrinsicResults.cpp | 212 + .../WebAssembly/WebAssemblyOptimizeReturned.cpp | 4 + lib/Target/WebAssembly/WebAssemblyRegStackify.cpp | 115 +- lib/Target/WebAssembly/WebAssemblyStoreResults.cpp | 205 - lib/Target/WebAssembly/WebAssemblySubtarget.cpp | 7 +- lib/Target/WebAssembly/WebAssemblySubtarget.h | 20 +- .../WebAssembly/WebAssemblyTargetMachine.cpp | 27 +- lib/Target/X86/AsmParser/X86AsmParser.cpp | 393 +- lib/Target/X86/CMakeLists.txt | 2 +- lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp | 12 - lib/Target/X86/X86AsmPrinter.cpp | 6 +- lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp | 27 +- lib/Target/X86/X86DiscriminateMemOps.cpp | 41 +- lib/Target/X86/X86DomainReassignment.cpp | 5 +- lib/Target/X86/X86FastISel.cpp | 21 +- lib/Target/X86/X86FixupLEAs.cpp | 51 +- lib/Target/X86/X86FrameLowering.cpp | 3 +- lib/Target/X86/X86ISelDAGToDAG.cpp | 524 +- lib/Target/X86/X86ISelLowering.cpp | 2459 ++--- lib/Target/X86/X86ISelLowering.h | 58 +- lib/Target/X86/X86InstrAVX512.td | 505 +- lib/Target/X86/X86InstrArithmetic.td | 52 +- lib/Target/X86/X86InstrCompiler.td | 135 +- lib/Target/X86/X86InstrFragmentsSIMD.td | 49 +- lib/Target/X86/X86InstrInfo.cpp | 51 +- lib/Target/X86/X86InstrInfo.td | 66 +- lib/Target/X86/X86InstrSSE.td | 22 +- lib/Target/X86/X86IntrinsicsInfo.h | 391 +- lib/Target/X86/X86RegisterInfo.td | 6 + lib/Target/X86/X86TargetTransformInfo.cpp | 76 +- lib/Target/XCore/XCoreISelLowering.cpp | 12 +- lib/TextAPI/ELF/TBEHandler.cpp | 1 + .../AggressiveInstCombine.cpp | 107 +- lib/Transforms/Hello/CMakeLists.txt | 2 +- lib/Transforms/IPO/ArgumentPromotion.cpp | 38 +- lib/Transforms/IPO/DeadArgumentElimination.cpp | 4 +- lib/Transforms/IPO/ExtractGV.cpp | 1 + lib/Transforms/IPO/FunctionAttrs.cpp | 11 +- lib/Transforms/IPO/FunctionImport.cpp | 14 +- lib/Transforms/IPO/HotColdSplitting.cpp | 2 + lib/Transforms/IPO/Inliner.cpp | 21 +- lib/Transforms/IPO/LowerTypeTests.cpp | 29 +- lib/Transforms/IPO/MergeFunctions.cpp | 14 +- lib/Transforms/IPO/PartialInlining.cpp | 8 +- lib/Transforms/IPO/PassManagerBuilder.cpp | 53 +- lib/Transforms/IPO/SampleProfile.cpp | 15 +- lib/Transforms/IPO/SyntheticCountsPropagation.cpp | 35 +- lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp | 17 +- lib/Transforms/IPO/WholeProgramDevirt.cpp | 16 +- lib/Transforms/InstCombine/InstCombineAddSub.cpp | 7 +- lib/Transforms/InstCombine/InstCombineAndOrXor.cpp | 54 + lib/Transforms/InstCombine/InstCombineCalls.cpp | 111 +- lib/Transforms/InstCombine/InstCombineCasts.cpp | 39 +- lib/Transforms/InstCombine/InstCombineCompares.cpp | 25 +- lib/Transforms/InstCombine/InstCombineInternal.h | 3 +- .../InstCombine/InstCombineLoadStoreAlloca.cpp | 14 +- .../InstCombine/InstCombineMulDivRem.cpp | 5 + lib/Transforms/InstCombine/InstCombinePHI.cpp | 1 + lib/Transforms/InstCombine/InstCombineSelect.cpp | 49 +- .../InstCombine/InstCombineSimplifyDemanded.cpp | 22 +- .../InstCombine/InstCombineVectorOps.cpp | 58 +- .../InstCombine/InstructionCombining.cpp | 5 +- .../Instrumentation/AddressSanitizer.cpp | 27 +- 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| 4 +- test/CodeGen/WebAssembly/PR40172.ll | 31 + test/CodeGen/WebAssembly/atomic-rmw.ll | 210 +- test/CodeGen/WebAssembly/byval.ll | 24 +- test/CodeGen/WebAssembly/call.ll | 28 +- test/CodeGen/WebAssembly/cfg-stackify-dbg-skip.ll | 2 +- test/CodeGen/WebAssembly/cfg-stackify-eh.mir | 32 +- test/CodeGen/WebAssembly/comparisons-f32.ll | 60 +- test/CodeGen/WebAssembly/comparisons-f64.ll | 60 +- test/CodeGen/WebAssembly/comparisons-i32.ll | 78 +- test/CodeGen/WebAssembly/comparisons-i64.ll | 78 +- test/CodeGen/WebAssembly/conv-trap.ll | 16 +- test/CodeGen/WebAssembly/conv.ll | 68 +- test/CodeGen/WebAssembly/copysign-casts.ll | 4 +- test/CodeGen/WebAssembly/exception.ll | 22 +- test/CodeGen/WebAssembly/f16.ll | 4 +- test/CodeGen/WebAssembly/f32.ll | 4 +- test/CodeGen/WebAssembly/f64.ll | 4 +- test/CodeGen/WebAssembly/fast-isel-i24.ll | 4 +- test/CodeGen/WebAssembly/fast-isel-noreg.ll | 12 +- test/CodeGen/WebAssembly/fast-isel.ll | 8 +- test/CodeGen/WebAssembly/function-bitcasts.ll | 4 +- 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test/CodeGen/X86/2010-06-24-g-constraint-crash.ll | 2 +- .../X86/2010-06-25-CoalescerSubRegDefDead.ll | 2 +- test/CodeGen/X86/2010-06-25-asm-RA-crash.ll | 2 +- test/CodeGen/X86/2011-06-12-FastAllocSpill.ll | 2 +- .../X86/2011-07-13-BadFrameIndexDisplacement.ll | 2 +- test/CodeGen/X86/2011-12-28-vselecti8.ll | 18 +- test/CodeGen/X86/2012-01-10-UndefExceptionEdge.ll | 2 +- .../X86/GlobalISel/x86_64-legalize-sitofp.mir | 2 +- .../X86/GlobalISel/x86_64-select-sitofp.mir | 2 +- test/CodeGen/X86/addr-of-ret-addr.ll | 4 +- test/CodeGen/X86/and-load-fold.ll | 6 +- test/CodeGen/X86/anyregcc.ll | 6 +- test/CodeGen/X86/avx-intrinsics-fast-isel.ll | 9 +- test/CodeGen/X86/avx-vbroadcast.ll | 52 +- test/CodeGen/X86/avx2-intrinsics-fast-isel.ll | 61 +- test/CodeGen/X86/avx2-intrinsics-x86-upgrade.ll | 44 + test/CodeGen/X86/avx2-intrinsics-x86.ll | 1805 ++-- test/CodeGen/X86/avx2-logic.ll | 2 - test/CodeGen/X86/avx2-schedule.ll | 48 +- test/CodeGen/X86/avx512-ext.ll | 33 +- .../X86/avx512-extract-subvector-load-store.ll | 108 +- ... => avx512-gather-scatter-intrin-deprecated.ll} | 0 test/CodeGen/X86/avx512-gather-scatter-intrin.ll | 527 +- test/CodeGen/X86/avx512-insert-extract.ll | 4 +- test/CodeGen/X86/avx512-intrinsics-fast-isel.ll | 417 +- test/CodeGen/X86/avx512-intrinsics-upgrade.ll | 294 +- test/CodeGen/X86/avx512-intrinsics.ll | 338 +- test/CodeGen/X86/avx512-mask-op.ll | 909 +- test/CodeGen/X86/avx512-schedule.ll | 54 +- test/CodeGen/X86/avx512-select.ll | 48 +- test/CodeGen/X86/avx512-shift.ll | 93 +- test/CodeGen/X86/avx512bw-intrinsics-canonical.ll | 377 +- test/CodeGen/X86/avx512bw-intrinsics-upgrade.ll | 304 + test/CodeGen/X86/avx512bw-intrinsics.ll | 504 +- .../CodeGen/X86/avx512bwvl-intrinsics-canonical.ll | 898 +- test/CodeGen/X86/avx512bwvl-intrinsics-upgrade.ll | 1078 ++- test/CodeGen/X86/avx512bwvl-intrinsics.ll | 885 +- .../CodeGen/X86/avx512vbmi-intrinsics-fast-isel.ll | 64 + test/CodeGen/X86/avx512vbmi-intrinsics-upgrade.ll | 30 + test/CodeGen/X86/avx512vbmi-intrinsics.ll | 26 +- .../X86/avx512vbmi2-intrinsics-fast-isel.ll | 204 +- test/CodeGen/X86/avx512vbmi2-intrinsics-upgrade.ll | 400 +- test/CodeGen/X86/avx512vbmi2-intrinsics.ll | 234 +- .../X86/avx512vbmi2vl-intrinsics-fast-isel.ll | 420 +- .../X86/avx512vbmi2vl-intrinsics-upgrade.ll | 836 +- test/CodeGen/X86/avx512vbmi2vl-intrinsics.ll | 484 +- .../X86/avx512vbmivl-intrinsics-fast-isel.ll | 118 + .../CodeGen/X86/avx512vbmivl-intrinsics-upgrade.ll | 60 + test/CodeGen/X86/avx512vbmivl-intrinsics.ll | 52 +- test/CodeGen/X86/avx512vl-intrinsics-fast-isel.ll | 128 +- test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll | 584 ++ test/CodeGen/X86/avx512vl-intrinsics.ll | 1080 +-- test/CodeGen/X86/barrier.ll | 6 +- test/CodeGen/X86/bitcast-and-setcc-128.ll | 128 +- test/CodeGen/X86/bitcast-and-setcc-256.ll | 129 +- test/CodeGen/X86/bitcast-and-setcc-512.ll | 52 +- test/CodeGen/X86/bitcast-setcc-128.ll | 49 +- test/CodeGen/X86/bitcast-setcc-256.ll | 67 +- test/CodeGen/X86/bitcast-setcc-512.ll | 22 +- test/CodeGen/X86/bmi.ll | 383 +- test/CodeGen/X86/broadcastm-lowering.ll | 34 +- test/CodeGen/X86/build-vector-128.ll | 51 + test/CodeGen/X86/buildvec-extract.ll | 706 ++ test/CodeGen/X86/bypass-slow-division-tune.ll | 208 +- test/CodeGen/X86/call-push.ll | 2 +- test/CodeGen/X86/cmp.ll | 18 + test/CodeGen/X86/coalescer-dce.ll | 2 +- test/CodeGen/X86/combine-abs.ll | 8 +- test/CodeGen/X86/combine-add-ssat.ll | 162 + test/CodeGen/X86/combine-add-usat.ll | 154 + test/CodeGen/X86/combine-bitselect.ll | 592 ++ test/CodeGen/X86/combine-sdiv.ll | 388 +- test/CodeGen/X86/combine-shl.ll | 32 +- test/CodeGen/X86/combine-sra.ll | 8 + test/CodeGen/X86/combine-srem.ll | 66 +- test/CodeGen/X86/combine-srl.ll | 8 + test/CodeGen/X86/combine-sub-ssat.ll | 116 + test/CodeGen/X86/combine-sub-usat.ll | 116 + test/CodeGen/X86/compact-unwind.ll | 6 +- test/CodeGen/X86/copysign-constant-magnitude.ll | 14 +- test/CodeGen/X86/crash-O0.ll | 2 +- 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