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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-defconfig in repository toolchain/ci/llvm-project.
from 3170d548426 [InstCombine][X86] Covert masked load/stores with (sign ext [...] adds 8ce75e2778d TableGen: change a couple of member names to clarify their use. adds 74760bb00fb [LV][ARM] Add preferInloopReduction target hook. adds 3de9e3e493b [DSE] Precommit test case with loop carried dependence. adds e082dee2b58 [DSE] Bail out on MemoryPhis when deleting stores at end of [...] adds d85ac6d577a [DSE] Adjust coroutines test after e082dee2b588. adds ad3d6f993d9 [SelectionDAG][X86][ARM][AArch64] Add ISD opcode for __buil [...] adds cc76965b190 [MinGW] Use lib prefix for libraries adds bb613044b68 [MinGW][clang-shlib] Build by default on MinGW adds 7da94193990 [MinGW][libclang] Allow simultaneous shared and static lib adds c34a99fe589 [InstCombine] Add extra use tests for abs canonicalization (NFC) adds c55c14837e1 [gcov] Clean up by getting llvm.dbg.cu earlier adds 412c9c0bf2a [gcov] emitProfileArcs: iterate over GCOVFunction's instead [...] adds 7d3825ed954 Revert "[gcov] emitProfileArcs: iterate over GCOVFunction's [...] adds e8e3693ceaa Change range operator from deprecated '-' to '...' adds 93b4f853826 Update TableGen test files to use the new '...' range punctuation. adds bdd1eba37b6 [ARM] Add additional vecreduce float legalization test (NFC) adds d6fadc49e3d [gcov] Process .gcda immediately after the accompanying .gc [...] adds 04febd30a8d [lld][WebAssembly] Error on import/export of mutable global [...] adds c2f8bc986fb [ARM] Add tests for fmin/max + inf folds (NFC) adds cc2da5554b5 [lld][WebAssembly] Add initial support for -Map/--print-map adds 70daa353e2a [gn build] Port cc2da5554b5 adds 9d300bc8d2f [Hexagon] Avoid widening vectors with non-HVX element types adds 758732a34ed [X86] Use ISD::PARITY directly instead of emitting CTPOP an [...] adds 61d29e0dff0 [LegalizeTypes] Remove a few cases from SplitVectorOperand [...] adds 0fb2203cd6c [Docs] Fix --print-supported-cpus option rendering adds 8cf1ac97cec [llvm-cov gcov] Improve accuracy when some edges are not measured adds f086e85eea9 [gcov] Assign names to some types and loaded values used in [...] adds 63182c2ac0b [gcov] Add spanning tree optimization adds 5f4e9bf6416 [gcov] Fix memory leak due to BranchProbabilityInfoWrapperPass adds bec81dc67d9 Reland "[PowerPC] Implement instruction clustering for stores" adds e2dee9af8db [X86] Add test cases for PR11210 new 2c85f5e642f [ARM] Add tests for fmin/max with largest/smallest float (NFC) new 9237fde4813 [CGP] Prevent optimizePhiType from iterating forever
The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: clang/docs/CommandGuide/clang.rst | 6 +- clang/lib/Driver/ToolChains/WebAssembly.cpp | 21 + clang/test/CodeGen/code-coverage-tsan.c | 1 - clang/test/CodeGen/code-coverage.c | 6 +- clang/test/Driver/wasm-toolchain.c | 11 + clang/tools/CMakeLists.txt | 2 +- clang/tools/libclang/CMakeLists.txt | 4 +- compiler-rt/test/profile/Posix/gcov-fork.c | 2 +- compiler-rt/test/profile/gcov-basic.c | 2 + compiler-rt/test/profile/gcov-dump-and-remove.c | 8 +- lld/test/ELF/map-file.s | 2 +- lld/test/wasm/Inputs/undefined-globals.s | 4 +- lld/test/wasm/early-exit-for-bad-paths.s | 8 +- lld/test/wasm/emit-relocs-fpic.s | 4 +- lld/test/wasm/gc-imports.s | 6 +- lld/test/wasm/map-file.s | 47 ++ lld/test/wasm/mutable-globals.s | 13 + lld/test/wasm/pie.ll | 2 +- lld/test/wasm/shared.ll | 2 +- lld/wasm/CMakeLists.txt | 1 + lld/wasm/Config.h | 1 + lld/wasm/Driver.cpp | 7 +- lld/wasm/InputChunks.h | 4 +- lld/wasm/MapFile.cpp | 148 +++++ lld/wasm/MapFile.h | 21 + lld/wasm/Options.td | 6 + lld/wasm/OutputSections.cpp | 7 +- lld/wasm/OutputSections.h | 20 +- lld/wasm/Symbols.h | 2 +- lld/wasm/Writer.cpp | 27 + lldb/source/API/CMakeLists.txt | 4 +- llvm/cmake/modules/AddLLVM.cmake | 2 +- llvm/include/llvm/Analysis/TargetTransformInfo.h | 10 + .../llvm/Analysis/TargetTransformInfoImpl.h | 5 + llvm/include/llvm/CodeGen/ISDOpcodes.h | 1 + llvm/include/llvm/ProfileData/GCOV.h | 2 + llvm/include/llvm/TableGen/Record.h | 21 +- llvm/lib/Analysis/TargetTransformInfo.cpp | 5 + llvm/lib/CodeGen/CodeGenPrepare.cpp | 28 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 19 + llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 26 + .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 21 +- llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h | 3 +- .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 4 - .../CodeGen/SelectionDAG/SelectionDAGDumper.cpp | 1 + llvm/lib/CodeGen/TargetLoweringBase.cpp | 1 + llvm/lib/ProfileData/GCOV.cpp | 11 +- llvm/lib/TableGen/Record.cpp | 4 +- llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 14 + llvm/lib/Target/ARM/ARMTargetTransformInfo.h | 3 + llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp | 28 +- llvm/lib/Target/Hexagon/HexagonSubtarget.h | 13 +- llvm/lib/Target/PowerPC/PPC.td | 11 +- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 109 +++- llvm/lib/Target/PowerPC/PPCInstrInfo.h | 13 + llvm/lib/Target/PowerPC/PPCSubtarget.cpp | 1 + llvm/lib/Target/PowerPC/PPCSubtarget.h | 2 + llvm/lib/Target/PowerPC/PPCTargetMachine.cpp | 4 + llvm/lib/Target/X86/X86ISelLowering.cpp | 152 ++--- .../Transforms/Instrumentation/GCOVProfiling.cpp | 616 ++++++++++++-------- .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 10 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 10 +- llvm/test/CodeGen/AArch64/convertphitype.ll | 201 ++++++- llvm/test/CodeGen/AArch64/parity.ll | 161 ++++++ llvm/test/CodeGen/ARM/fminmax-folds.ll | 640 +++++++++++++++++++++ llvm/test/CodeGen/ARM/parity.ll | 162 ++++++ .../ARM/vecreduce-fadd-legalization-soft-float.ll | 39 ++ .../autohvx/isel-widen-truncate-illegal-elem.ll | 34 ++ llvm/test/CodeGen/PowerPC/fusion-load-store.ll | 268 +++++++++ .../CodeGen/PowerPC/pcrel-call-linkage-leaf.ll | 4 +- llvm/test/CodeGen/X86/parity.ll | 189 +++++- llvm/test/CodeGen/X86/vector-reduce-xor-bool.ll | 12 +- llvm/test/TableGen/AllowDuplicateRegisterNames.td | 2 +- llvm/test/TableGen/BigEncoder.td | 12 +- llvm/test/TableGen/BitOffsetDecoder.td | 16 +- llvm/test/TableGen/BitsInit.td | 6 +- llvm/test/TableGen/DAGDefaultOps.td | 16 +- llvm/test/TableGen/ForeachLoop.td | 4 +- llvm/test/TableGen/HwModeEncodeDecode.td | 14 +- llvm/test/TableGen/JSON.td | 4 +- llvm/test/TableGen/ListSlices.td | 4 +- llvm/test/TableGen/UnsetBitInit.td | 4 +- llvm/test/TableGen/cond-let.td | 14 +- llvm/test/TableGen/dag-isel-regclass-emit-enum.td | 2 +- llvm/test/TableGen/defset.td | 2 +- llvm/test/TableGen/foreach-variable-range.td | 32 +- llvm/test/TableGen/if.td | 12 +- llvm/test/TableGen/ifstmt.td | 6 +- llvm/test/TableGen/list-element-bitref.td | 4 +- llvm/test/TableGen/range-lists.td | 3 +- llvm/test/TableGen/simplify-patfrag.td | 2 +- llvm/test/TableGen/trydecode-emission3.td | 4 +- llvm/test/Transforms/Coroutines/ArgAddr.ll | 9 +- .../MSSA/multiblock-loop-carried-dependence.ll | 143 +++++ .../MSSA/multiblock-malloc-free.ll | 1 + .../MSSA/multiblock-memintrinsics.ll | 18 + .../Transforms/GCOVProfiling/atomic-counter.ll | 3 +- .../split-indirectbr-critical-edges.ll | 61 ++ llvm/test/Transforms/InstCombine/abs-1.ll | 103 +++- .../LoopVectorize/ARM/mve-reduction-types.ll | 42 +- .../Transforms/LoopVectorize/ARM/mve-reductions.ll | 168 +++--- .../PhaseOrdering/X86/masked-memory-ops.ll | 56 ++ llvm/test/tools/llvm-cov/gcov-8.c | 6 +- llvm/tools/llvm-config/llvm-config.cpp | 1 + llvm/utils/gn/secondary/lld/wasm/BUILD.gn | 1 + 105 files changed, 3395 insertions(+), 639 deletions(-) create mode 100644 lld/test/wasm/map-file.s create mode 100644 lld/test/wasm/mutable-globals.s create mode 100644 lld/wasm/MapFile.cpp create mode 100644 lld/wasm/MapFile.h create mode 100644 llvm/test/CodeGen/AArch64/parity.ll create mode 100644 llvm/test/CodeGen/ARM/parity.ll create mode 100644 llvm/test/CodeGen/Hexagon/autohvx/isel-widen-truncate-illegal-elem.ll create mode 100644 llvm/test/CodeGen/PowerPC/fusion-load-store.ll create mode 100644 llvm/test/Transforms/DeadStoreElimination/MSSA/multiblock-loop- [...] create mode 100644 llvm/test/Transforms/GCOVProfiling/split-indirectbr-critical-edges.ll create mode 100644 llvm/test/Transforms/PhaseOrdering/X86/masked-memory-ops.ll