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from 2858bf16d33 Daily bump. new 9debb240a4b RISC-V: Fix wrong partial subreg check for bsetidisi new 602cfc746e9 RISC-V: Allow const0_rtx operand in max/min new ec99ffabc3d RISC-V: Add scalar move support and fix VSETVL bugs new 2a2c4c93fda RISC-V: Add testcase for VSETVL PASS new f8ba8a45edc RISC-V: Remove void_type_node of void_args for vsetvlmax intrinsic new 1bff101b7e6 RISC-V: Add permutation C/C++ support new 7caa1ae5e45 RISC-V: Add RVV misc intrinsic support
The 7 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: gcc/config/riscv/bitmanip.md | 6 +- gcc/config/riscv/constraints.md | 6 + gcc/config/riscv/genrvv-type-indexer.cc | 313 +++++ gcc/config/riscv/predicates.md | 24 +- gcc/config/riscv/riscv-c.cc | 20 + gcc/config/riscv/riscv-protos.h | 19 +- gcc/config/riscv/riscv-v.cc | 182 +++ gcc/config/riscv/riscv-vector-builtins-bases.cc | 233 ++++ gcc/config/riscv/riscv-vector-builtins-bases.h | 19 + .../riscv/riscv-vector-builtins-functions.def | 95 +- gcc/config/riscv/riscv-vector-builtins-shapes.cc | 112 +- gcc/config/riscv/riscv-vector-builtins-shapes.h | 5 + gcc/config/riscv/riscv-vector-builtins-types.def | 425 ++++++ gcc/config/riscv/riscv-vector-builtins.cc | 1110 +++++++++++---- gcc/config/riscv/riscv-vector-builtins.def | 240 ++-- gcc/config/riscv/riscv-vector-builtins.h | 129 +- gcc/config/riscv/riscv-vsetvl.cc | 931 ++++++++++--- gcc/config/riscv/riscv-vsetvl.def | 684 +++++++++ gcc/config/riscv/riscv-vsetvl.h | 86 +- gcc/config/riscv/riscv.md | 28 +- gcc/config/riscv/t-riscv | 18 + gcc/config/riscv/vector-iterators.md | 217 ++- gcc/config/riscv/vector.md | 624 ++++++++- .../riscv/rvv/base/binop_vx_constraint-167.c | 143 ++ .../riscv/rvv/base/binop_vx_constraint-168.c | 143 ++ .../riscv/rvv/base/binop_vx_constraint-169.c | 163 +++ .../riscv/rvv/base/binop_vx_constraint-170.c | 163 +++ .../riscv/rvv/base/binop_vx_constraint-171.c | 75 + .../riscv/rvv/base/binop_vx_constraint-172.c | 71 + .../riscv/rvv/base/binop_vx_constraint-173.c | 75 + .../riscv/rvv/base/binop_vx_constraint-174.c | 71 + .../gcc.target/riscv/rvv/base/scalar_move-1.c | 75 + .../gcc.target/riscv/rvv/base/scalar_move-2.c | 62 + .../gcc.target/riscv/rvv/base/scalar_move-3.c | 58 + .../gcc.target/riscv/rvv/base/scalar_move-4.c | 54 + .../gcc.target/riscv/rvv/base/scalar_move-5.c | 176 +++ .../gcc.target/riscv/rvv/base/scalar_move-6.c | 209 +++ .../gcc.target/riscv/rvv/base/scalar_move-7.c | 176 +++ .../gcc.target/riscv/rvv/base/scalar_move-8.c | 201 +++ gcc/testsuite/gcc.target/riscv/rvv/base/vlmul_v.c | 1448 ++++++++++++++++++++ .../gcc.target/riscv/rvv/vsetvl/avl_single-100.c | 25 + .../gcc.target/riscv/rvv/vsetvl/avl_single-101.c | 29 + .../gcc.target/riscv/rvv/vsetvl/avl_single-78.c | 24 + .../gcc.target/riscv/rvv/vsetvl/avl_single-79.c | 22 + .../gcc.target/riscv/rvv/vsetvl/avl_single-80.c | 22 + .../vsetvl/{avl_single-30.c => avl_single-81.c} | 16 +- .../gcc.target/riscv/rvv/vsetvl/avl_single-82.c | 30 + .../gcc.target/riscv/rvv/vsetvl/avl_single-83.c | 31 + .../gcc.target/riscv/rvv/vsetvl/avl_single-84.c | 23 + .../gcc.target/riscv/rvv/vsetvl/avl_single-85.c | 22 + .../gcc.target/riscv/rvv/vsetvl/avl_single-86.c | 29 + .../gcc.target/riscv/rvv/vsetvl/avl_single-87.c | 30 + .../gcc.target/riscv/rvv/vsetvl/avl_single-88.c | 29 + .../gcc.target/riscv/rvv/vsetvl/avl_single-89.c | 31 + .../gcc.target/riscv/rvv/vsetvl/avl_single-90.c | 30 + .../gcc.target/riscv/rvv/vsetvl/avl_single-91.c | 33 + .../gcc.target/riscv/rvv/vsetvl/avl_single-92.c | 26 + .../gcc.target/riscv/rvv/vsetvl/avl_single-93.c | 21 + .../gcc.target/riscv/rvv/vsetvl/avl_single-94.c | 20 + .../gcc.target/riscv/rvv/vsetvl/avl_single-95.c | 20 + .../gcc.target/riscv/rvv/vsetvl/avl_single-96.c | 21 + .../gcc.target/riscv/rvv/vsetvl/avl_single-97.c | 22 + .../gcc.target/riscv/rvv/vsetvl/avl_single-98.c | 25 + .../gcc.target/riscv/rvv/vsetvl/avl_single-99.c | 23 + .../gcc.target/riscv/rvv/vsetvl/vsetvlmax-10.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/vsetvlmax-11.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/vsetvlmax-12.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/vsetvlmax-15.c | 4 +- .../gcc.target/riscv/rvv/vsetvl/vsetvlmax-18.c | 2 +- .../gcc.target/riscv/rvv/vsetvl/vsetvlmax-9.c | 2 +- gcc/testsuite/gcc.target/riscv/zbb-min-max-03.c | 10 + 71 files changed, 8779 insertions(+), 738 deletions(-) create mode 100644 gcc/config/riscv/genrvv-type-indexer.cc create mode 100644 gcc/config/riscv/riscv-vsetvl.def create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-167.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-168.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-169.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-170.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-171.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-172.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-173.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/binop_vx_constraint-174.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-6.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-7.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/scalar_move-8.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/base/vlmul_v.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-100.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-101.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-78.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-79.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-80.c copy gcc/testsuite/gcc.target/riscv/rvv/vsetvl/{avl_single-30.c => avl_single-81.c} (54%) create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-82.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-83.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-84.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-85.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-86.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-87.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-88.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-89.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-90.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-91.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-92.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-93.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-94.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-95.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-96.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-97.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-98.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-99.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbb-min-max-03.c