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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allmodconfig in repository toolchain/ci/llvm-project.
from f243ca4af8c [LLDB] Fix FreeBSD build adds 2c16bb80348 [llvm-nm] Fix docs and help text for --print-size adds 32c1e736036 [XCore] LowerLOAD/LowerSTORE - Use allowsMemoryAccess wrapp [...] adds 4cfcacbdfef [docs] Fix typo adds f6efac67e18 [clangd] Fix typo in GUARDED_BY() adds 564d248ec2f [ThinLTO]LTO]Legacy] Fix dependent libraries support by add [...] adds ca39de71997 [XCore] CombineSTORE - Use allowsMemoryAccess wrapper. NFCI. adds 7a15e99f3a9 [DOC] Fix `load` instructions' syntax, function definition. adds ca9c3de17e5 DWARF: Share line tables of type units adds 1dc2123d640 Share /machine: handling code with llvm-cvtres too adds 31908669c6d [docs][llvm-symbolizer] Fix typo and grammar error adds ad805ef95a7 Recognise debug_types.dwo as a debug info section adds 61de6a4e9c5 [NFC][SCEV] Add NoWrapFlag argument to InsertBinOp adds 91bb72a337a [bindings/go][NFC] Format code with go fmt adds 757ac02dc8f [ARM] Implement TTI::isHardwareLoopProfitable adds 04112ecd41a [clangd] Return TextEdits from ClangdServer::applyTweak adds 52d3e4b4aa5 [Legacy LTO] Fix build bots: r363140: Fix export name adds 5e3aa264a84 gn build: Merge r363122 adds a4db4bb0238 [X86][AVX] Tests showing missing concat(shuffle,shuffle) -> [...] adds 2aa3f3d43f7 gn build: add RISCV target adds 8bbdea447ed Fix a Wunused-lambda-capture warning. adds ece316b56a2 Attempt to fix non-Arm buildbots adds 52d7326f326 [NFC] Add HardwareLoops lit.local.cfg file adds 1e21181aee4 LoopDistribute/LAA: Add tests to catch regressions adds 4c69c56bd1f gn build: Add Mips target adds 2466ba97bcc LoopDistribute/LAA: Respect convergent adds e2f94974dfd [DebugInfo] Add a test that fell out of an earlier commit adds 86325be3d70 LoopLoadElim: Respect convergent adds 082a41994ac [InstCombine] add tests for fcmp+select with FMF (minnum/ma [...] adds 339b39b7733 [MIR] Skip hoisting to basic block which may throw exceptio [...] adds aa6bdf9dcd5 LoopVersioning: Respect convergent adds 030df51e27e [ARM] Fix compiler warning adds 7eddb16fed9 [compiler-rt] Fix name_to_handle_at.cc test on Overlay2 (fo [...] adds 61f6395fd01 AMDGPU/GlobalISel: Fix using illegal situations in tests adds f29366b1f59 StackProtector: Use PointerMayBeCaptured adds cae2c85deae gn build: Add SystemZ target adds a866d3b2eed [CMake] Two extra FOLDER properties for debugserver adds 61a7ab7fdb2 [lldb] Ignore null frames in lldb.macosx crashlog adds 48365ec3e14 [NFC[ Updated tests for D54411 adds 3d42959dd8a Revert rL363156. adds 64006896ac0 [InstCombine] add tests for fmin/fmax libcalls; NFC adds 5b0e0dd709f [X86][AVX] Fold concat(vpermilps(x,c),vpermilps(y,c)) -> vp [...] adds 4e0648a541f [TargetLowering] Add MachineMemOperand::Flags to allowsMemo [...] adds e51c3d8b824 [SCEV] Teach computeSCEVAtScope benefit from one-input Phi. [...] adds ef7d4fbe809 [X86][SSE] Avoid unnecessary stack codegen in NT merge-cons [...] adds 8f4973f57b0 [llvm-lipo] Update llvm-lipo docs for -archs flag adds 5b99928ba88 [Expression] Add PersistentExpressionState::GetCompilerType [...] adds efc0d1a2980 [Mips] Add s.d instruction alias for Mips1 adds 5f581c9f08e [AMDGPU] gfx1010 premlane instructions adds 245b5ba3448 [AMDGPU] gfx1010 dpp16 and dpp8 adds fa880e6114c [analyzer] ProgramPoint: more explicit printJson() adds c69cc842537 PR42220: take into account the possibility of aggregates wi [...] adds 146a154e610 [llvm-ar][test] Relax lit directory assumptions in thin-arc [...] adds 000f9cc62a7 [AMDGPU] more gfx1010 tests. NFC. adds 4e9538997ee [MS] Pretend constexpr variable template specializations ar [...] adds 851adc000cb [Tests] Add tests to highlight sibling loop optimization or [...] adds 00e481b75d8 [Tests] Autogen RLEV test and add tests for a future enhancement adds 2aa5ada267d [NFC][CodeGen] Add unary FNeg tests to X86/avx512vl-intrins [...] adds b05ce7f9f71 Add comment to r363191 code as requested in code review adds ae2581cef3c [IndVars] Extend diagnostic -replexitval flag w/ability to [...] adds 782fff1bf87 [libcxx] XFAIL some CTAD tests on AppleClang 10 adds 565f1e2298c [llvm-readobj] Fix output interleaving issue caused by usin [...] adds 514cfdb18db [test] Reinstate the assignment to the diagnostic log in th [...] adds 27a5db9de57 [NFC][CodeGen] Add unary FNeg tests to X86/avx512vl-intrins [...] adds 4548c1cfca4 Sanitize llvm-extract -help output adds 87f75ecd720 Skip failing test on older versions of clang. adds a1421e83471 [x86] add tests for vector shifts; NFC adds f36d83735e3 [clang-scan-deps] initial outline of the tool that runs pre [...] adds aeffc15f976 NFC, fixup indentation in CMakeLists.txt from r363204 as re [...] adds 0e197bcb6b8 Re-land r363103 ("When reading ObjC class table, use new SP [...] adds b66be8c4d35 NFC, Update the ClangScanDeps.cpp file's license comment adds d2643516282 [clang-scan-deps] Include <mutex> in ClangScanDeps.cpp to e [...] adds c45f592b98f [libcxx] XFAIL set/multiset CTAD tests on Apple Clang 10 adds 781a0dc58d4 [llvm] Expose DWARFDebugLine::LineTable::getFileNameEntry adds ef96e985fcc [Reproducers] Simplify providers with nested Info struct (NFC) adds efc01eac173 [lld] Allow unrecognized signatures in debug sections adds 5584ab89a88 [lld] Fix type server merging with PDBs without IPI stream adds bb824c61a90 [ScopBuilder] Move getNonHoistableCtx to ScopBuilder. NFC. adds 41e0b9f2803 [NFC][CodeGen] Add unary FNeg tests to X86/avx512-intrinsic [...] adds 189abad1286 [ScopBuilder] Move addInvariantLoads to ScopBuilder. NFC. adds 0bded8442fe [Tests] Highlight impact of multiple exit LFTR (D62625) as [...] adds b2f45ba1e8a [SLP] Update propagate_ir_flags.ll test to check that we do [...] adds 5de7cacf079 Make GCC in C++03 Unsupported adds c73fadaa843 Revert r361811: 'Re-commit r357452 (take 2): "SimplifyCFG S [...] adds f3356722184 X86: Clean up pass initialization adds f93b99b2b6a [SimplifyCFG] NFC, update Switch tests to HEAD so I can adds c6cba2957d5 [SimplifyCFG] revert the last commit. adds 387acd64f3e [X86] Add tests for some the special cases in EVEX to VEX t [...] adds c2e2df7f7af [Reproducers] Include lldb version in the reproducer root adds c54b2011bd0 [SimplifyCFG] NFC, update Switch tests to better examine su [...] adds 636220e83c2 [SimpligyCFG] NFC intended, remove GCD that was only used f [...] adds 2bf25681509 [Reproducers] Remove call to lldb_private::GetVersion() adds 8b142bcc3f2 [SimplifyCFG] reverting preliminary Switch patches again adds 1f053207638 clang-format extension: Widen the supported versions range adds b1daec0eae6 [X86] Correct instruction operands in evex-to-vex-compress. [...] adds 02eac87ba3e [llvm-ar][test] Add to MRI test coverage adds 7957fc6547e [IntrinsicEmitter] Extend argument overloading with forward [...] adds 9d28473a355 [ARM][TTI] Scan for existing loop intrinsics adds 179e0fa8815 [NFC] Simplify Call query adds a78e025558b [ELF] Loosen the condition that changes absolute relocation [...] adds 49779275360 [clangd] Treat lambdas as functions when preparing hover response adds f9ad6e57d96 [clang-scan-deps] Fix -DBUILD_SHARED_LIBS=ON build adds 8d59f5370d4 Revert [llvm-ar][test] Add to MRI test coverage adds 51c2fa0e2ac Improve reduction intrinsics by overloading result value. adds 818dd8666a5 [WebAssembly] Modernize include path handling
No new revisions were added by this update.
Summary of changes: clang-tools-extra/clangd/ClangdLSPServer.cpp | 4 +- clang-tools-extra/clangd/ClangdServer.cpp | 15 +- clang-tools-extra/clangd/ClangdServer.h | 2 +- clang-tools-extra/clangd/TUScheduler.cpp | 2 +- clang-tools-extra/clangd/XRefs.cpp | 47 +- clang-tools-extra/clangd/unittests/XRefsTests.cpp | 80 +- clang/lib/AST/ASTContext.cpp | 23 +- clang/lib/Analysis/ProgramPoint.cpp | 43 +- clang/lib/Driver/ToolChains/WebAssembly.cpp | 41 +- clang/lib/Frontend/InitHeaderSearch.cpp | 8 + clang/lib/Sema/SemaInit.cpp | 3 + clang/test/CMakeLists.txt | 1 + clang/test/ClangScanDeps/Inputs/header.h | 3 + clang/test/ClangScanDeps/Inputs/header2.h | 1 + clang/test/ClangScanDeps/Inputs/regular_cdb.json | 12 + clang/test/ClangScanDeps/regular_cdb.cpp | 27 + .../test/CodeGenCXX/ms-constexpr-var-template.cpp | 11 + clang/test/CodeGenCXX/nrvo.cpp | 1 + clang/test/CodeGenCXX/stack-reuse-exceptions.cpp | 2 +- clang/test/CodeGenCXX/temporaries.cpp | 18 + clang/test/CodeGenObjC/exceptions.m | 2 +- clang/test/Driver/wasm-toolchain.cpp | 2 + clang/tools/CMakeLists.txt | 1 + .../source.extension.vsixmanifest.in | 2 +- clang/tools/clang-scan-deps/CMakeLists.txt | 27 + clang/tools/clang-scan-deps/ClangScanDeps.cpp | 218 ++ clang/unittests/Frontend/CompilerInstanceTest.cpp | 4 + .../TestCases/Linux/name_to_handle_at.cc | 2 +- libcxx/docs/index.rst | 4 +- libcxx/include/__config | 4 + .../associative/map/map.cons/deduct.fail.cpp | 2 +- .../multimap/multimap.cons/deduct.fail.cpp | 2 +- .../multiset/multiset.cons/deduct.fail.cpp | 2 +- .../associative/set/set.cons/deduct.fail.cpp | 2 +- lld/COFF/Chunks.cpp | 11 +- lld/COFF/Driver.cpp | 3 +- lld/COFF/PDB.cpp | 33 +- lld/COFF/SymbolTable.cpp | 2 +- lld/ELF/Relocations.cpp | 8 +- lld/test/COFF/Inputs/no-ipi-stream-obj.obj.yaml | 13 + lld/test/COFF/Inputs/no-ipi-stream-pdb.pdb.yaml | 2 + lld/test/COFF/allow-unknown-debug-info.test | 26 + lld/test/COFF/no-ipi-stream.test | 4 + lldb/examples/python/crashlog.py | 4 + lldb/include/lldb/Expression/ExpressionVariable.h | 3 + lldb/include/lldb/Utility/Reproducer.h | 46 +- lldb/include/lldb/lldb-enumerations.h | 1 + lldb/lit/Modules/ELF/section-types.yaml | 7 + lldb/lit/Reproducer/TestFileRepro.test | 3 + .../lit/SymbolFile/DWARF/debug-types-line-tables.s | 185 + lldb/lit/SymbolFile/DWARF/forward-declarations.s | 111 + .../persistent_types/TestPersistentTypes.py | 10 + .../return-value/TestReturnValue.py | 1 + lldb/source/API/SBDebugger.cpp | 2 +- lldb/source/API/SBReproducer.cpp | 6 +- lldb/source/API/SBReproducerPrivate.h | 10 +- lldb/source/Commands/CMakeLists.txt | 1 - lldb/source/Commands/CommandObjectMemory.cpp | 96 +- lldb/source/Core/Section.cpp | 2 + .../Initialization/SystemInitializerCommon.cpp | 6 +- .../Clang/ClangPersistentVariables.cpp | 16 + .../Clang/ClangPersistentVariables.h | 3 + .../ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp | 60 +- .../Plugins/ObjectFile/ELF/ObjectFileELF.cpp | 1 + .../Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp | 1 + .../Process/gdb-remote/ProcessGDBRemote.cpp | 19 +- .../SymbolFile/DWARF/DWARFASTParserClang.cpp | 80 +- .../Plugins/SymbolFile/DWARF/DWARFASTParserClang.h | 9 +- .../Plugins/SymbolFile/DWARF/DWARFBaseDIE.cpp | 7 - .../source/Plugins/SymbolFile/DWARF/DWARFBaseDIE.h | 2 - .../Plugins/SymbolFile/DWARF/DWARFCompileUnit.h | 2 + .../Plugins/SymbolFile/DWARF/DWARFTypeUnit.h | 4 +- lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp | 105 +- lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.h | 12 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp | 61 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.h | 7 + lldb/source/Symbol/ObjectFile.cpp | 1 + lldb/source/Utility/Reproducer.cpp | 26 +- lldb/tools/debugserver/source/CMakeLists.txt | 4 + lldb/unittests/Utility/ReproducerTest.cpp | 16 +- llvm/bindings/go/llvm/dibuilder.go | 26 +- llvm/bindings/go/llvm/ir.go | 95 +- llvm/bindings/go/llvm/transforms_coroutines.go | 8 +- llvm/docs/CommandGuide/llvm-lipo.rst | 6 + llvm/docs/CommandGuide/llvm-nm.rst | 4 +- llvm/docs/CommandGuide/llvm-symbolizer.rst | 5 +- llvm/docs/GetElementPtr.rst | 18 +- llvm/docs/LangRef.rst | 30 +- llvm/include/llvm-c/lto.h | 50 +- llvm/include/llvm/Analysis/LoopAccessAnalysis.h | 6 + .../llvm/Analysis/ScalarEvolutionExpander.h | 2 +- llvm/include/llvm/CodeGen/BasicTTIImpl.h | 9 +- llvm/include/llvm/CodeGen/StackProtector.h | 6 - llvm/include/llvm/CodeGen/TargetLowering.h | 16 +- llvm/include/llvm/DebugInfo/DWARF/DWARFDebugLine.h | 7 +- llvm/include/llvm/IR/Intrinsics.h | 28 +- llvm/include/llvm/IR/Intrinsics.td | 23 +- llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 20 + llvm/include/llvm/LTO/legacy/LTOModule.h | 11 +- .../LibDriver.h => Object/WindowsMachineFlag.h} | 15 +- llvm/include/llvm/ToolDrivers/llvm-lib/LibDriver.h | 14 - llvm/lib/Analysis/LoopAccessAnalysis.cpp | 64 +- llvm/lib/Analysis/ScalarEvolution.cpp | 10 + llvm/lib/Analysis/ScalarEvolutionExpander.cpp | 48 +- llvm/lib/CodeGen/MachineCSE.cpp | 2 + llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 3 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 3 +- llvm/lib/CodeGen/StackProtector.cpp | 39 +- llvm/lib/CodeGen/TargetLoweringBase.cpp | 5 +- llvm/lib/IR/Function.cpp | 140 +- llvm/lib/IR/IRBuilder.cpp | 2 +- llvm/lib/IR/Verifier.cpp | 12 +- llvm/lib/LTO/LTOModule.cpp | 32 +- llvm/lib/Object/CMakeLists.txt | 1 + llvm/lib/Object/WindowsMachineFlag.cpp | 44 + llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 14 +- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 7 +- llvm/lib/Target/AMDGPU/AMDGPU.td | 15 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 6 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 1 + llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 5 + .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 164 +- .../AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 35 + .../AMDGPU/Disassembler/AMDGPUDisassembler.h | 3 +- llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 44 + llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h | 2 +- .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 88 + .../Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h | 4 + llvm/lib/Target/AMDGPU/R600ISelLowering.cpp | 10 +- llvm/lib/Target/AMDGPU/R600ISelLowering.h | 7 +- llvm/lib/Target/AMDGPU/SIDefines.h | 15 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 25 +- llvm/lib/Target/AMDGPU/SIISelLowering.h | 7 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 41 +- llvm/lib/Target/AMDGPU/SIInstrInfo.td | 66 + llvm/lib/Target/AMDGPU/VOP1Instructions.td | 80 +- llvm/lib/Target/AMDGPU/VOP2Instructions.td | 106 +- llvm/lib/Target/AMDGPU/VOP3Instructions.td | 28 + llvm/lib/Target/AMDGPU/VOPInstructions.td | 47 +- llvm/lib/Target/ARM/ARMAsmPrinter.cpp | 3 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 11 +- llvm/lib/Target/ARM/ARMISelLowering.h | 1 + llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp | 222 ++ llvm/lib/Target/ARM/ARMTargetTransformInfo.h | 6 + llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 5 +- llvm/lib/Target/Hexagon/HexagonISelLowering.h | 2 +- llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 50 + llvm/lib/Target/Mips/Mips16ISelLowering.cpp | 7 +- llvm/lib/Target/Mips/Mips16ISelLowering.h | 1 + llvm/lib/Target/Mips/MipsInstrFPU.td | 8 + llvm/lib/Target/Mips/MipsSEISelLowering.cpp | 7 +- llvm/lib/Target/Mips/MipsSEISelLowering.h | 7 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 1 + llvm/lib/Target/PowerPC/PPCISelLowering.h | 8 +- llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 6 +- llvm/lib/Target/SystemZ/SystemZISelLowering.h | 1 + .../Target/WebAssembly/WebAssemblyISelLowering.cpp | 3 +- .../Target/WebAssembly/WebAssemblyISelLowering.h | 1 + llvm/lib/Target/X86/X86.h | 1 + .../Target/X86/X86AvoidStoreForwardingBlocks.cpp | 4 +- llvm/lib/Target/X86/X86CallFrameOptimization.cpp | 5 +- llvm/lib/Target/X86/X86CmovConversion.cpp | 4 +- llvm/lib/Target/X86/X86CondBrFolding.cpp | 4 +- llvm/lib/Target/X86/X86DomainReassignment.cpp | 4 +- llvm/lib/Target/X86/X86EvexToVex.cpp | 4 +- llvm/lib/Target/X86/X86FixupBWInsts.cpp | 4 +- llvm/lib/Target/X86/X86FixupLEAs.cpp | 4 +- llvm/lib/Target/X86/X86FlagsCopyLowering.cpp | 10 +- llvm/lib/Target/X86/X86FloatingPoint.cpp | 10 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 39 +- llvm/lib/Target/X86/X86ISelLowering.h | 3 +- .../lib/Target/X86/X86SpeculativeLoadHardening.cpp | 5 +- llvm/lib/Target/X86/X86TargetMachine.cpp | 1 + llvm/lib/Target/X86/X86WinEHState.cpp | 4 +- llvm/lib/Target/XCore/XCoreISelLowering.cpp | 54 +- llvm/lib/ToolDrivers/llvm-lib/LibDriver.cpp | 26 +- .../InstCombine/InstCombineSimplifyDemanded.cpp | 7 +- llvm/lib/Transforms/Scalar/IndVarSimplify.cpp | 7 +- llvm/lib/Transforms/Scalar/LoopDistribute.cpp | 15 +- llvm/lib/Transforms/Scalar/LoopLoadElimination.cpp | 6 + llvm/lib/Transforms/Utils/LoopVersioning.cpp | 5 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 29 +- .../Analysis/CostModel/AArch64/vector-reduce.ll | 174 +- .../Analysis/CostModel/X86/reduce-add-widen.ll | 400 +-- llvm/test/Analysis/CostModel/X86/reduce-add.ll | 400 +-- .../Analysis/CostModel/X86/reduce-and-widen.ll | 508 +-- llvm/test/Analysis/CostModel/X86/reduce-and.ll | 508 +-- .../Analysis/CostModel/X86/reduce-mul-widen.ll | 420 +-- llvm/test/Analysis/CostModel/X86/reduce-mul.ll | 440 +-- .../test/Analysis/CostModel/X86/reduce-or-widen.ll | 508 +-- llvm/test/Analysis/CostModel/X86/reduce-or.ll | 508 +-- .../Analysis/CostModel/X86/reduce-smax-widen.ll | 420 +-- llvm/test/Analysis/CostModel/X86/reduce-smax.ll | 420 +-- .../Analysis/CostModel/X86/reduce-smin-widen.ll | 402 +-- llvm/test/Analysis/CostModel/X86/reduce-smin.ll | 420 +-- .../Analysis/CostModel/X86/reduce-umax-widen.ll | 420 +-- llvm/test/Analysis/CostModel/X86/reduce-umax.ll | 420 +-- .../Analysis/CostModel/X86/reduce-umin-widen.ll | 420 +-- llvm/test/Analysis/CostModel/X86/reduce-umin.ll | 420 +-- .../Analysis/CostModel/X86/reduce-xor-widen.ll | 540 +-- llvm/test/Analysis/CostModel/X86/reduce-xor.ll | 540 +-- .../unsafe-and-rt-checks-convergent.ll | 73 + llvm/test/CodeGen/AArch64/aarch64-addv.ll | 24 +- llvm/test/CodeGen/AArch64/aarch64-minmaxv.ll | 92 +- llvm/test/CodeGen/AArch64/arm64-vabs.ll | 12 +- .../CodeGen/AArch64/machine_cse_illegal_hoist.ll | 52 + llvm/test/CodeGen/AArch64/max-jump-table.ll | 48 +- llvm/test/CodeGen/AArch64/min-jump-table.ll | 30 +- .../CodeGen/AArch64/vecreduce-add-legalization.ll | 58 +- .../CodeGen/AArch64/vecreduce-and-legalization.ll | 58 +- llvm/test/CodeGen/AArch64/vecreduce-bool.ll | 48 +- .../CodeGen/AArch64/vecreduce-fmax-legalization.ll | 28 +- .../AArch64/vecreduce-propagate-sd-flags.ll | 4 +- .../CodeGen/AArch64/vecreduce-umax-legalization.ll | 58 +- llvm/test/CodeGen/AArch64/win64-jumptable.ll | 52 +- .../AMDGPU/GlobalISel/inst-select-load-flat.mir | 2 +- .../AMDGPU/GlobalISel/inst-select-load-smrd.mir | 18 +- .../GlobalISel/regbankselect-insert-vector-elt.mir | 24 +- .../AMDGPU/GlobalISel/regbankselect-phi.mir | 29 +- llvm/test/CodeGen/AMDGPU/basic-branch.ll | 1 + .../CodeGen/AMDGPU/fmul-2-combine-multi-use.ll | 104 +- llvm/test/CodeGen/AMDGPU/hazard-hidden-bundle.mir | 2 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kill.ll | 168 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp.ll | 39 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp8.ll | 26 + llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll | 311 ++ llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll | 43 +- llvm/test/CodeGen/AMDGPU/smem-war-hazard.mir | 2 +- llvm/test/CodeGen/AMDGPU/v_cndmask.ll | 2 +- llvm/test/CodeGen/AMDGPU/vcmpx-exec-war-hazard.mir | 2 +- llvm/test/CodeGen/AMDGPU/vcmpx-permlane-hazard.mir | 145 + llvm/test/CodeGen/ARM/cmpxchg-idioms.ll | 4 +- .../Generic/expand-experimental-reductions.ll | 44 +- .../CodeGen/X86/avx512-intrinsics-fast-isel.ll | 657 ++++ .../CodeGen/X86/avx512vl-intrinsics-fast-isel.ll | 697 +++- llvm/test/CodeGen/X86/conditional-tailcall.ll | 476 ++- llvm/test/CodeGen/X86/evex-to-vex-compress.mir | 3556 ++++++++++---------- .../CodeGen/X86/merge-consecutive-stores-nt.ll | 16 +- llvm/test/CodeGen/X86/stack-protector.ll | 4 +- llvm/test/CodeGen/X86/tail-merge-after-mbp.mir | 68 +- llvm/test/CodeGen/X86/tail-opts.ll | 408 ++- llvm/test/CodeGen/X86/vector-reduce-add-widen.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-add.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-and-widen.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-and.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-fmax-nnan.ll | 32 +- llvm/test/CodeGen/X86/vector-reduce-fmax.ll | 32 +- llvm/test/CodeGen/X86/vector-reduce-fmin-nnan.ll | 32 +- llvm/test/CodeGen/X86/vector-reduce-fmin.ll | 32 +- llvm/test/CodeGen/X86/vector-reduce-mul-widen.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-mul.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-or-widen.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-or.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-smax-widen.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-smax.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-smin-widen.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-smin.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-umax-widen.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-umax.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-umin-widen.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-umin.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-xor-widen.ll | 88 +- llvm/test/CodeGen/X86/vector-reduce-xor.ll | 88 +- llvm/test/CodeGen/X86/vector-shift-lshr-128.ll | 181 + llvm/test/CodeGen/X86/vector-shift-shl-128.ll | 344 ++ llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll | 40 + llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll | 40 + llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll | 33 + .../DebugInfo/X86/live-debug-values-constprop.mir | 347 ++ .../LTO/X86/Inputs/list-dependent-libraries.ll | 6 + llvm/test/LTO/X86/list-dependent-libraries.ll | 18 + llvm/test/MC/AMDGPU/dpp-err.s | 38 + llvm/test/MC/AMDGPU/expressions-gfx10.s | 2 +- llvm/test/MC/AMDGPU/vop3-literal.s | 389 +++ llvm/test/MC/Mips/mips1/sd.s | 13 + .../Transforms/CodeGenPrepare/X86/vec-shift.ll | 117 + llvm/test/Transforms/HardwareLoops/ARM/calls.ll | 404 +++ llvm/test/Transforms/HardwareLoops/ARM/counter.ll | 35 + llvm/test/Transforms/HardwareLoops/ARM/do-rem.ll | 259 ++ .../Transforms/HardwareLoops/ARM/fp-emulation.ll | 207 ++ .../HardwareLoops}/ARM/lit.local.cfg | 0 .../test/Transforms/HardwareLoops/ARM/simple-do.ll | 155 + .../test/Transforms/HardwareLoops/ARM/structure.ll | 140 + .../Transforms/IndVarSimplify/exit_value_tests.ll | 228 +- .../Transforms/IndVarSimplify/lftr-multi-exit.ll | 158 + llvm/test/Transforms/IndVarSimplify/pr39673.ll | 154 +- llvm/test/Transforms/InstCombine/fast-math.ll | 18 + llvm/test/Transforms/InstCombine/minmax-fp.ll | 132 + .../LoopDistribute/basic-with-memchecks.ll | 178 + llvm/test/Transforms/LoopDistribute/basic.ll | 76 + .../convergent-no-cross-partition-checks.ll | 87 + llvm/test/Transforms/LoopDistribute/diagnostics.ll | 58 + .../LoopDistribute/scev-inserted-runtime-check.ll | 83 +- llvm/test/Transforms/LoopLoadElim/convergent.ll | 51 + .../LoopVectorize/AArch64/reduction-small-size.ll | 6 +- llvm/test/Transforms/LoopVectorize/read-only.ll | 30 + llvm/test/Transforms/LoopVectorize/write-only.ll | 23 + llvm/test/Transforms/LoopVersioning/convergent.ll | 40 + .../SLPVectorizer/AArch64/gather-cost.ll | 2 +- .../SLPVectorizer/AArch64/gather-root.ll | 10 +- .../Transforms/SLPVectorizer/AArch64/horizontal.ll | 6 +- .../Transforms/SLPVectorizer/AArch64/transpose.ll | 2 +- .../SLPVectorizer/X86/propagate_ir_flags.ll | 36 + .../Transforms/SimplifyCFG/sink-common-code.ll | 44 - .../test/Transforms/StackProtector/X86/captures.ll | 139 + .../StackProtector}/X86/lit.local.cfg | 0 llvm/test/tools/llvm-ar/thin-archive.test | 12 +- llvm/test/tools/llvm-lto/error.ll | 3 + .../tools/llvm-readobj/check-output-order.test | 45 + llvm/tools/llvm-cvtres/llvm-cvtres.cpp | 39 +- llvm/tools/llvm-extract/llvm-extract.cpp | 87 +- llvm/tools/llvm-lto/llvm-lto.cpp | 43 +- llvm/tools/llvm-nm/llvm-nm.cpp | 2 +- llvm/tools/llvm-readobj/COFFDumper.cpp | 2 +- llvm/tools/llvm-readobj/ELFDumper.cpp | 7 +- llvm/tools/llvm-readobj/MachODumper.cpp | 2 +- llvm/tools/llvm-readobj/llvm-readobj.cpp | 19 +- llvm/tools/lto/lto.cpp | 25 +- llvm/tools/lto/lto.exports | 4 + llvm/tools/opt/opt.cpp | 1 + llvm/utils/TableGen/CodeGenTarget.cpp | 35 +- llvm/utils/TableGen/IntrinsicEmitter.cpp | 78 +- llvm/utils/gn/TODO.txt | 2 +- llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn | 1 + llvm/utils/gn/secondary/llvm/lib/Object/BUILD.gn | 1 + .../llvm/lib/Target/Mips/AsmParser/BUILD.gn | 23 + .../gn/secondary/llvm/lib/Target/Mips/BUILD.gn | 118 + .../llvm/lib/Target/Mips/Disassembler/BUILD.gn | 22 + .../llvm/lib/Target/Mips/MCTargetDesc/BUILD.gn | 76 + .../llvm/lib/Target/Mips/TargetInfo/BUILD.gn | 10 + .../llvm/lib/Target/RISCV/AsmParser/BUILD.gn | 24 + .../gn/secondary/llvm/lib/Target/RISCV/BUILD.gn | 78 + .../llvm/lib/Target/RISCV/Disassembler/BUILD.gn | 22 + .../llvm/lib/Target/RISCV/MCTargetDesc/BUILD.gn | 73 + .../llvm/lib/Target/RISCV/TargetInfo/BUILD.gn | 10 + .../secondary/llvm/lib/Target/RISCV/Utils/BUILD.gn | 25 + .../llvm/lib/Target/SystemZ/AsmParser/BUILD.gn | 23 + .../gn/secondary/llvm/lib/Target/SystemZ/BUILD.gn | 74 + .../llvm/lib/Target/SystemZ/Disassembler/BUILD.gn | 23 + .../llvm/lib/Target/SystemZ/MCTargetDesc/BUILD.gn | 60 + .../llvm/lib/Target/SystemZ/TargetInfo/BUILD.gn | 10 + .../utils/gn/secondary/llvm/lib/Target/targets.gni | 8 + polly/include/polly/ScopBuilder.h | 25 + polly/include/polly/ScopInfo.h | 36 +- polly/lib/Analysis/ScopBuilder.cpp | 294 +- polly/lib/Analysis/ScopInfo.cpp | 290 +- 346 files changed, 18734 insertions(+), 8691 deletions(-) create mode 100644 clang/test/ClangScanDeps/Inputs/header.h create mode 100644 clang/test/ClangScanDeps/Inputs/header2.h create mode 100644 clang/test/ClangScanDeps/Inputs/regular_cdb.json create mode 100644 clang/test/ClangScanDeps/regular_cdb.cpp create mode 100644 clang/test/CodeGenCXX/ms-constexpr-var-template.cpp create mode 100644 clang/tools/clang-scan-deps/CMakeLists.txt create mode 100644 clang/tools/clang-scan-deps/ClangScanDeps.cpp create mode 100644 lld/test/COFF/Inputs/no-ipi-stream-obj.obj.yaml create mode 100644 lld/test/COFF/Inputs/no-ipi-stream-pdb.pdb.yaml create mode 100644 lld/test/COFF/allow-unknown-debug-info.test create mode 100644 lld/test/COFF/no-ipi-stream.test create mode 100644 lldb/lit/SymbolFile/DWARF/debug-types-line-tables.s create mode 100644 lldb/lit/SymbolFile/DWARF/forward-declarations.s copy llvm/include/llvm/{ToolDrivers/llvm-lib/LibDriver.h => Object/WindowsMachineF [...] create mode 100644 llvm/lib/Object/WindowsMachineFlag.cpp create mode 100644 llvm/test/Analysis/LoopAccessAnalysis/unsafe-and-rt-checks-conv [...] create mode 100644 llvm/test/CodeGen/AArch64/machine_cse_illegal_hoist.ll create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp8.ll create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll create mode 100644 llvm/test/CodeGen/AMDGPU/vcmpx-permlane-hazard.mir create mode 100644 llvm/test/DebugInfo/X86/live-debug-values-constprop.mir create mode 100644 llvm/test/LTO/X86/Inputs/list-dependent-libraries.ll create mode 100644 llvm/test/LTO/X86/list-dependent-libraries.ll create mode 100644 llvm/test/MC/AMDGPU/dpp-err.s create mode 100644 llvm/test/MC/AMDGPU/vop3-literal.s create mode 100644 llvm/test/MC/Mips/mips1/sd.s create mode 100644 llvm/test/Transforms/CodeGenPrepare/X86/vec-shift.ll create mode 100644 llvm/test/Transforms/HardwareLoops/ARM/calls.ll create mode 100644 llvm/test/Transforms/HardwareLoops/ARM/counter.ll create mode 100644 llvm/test/Transforms/HardwareLoops/ARM/do-rem.ll create mode 100644 llvm/test/Transforms/HardwareLoops/ARM/fp-emulation.ll copy llvm/test/{Analysis/CostModel => Transforms/HardwareLoops}/ARM/lit.local.cfg (100%) create mode 100644 llvm/test/Transforms/HardwareLoops/ARM/simple-do.ll create mode 100644 llvm/test/Transforms/HardwareLoops/ARM/structure.ll create mode 100644 llvm/test/Transforms/LoopDistribute/convergent-no-cross-partiti [...] create mode 100644 llvm/test/Transforms/LoopLoadElim/convergent.ll create mode 100644 llvm/test/Transforms/LoopVersioning/convergent.ll create mode 100644 llvm/test/Transforms/StackProtector/X86/captures.ll copy llvm/test/{Analysis/CostModel => Transforms/StackProtector}/X86/lit.local.cfg (100%) create mode 100644 llvm/test/tools/llvm-readobj/check-output-order.test create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/Mips/AsmParser/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/Mips/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/Mips/Disassembler/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/Mips/MCTargetDesc/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/Mips/TargetInfo/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/RISCV/AsmParser/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Disassembler/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/RISCV/MCTargetDesc/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/RISCV/TargetInfo/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/RISCV/Utils/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/SystemZ/AsmParser/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/SystemZ/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/SystemZ/Disassembler/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/SystemZ/MCTargetDesc/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/SystemZ/TargetInfo/BUILD.gn