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from e9458697d15 [AArch64] Refactor the scheduling predicates new 2cce0fbee18 [x86] add tests for LowerVSETCC with min/max; NFC new 760a278a3f5 [AMDGPU] Change the l1 flush instruction for AMDPAL/MESA3D.
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Summary of changes: lib/Target/AMDGPU/SIMemoryLegalizer.cpp | 8 +- ...-atomic-fence.ll => memory-legalizer-amdpal.ll} | 39 +-- ...-atomic-fence.ll => memory-legalizer-mesa3d.ll} | 39 +-- test/CodeGen/X86/vec_setcc-2.ll | 379 +++++++++++++++++++++ 4 files changed, 418 insertions(+), 47 deletions(-) copy test/CodeGen/AMDGPU/{memory-legalizer-atomic-fence.ll => memory-legalizer-amd [...] copy test/CodeGen/AMDGPU/{memory-legalizer-atomic-fence.ll => memory-legalizer-mes [...]