[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allnoconfig updated (6f9ac11e3960 -> 5a5219a0f961)

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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allnoconfig in repository toolchain/ci/llvm-project.

from 6f9ac11e3960 [CostModel][X86] Pull out X86/X64 scalar int arithmetric c [...] adds fd46ed3f397d [IR] Optimize no-op removal from AttributeSet (NFC) adds 05738ffcb87b [IR] Optimize no-op removal from AttributeList (NFC) adds fc01b9bdf8b5 [CostModel][X86] Align v4i64 MUL costs on AVX1 targets wit [...] adds b604301be355 [Driver] Support libc++ in MSVC adds c5638a71d805 [MinGW] Mark a number of library functions unavailable for [...] adds b4fd512c36ca [Windows] Use TerminateProcess to exit without running des [...] adds 5ff79f001feb Revert "[Driver] Support libc++ in MSVC" adds 0f298ec6ccc0 [ELF][test] Avoid local signature symbols for section grou [...] adds 6994bf7dadf5 [NFC][scudo] Move SKIP_ON_FUCHSIA to common header adds 0bccdf82f705 [NFC][scudo] Add releasePagesToOS test adds 887dda5dcdcf [NFC][scudo] Replace size_t with uptr adds edc2dca405ef [ARM] Add extra debug messages for gather/scatter lowering. NFC adds d4abbcfb0d4a [LoopUnroll] Add test for unrollable non-latch multi-exit (NFC) adds d65c32fb41b0 [LoopUnrollAndJam] Change LoopUnrollAndJamPass to LoopNest pass adds cb3bc9d81d05 [InstSimplify] add more tests for rem-mul-div; NFC adds f47575f83cea [gn build] (semi-manually) port 0bccdf82f705 adds e4ec5cc8eb84 [CostModel][X86] Align v2i64 MUL costs on SSE42+ targets w [...] adds 340c1133a250 Fix bugs URL for PR relocations adds 9a6eb4968e03 [mlir][doc] Fix links and indentation of mlir::ModuleOp de [...] adds ff8be66c0288 [AArch64] Use \t in AsmStreamer to match the prevailing style adds d426a8ce7efe [NFC][X86][Costmodel] Add tests with with masked loads/sto [...] adds 1e6630311c46 NFC: cleaned up and renamed scalable-vf-analysis.ll -> sca [...] adds 30c413cda010 [SPARC] recognize the "rd %pc, reg" special form adds fc82507c895a [AArch64][MC] Remove unneeded "in .xxx directive" from dia [...] adds 81467f500f6a [IR] Add a Location to BlockArgument adds 15b108442fc8 [LoopUnroll] Add test for partial unrolling again non-latc [...] adds cb1511645170 [libc++] use more early returns for consistency adds c2f819af73c5 [MC] Refactor MCObjectFileInfo initialization and allow ta [...] adds 93d1e5822ed6 [NFC][scudo] Enforce header size alignment adds 766ad7d0aa6f [OpenMP][OMPIRBuilder]Adding support for `omp atomic` adds 249b40b55895 [AArch64] Delete unneeded fixup_aarch64_ldr_pcrel_imm19 VK [...] adds b43bb33eb522 [NFC] Removing leftover debug code adds 99d45ed22fd9 [Debug-Info] handle DW_TAG_rvalue_reference_type at strict DWARF. adds 8387d74c2077 [Attributor][NFC] Rerun update_test_checks script on Attri [...] adds cb511531b924 [Attributor][NFC] Clang format the Attributor source files adds 2bc51d39db7a [Attributor][NFC] Add helpful debug outputs adds 9098fc9f427f [Attributor][NFC] Precommit test case with branch on undef adds 5cdc29f79582 [Attributor][FIX] Ensure we replace undef if we see the fi [...] adds e93ac1e2de66 [Attributor][FIX] Account for undef in the constant value lattice adds 000a05fd1ab3 [mlir] Normalize dynamic memrefs with a map of tiled-layout. adds 9c21ddb70ab5 [MLIR] Make MLIR cmake variable names consistent adds 57501e512e86 [lld][MachO] Fix code formatting adds c65bb760df1f [MLIR] [Python] Add Operation.parent adds 1ba2929bb82b [Attributor] Be more careful to not disturb the CG outside [...] adds 4878d7341969 [Attributor] Deal with address spaces gracefully adds 55e9c282129e [Attributor] Teach AAIsDead about undef values adds 6caea8a7fa62 [Attributor] Introduce a helper do deal with constant type [...] adds 058f384ae94a [analyzer] Correctly propagate ConstructionContextLayer th [...] adds 86497785d540 [VectorCombine] Scalarize vector load/extract. adds 486d6d2b8ef7 [Debug-Info]update section name to match AIX behaviour; nfc adds 486110eb4134 [AMDGPU][Libomptarget] Remove global KernelNameMap adds 243e58868176 [CostModel][X86] Improve accuracy of vXi64 MUL costs on AV [...] adds 94d54155e2f3 Revert "[VectorCombine] Scalarize vector load/extract." adds 0f140ce33d64 flang: include limits adds aa3dac95edbf [LoopIdiom] 'logical right shift until zero': the value mu [...] adds 32bee42719ad [NFCI][LoopIdiom] 'left-shift until bittest': assert that [...] adds 5c4a5daf293c [debuginfo-tests] Stop using installed LLDB and remove redundancy adds 7a211ed110a7 [RISCV] Prevent store combining from infinitely looping adds 587408c199e8 [MLIR] Drop old cmake var names adds 6cc78b9245bc [ARM] Fix inline memcpy trip count sequence adds 53c42f7700e8 [ARM] Ensure WLS preheader blocks have branches during mem [...] adds 4e8c28b6fbec Recommit "[VectorCombine] Scalarize vector load/extract." adds 543406a69b33 [ARM] Allow findLoopPreheader to return headers with multi [...] adds 237c6924bd46 [OpenCL] Add clang extension for bit-fields. adds 4bc14be25967 [AArch64][SVE] Improve codegen for fixed length vector concat adds e40513252a25 [AArch64][SVE] Add fixed length codegen for FP_ROUND/FP_EXTEND adds 626e9641a2f5 [OpenCL] Fix test by adding SPIR triple adds e9d97d7d9d90 [VPlan] Add mayReadOrWriteMemory & friends. adds d251d6f8128b [VectorCombine] Fix load extract scalarization tests with [...] adds 1ad4f887bd76 [CostModel][X86] Improve accuracy of vector non-uniform sh [...] adds 5ccc79dc38b2 [OpenCL][Docs] Minor update to OpenCL 3.0 adds 42a9c0c80c23 [lldb] Reland "Fix UB in half2float" to fix the ubsan bot. adds 54c2687292da [lldb] Introduce createTestTarget for creating a valid tar [...] adds 5d7c1d8f33c3 [lldb] Readd deleted variable in the sample test adds 65d3dd7c883f [VPlan] Add first VPlan version of sinkScalarOperands. adds 3dd206367116 [ConstProp] add tests for vector reductions with poison el [...] adds a0e71f1832d1 [ConstProp] propagate poison from vector reduction element [...] adds 60b33ebe8b9c [CostModel][X86] Regenerate sse-itoi.ll test checks adds 505933a48920 [NVPTX] Fix lowering of frem for negative values adds 7b2606b0b64e [libc++][doc] Update format paper status. adds dcaca7206e36 [CostModel][X86] Add missing SSE41 v2iX sext/zext costs adds 7f2f0247f855 Remark was added to clang tooling Diagnostic adds 971a2ae8b386 [LoopUnroll] Regenerate test checks (NFC) adds a832e83bcbad [LoopUnroll] Add additional trip multiple test (NFC) adds e42636d3c1a4 [CVP] Add additional test for phi common val transform (NFC) adds 20c1f94220d9 [scudo] Separate Fuchsia & Default SizeClassMap adds 1ceff40df0a4 [mlir][tosa] Align tensor rank specifications with current spec adds 034651498429 [llvm] Revert align attr test in test/Bitcode/attribute-3.3.ll adds 4cba0a4f11e4 CoroSplit: Replace ad-hoc implementation of reachability w [...] adds 694068d0db43 [Remarks] Look through inttoptr/ptrtoint for -ftrivial-aut [...] adds d35bd98651ec [mlir][doc] Fix links and references in top level docs directory adds d70e9195a333 [RISCV] Optimize getVLENFactoredAmount function. adds c666208f6380 [X86][Costmodel] getMaskedMemoryOpCost(): don't scalarize [...] adds 095e91c9737b [Remarks] Add analysis remarks for memset/memcpy/memmove lengths adds 6435ca4e2b9b [NFC][scudo] Small test cleanup adds f55a7335065c [gn build] Port 095e91c9737b adds 3c0735c6d8d0 [X86] Call insertDAGNode on trunc/zext created in tryShift [...] adds bda6e5bee04c [NFC] remove explicit default value for strboolattr attrib [...] adds 4ab3041acbdc Revert "[NFC] remove explicit default value for strboolatt [...] adds ba51da820e4d [lldb] Add missing mutex guards to TargetList::CreateTarget adds 96aa0a4115bc Enable MLIR Python bindings for TOSA. adds 9a75c06cd9d9 [CUDA] Work around compatibility issue with libstdc++ 11.1.0 adds a11cb10a3691 [dfsan] Add function that prints origin stack trace to buffer adds a64ebb863727 [WebAssembly] Add NullifyDebugValueLists pass adds b2c70bd21ace [gn build] Port a64ebb863727 adds b510e4cf1b96 [RISCV] Add a vsetvli insert pass that can be extended to [...] adds e7a268f9efc2 [gn build] Port b510e4cf1b96 adds d3e6c2ddc3d3 Surface clone APIs in CAPI adds 7cd07d339022 fix up test from D102742 adds 3b51b51877ee [CSSPGO][llvm-profgen] Report samples for untrackable frames. adds 64716b2c39c1 [GreedyPatternRewriter] Introduce a config object that all [...] adds 00bfde723b64 [NFC][CSSPGO]llvm-profge] Fix Build warning dueo to an att [...] adds 97a71ae62591 [flang][cmake] Set the default for FLANG_BUILD_NEW_DRIVER [...] adds 4c0b0de904a5 [lldb] Move ClangModulesDeclVendor ownership to ClangPersi [...] adds 13dd65b3a1a3 Do not create LLVM IR `constant`s for objects with dynamic [...] adds fc9248877d07 [libc++] Assume that __wrap_iter always wraps a fancy pointer. adds bec6b0225211 [compiler-rt][scudo] Fix sign-compare warnings adds dae90386116f [mlir] Lower sm version for TensorCore intergration tests adds 99155e913e9b [lldb][NFC] Remove unused header from Target adds ca17b26d4d7a [libomptarget] [amdgpu] Fix copy-paste error setting NumTh [...] adds 95cefacfe1c1 [OpenMP] Fix crashing critical section with hint clause adds b2cd89501164 [SLP] Fix "gathering" of insertelement instructions adds 60c735d409bf [mlir-opt] Don't enable `printOpOnDiagnostic` if it was ex [...] adds 1fb6a0307240 [scudo] Add unmapTestOnly() to secondary. adds de6164ec4da0 PR50456: Properly handle multiple escaped newlines in a '*/'. adds aab488ac2a56 [dsymutil] Compute the output location once per input file (NFC) adds 7bf7b80b1958 [dsymutil] Use EXIT_SUCCESS and EXIT_FAILURE (NFC) adds 1ec03f3de5d5 [dsymutil] Emit an error when the Mach-O exceeds the 4GB limit. adds f5bde3d476c2 [NFC][scudo] Avoid cast in test adds 676a789a5bc6 [NFC][OMP] Fix 'unused' warning adds a08673d04a99 Add a range-based wrapper for std::unique(begin, end, bina [...] adds e5b66a373414 lld-coff: Simplify a few lambda uses after 7975dd033cb9 adds a0169b2ed198 [NFC][scudo] Add paramenters DCHECKs adds d881319cc560 Revert "Do not create LLVM IR `constant`s for objects with [...] adds 96d70f4d289b [libomptarget] [amdgpu] Added LDS usage to the kernel trace adds e77d24f70a8a Revert "[LoopUnrollAndJam] Change LoopUnrollAndJamPass to [...] adds a2ae14514a26 Making Instrumentation aware of LoopNest Pass adds 2f6516605615 [lld:elf] Weaken the requirement for a computed binding to [...] adds a5a3efa82a77 [Sema] Always search the full function scope context if a [...] adds 6685a3f3e4c4 [cfe] Support target-specific escaped character in inline asm adds 82ad2b6e94b6 [JITLink] Enable creation and management of mutable block [...] adds 90d784053f07 AMDGPU/GlobalISel: Legalize G_[SU]DIVREM instructions adds ce245246043d [Test] Add test for unreachable backedge with duplicating [...] adds 2531fd70d19a [LoopDeletion] Break backedge if we can prove that the loo [...] adds 0ab14f19685e [JITLink] Suppress expect-death test in release mode. adds bf77317049a8 [RISCV] Optimize xor/or with immediate in the zbs extension adds db8af0f21dc9 [analyzer][ctu] Avoid parsing invocation list again and ag [...] adds f05b70c23687 Revert "[analyzer][ctu] Avoid parsing invocation list agai [...] adds ff30436dc5e5 [GlobalISel] Fix MachineIRBuilder not using the DstOp argu [...] adds d59b4acf80d5 [analyzer][ctu] Reland "Avoid parsing invocation list agai [...] adds 75492e20fb7c [libomptarget][nfc] Accept callable for hsa iterate_symbols adds 10c2e261598a [TRE] Reland: allow TRE for non-capturing calls. adds 5017b0f88b81 [mlir] Check only last dim stride in transfer op lowering adds 5f4d383a5935 [clang][ARM] Remove non-existent arm1136jz-s CPU adds 6359842bc088 [GlobalISel] Silence unused variable warning in Release bu [...] adds 0cd2629d97e7 [llvm][ARM] Remove non-existent arm1176j-s CPU adds de7729d47a8b [clang][ARM] Remove non-existent arm9312 CPU adds 44843e2a046e [ARM][NEON] Combine base address updates for vld1x intrinsics adds 78eaff2ef8a9 [llvm-exegesis] Loop unrolling for loop snippet repetitor mode adds 8f681d5b272e [IR] Allow Value::replaceUsesWithIf() to process constants adds 8b656b88462f [lldb] Re-eanble and rewrite TestCPPStaticMembers adds 3bf96b0329be [lldb] Disable minimal import mode for RecordDecls that ba [...] adds 536447eb203c [AArch64] Add tests for lowering of vector load + single extract. adds 9ccdc2e23be1 [mlir] Fold memref.dim of OffsetSizeAndStrideOpInterface outputs adds eff269fc9f8b [MLIR][Affine][LICM] Mark users of `iter_args` variant adds e3b8e6d48251 [AMDGPU] Remove dead declaration (NFC). adds 68ef68f8ac5c [CostModel][X86] Improve accuracy of vXi8/vXi16 vector non [...] adds ed14062be0c1 Fix MSVC "truncation of constant value" warning. NFCI. adds ca6df734069a [NFC][CodeGenOptions] Refactor checking SanitizeCoverage options adds 85feebf5a340 [NFC][SanitizeCoverage] Test always_inline functions work adds 280333021e95 [SanitizeCoverage] Add support for NoSanitizeCoverage func [...] adds a3a95286a73f [lldb] X-FAIL TestCPPStaticMembers on Windows adds 1dee479ff632 [lldb][NFC] Remove misleading ModulePass base class for IR [...] adds 8a0e4ae7727d [NFC][LoopIdiom] Add tests for 'arithmetic right-shift unt [...] adds f1c5f78d3813 [LoopIdiom] Support 'arithmetic right-shift until zero' idiom adds ae58cf5f45a9 [lldb] Fix that LLDB doesn't print NaN's sign on Darwin adds c2c2be44ed64 [Dexter] Add DexDeclareFile command to Dexter adds f3c577ed38e5 [AArch64][SVE] Add fixed length codegen for FP_TO_{S,U}INT [...] adds b0d68c714141 [AMDGPU][Libomptarget] Mark lambda_by_value test as XFAIL adds 980e0107a169 [NFC][LoopIdiom] Add tests for 'left-shift until zero' idiom adds 8f4db14d1c8f [LoopIdiom] Support 'left-shift until zero' idiom adds 4b55102aff29 [dexter] Change --source-root-dir and add --debugger-use-r [...] adds 400a9d35015b [NFC] [Coroutines] Remove unused variable: UnreachableCache adds fc0acd10c0ab [Dexter] Remove erroneously added diff file adds f718a53d7e13 [mlir] Disallow certain transfer ops in VectorToSCF adds 06eae35689ee [InstCombine] add tests for cast-of-shuffle; NFC adds 0bab0f616119 [InstCombine] canonicalize cast before unary shuffle adds 5e2a302e37f1 [mlir][doc] Fix links and references in documentation of R [...] adds 6054bfa8132a [mlir] Support buffer hoisting on allocas adds 9b99336d5daf [mlir][doc] Fix links and references in documentation of Dialects adds 575e2aff5574 [VectorCombine] Use constant range info for index scalariz [...] adds 16e78ec0b43c [Headers][WASM] adjust test that runs the optimizer; NFC adds a92376d2971a [VectorCombine] Add test that combines load & store scalar [...] adds 8607a023574f [InstSimplify] Transform X * Y % Y --> 0 adds 67c3707b31b4 [AMDGPU] More accurate names for dpp operand types adds 8427053f8192 [clang][ARM] When handling multiple -mimplicit-it mark all [...] adds 21aa107eb79f Reland "Do not create LLVM IR `constant`s for objects with [...] adds e02a4f6bda10 [X86][SSE] Regenerate vector shift codegen tests. NFCI. adds c909dddddacf [CostModel][X86] Improve accuracy of vXi64 vector non-unif [...] adds b67ea3d0c90c [AMDGPU] Allow no-modifier operands in cvtDPP adds 148c19a5b52b [libc++] [test] Format some C++20 iterator_traits tests. NFCI. adds bb523cc82bc5 [libc++] [test] Make iter_difference_t.pass.cpp into a .co [...] adds 993f38d0a794 [SystemZ][z/OS] Implement getHostCPUName for z/OS adds 6a2ea84600ba BPF: Add more relocation kinds adds e77cb4ae63e9 [SystemZ] Return true from preferZeroCompareBranch(). adds 1872283457fc [scudo] Rework dieOnMapUnmapError adds 09b5ebc07b47 [mlir][CAPI][test] Change casts and fprintf format strings [...] adds 8e83ff58c907 [VectorCombine] Remove unneeded InsertPointGuard (NFCI). adds def6269779af [CostModel][X86] Improve accuracy of 256-bit non-uniform v [...] adds 57250f2f3c6d [X86][Atom] Fix vector PSHUFB resource/throughputs adds 882e4cbd7477 [AIX][AsmPrinter] Print Symbol in comments for TOC load adds ca446e58c841 [sparse][mlir] simplify sparse runtime support library adds d95a4b950dd3 [libc++] Try to fix the oss-fuzz failure adds a47b2d4567ac [SCEV] Remove unused parameter from computeBECount [NFC] adds 472c009139ea [llvm-reduce] Exit when input module is malformed adds aabca2d1da11 [SCEV] Cleanup doesIVOverflowOnX checks [NFC] adds 0bbb502daa90 Revert "[OpaquePtr] Make atomicrmw work with opaque pointers" adds ae1bc9ebf3a0 [InstCombine] avoid infinite loop from vector select transforms adds 18c544470289 [AMDGPU][GlobalISel] Stop foldInsertEltToCmpSelect from ch [...] adds d3495ffa5eba [flang] Fix recent regression (proc. dummy arg on ENTRY) adds fa14fd30ce67 [CSSPGO][llvm-profgen] Change default cold threshold for c [...] adds 6779fcb26f96 [mlir][linalg] Update Linalg.md (NFC). adds e7c839b1925f [Hexagon] Improve argument packing in vector shuffle selection adds 6a84d374d7df [scudo] Consistent setting of SCUDO_DEBUG adds 8e30b55c82cc [scudo] Fix CHECK implementation adds 149e018d1264 [LoopIdiom] 'arithmetic right-shift until zero': don't tur [...] adds 2ea6e13bf818 [mlir] Add an optional distributionTypes attribute to Tile [...] adds dfd1bbd00ac0 [Matrix] Factor and distribute transposes across multiplies adds 31d1ae79752d [mlir][doc] Fix links and references in documentation of T [...] adds ca7eaa0a5493 [InstSimplify] allow undef element match in vector select [...] adds 8de4db697f28 [AMDGPU] Lower kernel LDS into a sorted structure adds 1bf3fd9bb55a [mlir] Use unique_function in AbstractOperation fields adds 4df3b60199ef Add pre-commit tests for [D102215](https://reviews.llvm.or [...] adds c9dd29925f0c [SelectionDAG] Propagate scoped AA metadata when lowering [...] adds 9c91614959f3 [CVP] Guard against poison in common phi value transform ( [...] adds d1e5f046cc9c Revert "[NFC][scudo] Let disableMemoryTagChecksTestOnly to fail" adds 8535834ef789 [lld-macho][nfc] Misc code cleanup adds 9cc0d893f7fc [lld-macho][nfc] clang-format everything adds 33706191d88d [lld-macho][nfc] Rename MergedOutputSection to ConcatOutpu [...] adds fcab06bd85d1 [lld-macho][nfc] Sort OutputSections based on explicit ord [...] adds 7599e98ab790 [lld-macho][nfc] Remove unnecessary parameterization of se [...] adds 9ba21911db30 [gn build] Port 33706191d88d adds 6300c37a461b [SCEV] Cache operands used in BEInfo (NFC) adds 5bc644aeca8f Revert "[AIX] Avoid structor alias; die before bad alias codegen" adds d2d4f1680665 [Matrix] Use LLVM_DEBUG for a debug flag adds dc2aa4767601 [mlir] Add a copy constructor to FailureOr adds 2367a7bdab36 [JITLink][MachO][arm64] Use a more descriptive test name. adds 249cd9dd6002 [JITLink][MachO][arm64] Build GOT entries for defined symb [...] adds f44f2e0afca9 [NFC] Fix 'unused' warning adds 3975e3277f2b [AMDGPU] Fix unused variable warning. NFC. adds 6c35991ca024 [TSAN][CMake] Add support to run lit on individual tests adds dce91f247d75 [docs] Explain address spaces a bit more in opaque pointers doc adds 3a678fe3e29f [sanitizer][test] s/A<10>/A<7>/ to fix "WARNING: Symbolize [...] adds 6a2869cf1e5b [Hexagon] Remove unused function from HexagonISelDAGToDAGHVX.cpp adds a2a65a5bae3c [docs] [CMake] Change recommendations for how to use LLVM_ [...] adds 3a6be27978aa [libcxx] Make the visibility attributes consistent for __n [...] adds ec402f1d5da0 [libcxx] [test] Explain an XFAIL LIBCXX-WINDOWS-FIXME and [...] adds a051bbb53f6d [libcxxabi] Use ASan interface header for declaration. NFC adds 2f23f9e641e3 [Canonicalize] Fully parameterize the pass based on config [...] adds bc56620b8b76 [flang] Implement checks for defined input/output procedures adds a004da0d77c4 [Canonicalize] Switch the default setting to "top down". adds 68e45962531a [libcxx] Fix the function name in exceptions from create_d [...] adds d42d9e10b606 [libc++] [P0619] Hide not1 and not2 under _LIBCPP_ENABLE_C [...] adds 832c99f72772 Revert "[LoopDeletion] Break backedge if we can prove that [...] adds b426b45d1017 [Internalize] Rename instead of removal if a to-be-interna [...] adds 8cc437a8a16e [ARM] Extra predicated tests for VMULH. NFC adds 66781efd0acf [libc++] Install GCC 11 on CI builders adds df005fa364ae [libomptarget][nfc] Move hostcall required test to rtl adds a6a57f03be40 [Toy] Update tests to pass with top-down canonicalize pass. NFC adds aaa2982d7191 [MLIR Core] Cache the empty StringAttr like we do for empt [...] adds e14696bfd740 [NFC][SCUDO] Fix unittest for -gtest_repeat=10 adds e5d227e95ca1 [NFC][MLIR][TOSA] Replaced tosa linalg.indexed_generic low [...] adds dd2be15ff91a [gcov] Silence warning: comparison of integers of different signs adds 20c9a44ac016 [benchmark] Silence 'suggest override' and 'missing overri [...] adds 52ac1147713d LLVM Detailed IR tests for introduction of flag -fsanitize [...] adds e67259531d73 [sanitizer] Let glibc aarch64 use O(1) GetTls adds ad90a6be219a [OpaquePtr] Create new bitcode encoding for atomicrmw adds d35fe04fa35a [LTT] Handle merged llvm.assume when dropping type tests adds bbcb3433d4e8 [lldb] Avoid format string in LLDB_SCOPED_TIMER adds 564eb20e0dee Revert "[lldb] Avoid format string in LLDB_SCOPED_TIMER" adds 1202f559bdee [OpaquePtr] Make atomicrmw work with opaque pointers adds 36d0fdf9ac3b [libcxx][iterator] adds `std::ranges::advance` adds dde123993f50 [gn build] Port 36d0fdf9ac3b adds 9ef66ed43758 [clang-format][NFC] correctly sort StatementAttributeLike- [...] adds 2cf0e52b8548 [ARM] Add patterns for vmulh adds bf809cd165f4 [NFC][object] Change the input parameter of the method isD [...] adds b99f892b025b [mlir] Fold complex.re(complex.create) and complex.im(comp [...] adds 9c766f4090d1 [InstCombine] Fold extractelement + vector GEP with one use adds cb65419b1ac0 [mlir] Simplify folding code (NFC) adds 91e0cb6598f4 [mlir] LocalAliasAnalysis: Assume allocation scope to func [...] adds a3b3f7e63198 [HIP] Adjust check in hip-include-path.hip test case adds 70d8365e3336 Fix warning introduced by 9c766f4090d19e3e2f56e87164177f8c [...] adds 8c86161a0be2 [NFC][X86] clang-format X86TTIImpl::getInterleavedMemoryOp [...] adds 794fb5482efc [Test] Add test on unrolling to make sure it won't fail adds 66978466baef [X86][Atom] Fix vector variable shift resource/throughputs adds 942e01de896a [CostModel][X86] Remove old testshift* tests adds 8c5ac18d7165 AArch64: support post-indexed stores to bfloat types. adds 7ee863b8ebfa [Test] Add simplified versions of tests for loop deletion [...] adds 7e27e4273d09 [RISCV] Pre-commit fixed-length mask vselect tests adds 7386ad4e9e26 Revert "[AMDGPU][GlobalISel] Stop foldInsertEltToCmpSelect [...] adds 9601849984a7 [AMDGPU][GlobalISel] Stop foldInsertEltToCmpSelect from ch [...] adds 6b0fe3c63b46 [NFC] Add CHECK lines for unordered FP reductions adds 7648b6978e55 [AMDGPU][Libomptarget] Move Kernel/Symbol info tables to R [...] adds 2a41d702be47 [SCEV] Add tests with signed predicates for applyLoopGuards. adds 21aec4fdc5de [X86][SLM] Fix vector PSHUFB + variable shift resource/thr [...] adds 76e47d4887f4 [lldb][NFC] Use C++ versions of the deprecated C standard [...] adds cc8661ac4a20 [AMDGPU][Libomptarget] Delete g_atmi_initialized adds a2d6ef587653 [AMDGPU][Libomptarget] Inline atmi_init/atmi_finalize adds e79e8041c5ff [MC][NFCI] Factor out ELF section unique ID calculation adds 165321b3d27d [MC][ELF] Emit unique sections for different flags adds cebdf5d8465c [Docs] Updated the content of getting started documentatio [...] adds ab8c44112c48 [MC] Move elf-unique-sections-by-flags.ll to X86/ adds ba0fe85ec0e9 [OpenCL] Include header for atomic-ops test adds 5fb58d45989d [Test] Add Loop Deletion test with irreducible CFG adds 8ac66d61eab3 [AArch64] Generate LD1 for anyext i8 or i16 vector load adds dee46d08293f [mlir] Fold complex.create(complex.re(op), complex.im(op)) adds 43d2e51c2e86 Return "[LoopDeletion] Break backedge if we can prove that [...] adds 0de553dce009 Revert "Return "[LoopDeletion] Break backedge if we can pr [...] adds b70fe92f08e8 [InstCombine] avoid 'tmp' usage in test file; NFC adds 9e43b1e9a1f3 [InstCombine] avoid 'tmp' usage in test files; NFC adds 01120fe5b398 [InstCombine] add fmul tests with shared operand; NFC adds be1a23203b1d Return "[LoopDeletion] Break backedge if we can prove that [...] adds 9f76a8526010 [LoopVectorize] Enable strict reductions when allowReorder [...] adds 8be23ed3f02a [SLP][NFC]Add a test for multiple uses of insertelement in [...] adds 63cc9fd579b2 [MCA][InOrderIssueStage] Fix LastWriteBackCycle computation. adds 629e2b344225 [X86][SSE] Regenerate some tests to expose the rip relativ [...] adds a409fcddaed9 [ARM] Extra test for reverted WLS memset. NFC adds b6f6501b2412 [CostModel][AArch64] Add tests for bitreverse. NFC. adds 4ed2b6cccdef [X86][AMX] Fix a bug on tile config. adds a8f75d497daa [clang-cl] Add driver support for /std:c++20 and bump /std [...] adds b37a2fcd8d7c [SystemZ][z/OS] Validate symbol names for z/OS for printin [...] adds fcd32d62c067 [AMDGPU] Fix function pointer argument bug in AMDGPU Propa [...] adds 1bc0e857bfd4 [SystemZ][z/OS] Enable the AllowAtInName attribute for the [...] adds 5f500d73cd1a [MCA] Add a test for PR50483. NFC adds 8f79203a22d8 [clangd] New ParsingCallback for semantics changes adds d058262b1471 [SystemZ] Support i128 inline asm operands. adds 31191e15b6e3 [libc++] Fix concepts tests with GCC adds 9cc2181ec388 [unroll] Use value domain for symbolic execution based cost model adds 1005ef445dbf [mlir][openacc] Translate UpdateOp to LLVM IR adds 16342e39947b [libc++][NFC] Move format_error to its own header. adds deb6a0f94a24 [gn build] Port 16342e39947b adds de9df3f5b952 [libc++][NFC] Move basic_format_parse_context to its own header. adds 74a89cba8ced [mlir] Add `distributionTypes` to LinalgTilingOptions. adds 963495f0d4b5 [libc++][format] Adds availability macros for std::format. adds e47311d88899 [gn build] Port de9df3f5b952 adds 07f59baad634 [libomptarget][nfc][amdgpu] Remove atmi_status_t type adds ea91a8cbab93 [AMDGPU][NFC] Remove non-existing function header adds 1b47a3de48d2 [RISCV] Enable cross basic block aware vsetvli insertion adds d28bc54ff44a [lldb] Remove cache in get_demangled_name_without_arguments adds adf1561d6ce8 [libunwind] Inform ASan that resumption is noreturn adds 969eefd98e0f [lldb] add LLDB_SKIP_DSYM option adds a0bd6105d806 [DebugInfo] Limit the number of values that may be referen [...] adds 27d3528acf8a [SLP]Fix vectorization of insertelements with multiple uses. adds a45877eea8c4 [scudo] Get rid of initLinkerInitialized adds b2c7ac874f51 [RISCV] Don't propagate VL/VTYPE across inline assembly in [...] adds d63d662d3cc5 [RISCV] Remove --riscv-no-aliases from RVV tests adds 6911114d8cbe [Scudo] Make -fsanitize=scudo use standalone. Migrate tests. adds fb14577d0c48 [SCEV] Extract out a helper for computing trip multiples adds 9065118b6463 [RISCV] Optimize SEW=64 shifts by splat on RV32. adds 921d3f7af09c [SCEV] Add a utility for converting from "exit count" to " [...] adds 73a117953599 [llvm-mc] Add -M to replace -riscv-no-aliases and -riscv-a [...] adds f7c5c0d87b8a Revert "[Scudo] Make -fsanitize=scudo use standalone. Migr [...] adds e5eff533f761 [mlir] Make StripDebugInfo strip out block arguments locs adds 9306bb638ff2 [SCEV] Generalize getSmallConstantTripCount(L) for multipl [...] adds c5c1ec7945ff [libomptarget][nfc][amdgpu] Refactor uses of KernelInfoTable adds 13c6568c6e20 [AMDGPU][MC][GFX90A] Corrected DS_GWS opcodes adds 5e2facb92284 [AMDGPU] Fix kernel LDS lowering for constants adds 5bfe06ad3590 [SimplifyCFG] Use make_early_inc_range() while deleting in [...] adds 5dd86aadf0b0 [WebAssembly] Add TargetInstrInfo::getCalleeOperand adds ff08c3468fa4 [SCEV] Compute trip multiple for multiple exit loops adds 78c9796f963f [NFC][X86][Costmodel] Add some more interleaved load/store [...] adds ab7f26dc13f2 [NFC][Codegen][X86] Add a few more interleaved load/store [...] adds 2fdf8bbd19c3 [libomptarget][nfc][amdgpu] Factor out setting upper bounds adds 3b9a1bb1af90 [pstl] Fix -Wundef errors in the test suite adds 8496fc2ec804 [DebugInstrRef][1/3] Track PHI values through register allocation adds 6c92215e07f4 [CostModel][AArch64] Add floating point arithmetic tests. NFC. adds c4823cc5db69 [pstl] Workaround more errors in the test suite adds cc622aee3023 [libc++] Add a job testing on GCC 11 adds 1494fa694338 Update documentation for InlineModel features. adds e4fc8c3de8f3 [RISCV][NFC] Fix some whitespace nits in MC test RUN lines adds fdf10e6197d0 [RISCV] Use X0 as destination of inserted vsetvli when possible. adds 6505c630407c [llvm-readobj] Optimize printing stack sizes to linear time. adds c4a41cd77c15 Refactor mutation strategies into a standalone library adds 367cb9fbd651 [libcxx][docs] Take mutex for common_iterator, common_view [...] adds 5852582532b3 [AArch64] Support llvm-mc/llvm-objdump -M no-aliases adds 5f8810d7b463 [flang][docs] Initial documentation for the Fortran LLVM T [...] adds 52123c96c016 [libcxx][nfc] Fix the ASAN bots: update expected.pass.cpp. adds 1032886a41c6 [libFuzzer] Add missing FuzzerBuiltinsMsvc.h include. adds 0283abee5c87 [lldb] Fix gnu_libstdcpp's update methods adds 97f15eda4f26 [mlir][python] Provide "all passes" registration module in Python adds fd0a2f75ff4f Revert "Refactor mutation strategies into a standalone library" adds 94d67b51dd02 [mlir] Add n-D vector lowering to LLVM for cast ops adds 2fe987e6bace [scudo] Build scudo_standalone on Android and Fuchsia. adds 79c09d5ee1e9 [tests] Add some basic coverage of multiple exit unrolling adds 002f5e158d08 [Hexagon] Restore handling of expanding shuffles adds b5c3f17e70e7 [MLIR] Add support for empty IVs to affine.parallel adds 2dba40561a28 Revert "[scudo] Build scudo_standalone on Android and Fuchsia." adds 74edfb28053d [AArch64][GlobalISel] Legalize non-power-of-2 vector eleme [...] adds caae570978c4 Emit correct location lists with basic block sections. adds 324af79dbc60 [GlobalISel] Don't emit lost debug location remarks when l [...] adds 95ce0def7c98 [ORC-RT] Add endianness support to the ORC runtime. adds 08d31ff4f45f Fix unit test after 324af79dbc6066 adds a4b61c82cf1a The compiler is crashing when compiling a coroutine intrin [...] adds 4d26f41f76c4 [RS4GC] Introduce intrinsics to get base ptr and offset adds 0ce58c52d50b [Fuchsia][CMake] Add missing include path. adds 8d2576272066 Fix non-global-value-max-name-size not considered by LLParser adds 857fa7b7b187 [libcxx][iterator] adds `std::ranges::next` adds 0dc7fd1bc167 [libcxx][iterator] adds `std::ranges::prev` adds 77274258e2d4 [gn build] Port 0dc7fd1bc167 adds cc3db8dbdf51 [gn build] Port 857fa7b7b187 adds d82f2a123f9c [llvm-objdump] Print the DEBUG type under `--section-headers`. adds b0b2bf3b5da9 [NFCI][LoopDeletion] Only query SCEV about loop successor [...] adds 59d938e649e6 [NFC] Formatting fix adds 51d334a845a0 [NFCI] Lazily evaluate SCEVs of PHIs adds 281ee4291110 [mlir] Add a pass to distribute linalg::TiledLoopOp. adds 3f85e124f6b7 [docs] llvm-objdump: Mention -M no-aliases is supported on [...] adds 62686a47a448 [mlir] Add TestLinalgDistribution.cpp to cmake build. adds 9f39ba13b596 [GlobalISel] Implement splitting of G_SHUFFLE_VECTOR. adds c467585682dc [NFC] Reuse existing variables instead of re-requesting su [...] adds 7d418dadf6b1 [NFCI][LoopDeletion] Do not call complex analysis for know [...] adds 108ca7a7e73c [mlir] Support dialect-wide canonicalization pattern registration adds 0bb60dbe34e4 [AMDGPU][GlobalISel] Allow amdgpu_gfx calling conv adds 772b58a641af [SelectionDAG][RISCV] Don't unroll 0/1-type bool VSELECTs adds 9a4506e7591f [Matrix] Include matrix pipeline for new PM in new-pm-defa [...] adds 2ae58431873d [lit][test] Improve testing of use_llvm_tool adds 1546c52d9712 Add triples to a bunch of x86-specific tests that currentl [...] adds 7faffdeb48d3 [clang-format] [NFC] realign documentation in Format.h... adds 1d5b976b7783 [ARM] Extra test for reverted WLS memset. NFC adds ea4c5fb04c6d [OpenMP]Add support for workshare loop modifier in lowering adds 8b79dfb302ac [AMDGPU][Libomptarget][NFC] Remove atmi_mem_place_t adds 86627be23312 Revert "[OpenMP]Add support for workshare loop modifier in [...] adds 5f2d4b23b4c2 Add --quiet option to llvm-gsymutil to suppress output of [...] adds ce4f99e7f272 [mlir][Linalg] Add comprehensive bufferization support for [...] adds 8edd3464afbf Add support for #elifdef and #elifndef adds 38641ddf3e56 [VPlan] Do not sink uniform recipes in sinkScalarOperands. adds 8c73a31c1175 [RISCV] Allow passing fixed-length vectors via the stack adds b7101e218c21 [DAGCombine][RISCV] Don't try to trunc-store combined vect [...] adds ce276b7a6448 Fix -Wswitch warning; NFC adds 8a203ac6d220 AMDGPU/GlobalISel: Remove redundant parameter from function adds ee359000898c AMDGPU/GlobalISel: Lower constant-32-bit zextload/sextload [...] adds 758f51c14ac3 Speculatively fix a -Woverloaded-virtual diagnostic; NFC adds caf86d2959d5 Speculatively fix this harder and with improved spelling c [...] adds eba69b59d1a3 Reimplement __builtin_unique_stable_name- adds 3879fcdb8733 Reuse temporary files for print-changed=diff adds 023fbf3df32d Correct the 'KEYALL' mask. adds 96ef4f4a2491 Hopefully fix the Clang sphinx doc build. adds 9091ecdae029 [OpenMP]Add support for workshare loop modifier in lowering adds 5a80dc498818 [VP][SelectionDAG] Add a target-configurable EVL operand type adds 767d34e3bddd Disable misc-no-recursion checking in Clang adds 808dc6f8663c VirtRegMap: Preserve LiveDebugVariables adds aae7eb809e41 [Flang][Openmp] Fortran specific semantic checks for Alloc [...] adds 85f5272ffc58 [OpenCL][NFC] Fix typos in test adds e49d6e16235a [X86][SSE] Regenerate some tests to expose the rip relativ [...] adds fe8d97cbe5ec [CostModel][X86] AVX512 truncation ops are slower than cos [...] adds 34046de04297 AMDGPU/GlobalISel: Fix broken test run line adds 5efc3bfd3207 AMDGPU/GlobalISel: Use IncomingValueAssigner for implicit return adds 1055cb91b482 [libc++] Deprecate std::iterator and remove it as a base class adds 73099e786aef [libc++] NFC: Parenthesize expression to satisfy GCC 11 adds 192b4141f0d7 Revert "Emit correct location lists with basic block sections." adds 3d64677c2807 Thread safety analysis: Factor out function for merging lo [...] adds cf0b337c1b1f Thread safety analysis: Allow exlusive/shared joins for ma [...] adds 7922ff601094 [AIX] Add -lc++abi and -lunwind for linking adds e892705d74c7 GlobalISel: Do not change register types in lowerLoad adds 6f4794feb60a [RISCV] Add a test case showing incorrect call-conv lowering adds 6d2c0950205f [HIP] Check compatibility of -fgpu-sanitize with offload arch adds b44007bec247 [mlir][gpu] Relax restriction on MMA store op to allow cha [...] adds 5c18d1136665 [SPE] Disable strict-fp for SPE by default adds 216536000340 [LoopUnrollAndJam] Change LoopUnrollAndJamPass to LoopNest pass adds c412979cde54 [mlir] Async reference counting for block successors with [...] adds 4fbc66cd6d90 [Clang] Enable __has_feature(coverage_sanitizer) adds 39957aa4243c [mlir] Add error state and error propagation to async runt [...] adds b5f8ac268293 [X86] Pre-commit tests for D103192. NFC adds a105d3024efe [X86] Fold (shift undef, X)->0 for vector shifts by immediate. adds d8c84d2a4efc [mlir] Async: Add error propagation support to async groups adds 750799b7bc3f [mlir][NFC] Don't outline kernel in MMA integration tests adds 527cd013144d [RISCV] Teach vsetvli insertion to use vsetvl x0, x0 form [...] adds 90d25808c420 [CostModel][X86] Improve accuracy of sext/zext to 256-bit [...] adds bafbec853569 [NFC][X86][Codegen] Re-autogenerate check lines in a few t [...] adds b6399e85d80d Revert "[libc++] NFC: Parenthesize expression to satisfy GCC 11" adds eb69763ad8ea [NFC][scudo] Rename internal function adds 4cc5a971010e MC: mark `dump` with `LLVM_DUMP_METHOD` adds 9136b7d075d2 [mlir] AsyncRefCounting: check that LivenessBlockInfo is n [...] adds 5618a5a05944 [mlir] Update cmake variable post D102976 adds c261edb27702 [NFC][scudo] Check zeros on smaller allocations adds 8d7d7f340ea0 [libc++] NFC: Refactor raw_storage_iterator test to use UN [...] adds d7ae2438b9bd [RISCV] Add a test showing missed opportunity to avoid a v [...] adds 32bacb74107e [lldb][intel-pt] Remove old plugin adds 8f23fac4da25 [mlir:Async] Convert assertions to async errors only insid [...] adds 50f17e9d3139 [analyzer] RetainCountChecker: Disable reference counting [...] adds f3869a5c32b7 Support stripping indirectly referenced DILocations from ! [...] adds 9712b1676360 [NFC][X86][Codegen] vector-interleaved-store-i16-stride-5. [...] adds 0d5219feb9b2 [x86] add tests for extend of vector compare; NFC adds cb66bf2c6d20 Replace 'magic static' with a member variable for SCYL ker [...] adds aad878f11279 [libc++] NFC: Make it easier for vendors to extend the run [...] adds 0e4cf807aeaf [clang] [MinGW] Don't mark emutls variables as DSO local adds b3ceffdf35e5 [libcxx] [test] Convert an XFAIL LIBCXX-WINDOWS-FIXME into [...] adds d47dd1107132 [mlir] Add support for querying the ModRef behavior from t [...] adds 020df692d801 [RISCV] Fix typo, use addImm instead of addReg. adds 109aac92128c [PDB] Enable parallel ghash type merging by default adds 62b5df7fe2b3 [PowerPC] Added multiple PowerPC builtins adds 50770d8de560 [MCA] Refactor the InOrderIssueStage stage. NFCI adds 8cbbc5d00b6a [mlir-lsp-server] Add support for processing split files adds b834d6309455 [sanitizer] Android ELF TLS is supported from Q (API 29) adds ef1cc4e7aebe [mlir][capi] fix build issue with "all passes" registration adds ee544b8d868d [NFC][X86][Codegen] Re-autogenerate a few tests to reduce [...] adds 2d2a9020785c [SanCov] Properly set ABI parameter attributes adds 0fa5aac292b8 [RISCV] Teach VSETVLI insertion to look through PHIs to pr [...] adds 8086f9d87ee8 [ConstFold] Simplify a load's GEP operand through local aliases adds 57646d38d54c [MCA] Minor changes to the InOrderIssueStage. NFC adds e41aaea26238 [NFC][libObject] clang-format Archive{.h,.cpp} adds 80e684b19423 Fix comment to reflect what the method is doing (NFC) adds fc1d39849e8d [dfsan] Add a flag about whether to propagate offset label [...] adds b2581196eb03 [AIX] Enable stackprotect feature adds 99f023656b78 [PDB] Fix ubsan complaint about memcpy from null pointer adds 59b8afe50274 [clang-cl] Bump default -fms-compatibility-version to 19.14 adds ef4cfd832238 Pass -gcodeview-ghash when using clang-cl and lld-link adds 6a2af607ad35 Revert "[NFCI] Lazily evaluate SCEVs of PHIs" adds 59a4ee97288b [AArch64][GlobalISel] Legalize oversize G_EXTRACT_VECTOR_E [...] adds 7952ddb21fb7 [LoopNest][LoopFlatten] Change LoopFlattenPass to LoopNest pass adds ffc4d3e06855 [LoopNest][LoopFlatten] Change LoopFlattenPass to LoopNest pass adds e493abcf55a3 [MLIR][SPIRV] Use getAsmResultName(...) hook for ConstantOp. adds 7e06cf8f1ba2 Revert "[LoopNest][LoopFlatten] Change LoopFlattenPass to [...] adds e96d6f4821bf Revert "[LoopNest][LoopFlatten] Change LoopFlattenPass to [...] adds f2264ebb0872 [ConstantFolding] Fix -Wunused-variable warning (NFC) adds f59cd8a4a606 [clang] [MinGW] Fix gcc version detection/picking adds 4458e8c4b42f Revert "[scudo] Check if MADV_DONTNEED zeroes memory" adds a6e5a4b464be [NFC][scudo] Re-enable check in the test adds bd04d78d649b [cmake][scudo] Add missing headers adds 00ecf18979e3 [WebAssembly][CodeGen] IR support for WebAssembly local variables adds 6133b60a27fe [AMDGPU] Precommit test adds 690f5b7a0128 [AMDGPU] Fix function calls with flat scratch adds ec1f6f7e3f92 Revert "[LAA] Support pointer phis in loop by analyzing ea [...] adds 66ff1cbd71d2 [NFC][Transforms][Utils] remove useless variable in CloneB [...] adds d88f96dff3f1 ARM: support mandatory tail calls for tailcc & swifttailcc adds 9ff2eb1ea596 SwiftTailCC: teach verifier musttail rules applicable to this CC. adds ca5f07f8c4bc Revert "[WebAssembly][CodeGen] IR support for WebAssembly [...] adds 4694097dab72 [mlir] Don't elide the last op if there is no terminator adds e94fada045fe SwiftAsync: add Clang attribute to apply the LLVM `swiftas [...] adds f3afd0d193d2 [RISCV] Add tests for fixed vector conversions between fp [...] adds 3f5ae36833e2 [RISCV][NFC] Merge identical RV32 and RV64 test checks adds cf2eeb114c59 Fix "enumerator 'llvm::TargetStackID::WasmLocal' in switch [...] adds 49b2f8328f36 [x86] add test for extend of legal vector compare; NFC adds 5bccdde070d2 [Matrix] Move C++ matrix cast checks to TryStaticCast. adds 6915a55824d1 [gn build] (semi-manually) port bd04d78d649b adds b76df3235cd0 [clang] NFC: Replace std::pair by a struct in InitHeaderSearch adds a773b2e430a8 [AArch64] Add additional vector load scalarization tests f [...] adds 2b9b9652ce27 [LLD][COFF] Reduce the maximum size of the GHASH table adds 58b29a4efc22 [libc++] Add all indirect callable concepts and projected adds 0c4f76c9421a [gn build] Port 58b29a4efc22 adds 4c6e2774d827 [gn] Make ubsan errors fatal, as in cmake adds b6e1fb7e3253 [IR] Make TypeFinder aware of DIArgList values adds fa488ea864ab [LoopNest][LoopFlatten] Change LoopFlattenPass to LoopNest pass adds e0c826543706 Revert "Fix "enumerator 'llvm::TargetStackID::WasmLocal' i [...] adds dc672999a9b1 [clang][Parse] Add parsing support for C++ attributes on u [...] adds 82f7b5e1b999 [mlir] Add missing namespace to createCanonicalizerPass. adds 9968896cd62a [libc++] NFC: Move unwrap_iter to its own header adds 2ee59f75fea8 [LoopDeletion] Add test with potentially infinite sub-loop. adds a279550cde3b [PhaseOrdering] add test for late simplifycfg with LTO; NFC adds 403cfe5d707d [PassManager] unify late simplifycfg options between regul [...] adds dd226803c220 Revert "[NFCI][LoopDeletion] Do not call complex analysis [...] adds 807fc7cdc97f Revert "[NFC] Reuse existing variables instead of re-reque [...] adds fd553312031c Revert "[NFC] Formatting fix" adds 24bd65720237 Revert "[NFCI][LoopDeletion] Only query SCEV about loop su [...] adds 0159652058ca Revert "Return "[LoopDeletion] Break backedge if we can pr [...] adds f01df9805ce2 [VectorCombine] Add variants of multi-extract tests with assumes. adds 007f268c35fc [VectorCombine] Check indices for all extracts we scalarize. adds d24d2447cd22 [SelectionDAG] Fix typo in assert. NFC adds 2830d924b087 [VP] Make getMaskParamPos/getVectorLengthParamPos return u [...] adds f63adf5b67f7 Revert "[clang][Parse] Add parsing support for C++ attribu [...] adds 58cb64921280 [RISCV] Add octuple to LMULInfo tablegen class, remove oct [...] adds b6afdbac134b [gn build] Port 9968896cd62a adds 8a5f0d883832 [libc++] [test] Constexpr-ify a couple of insert-iterator tests. adds 1a0e5d561ceb [gn build] manually port 982e3c05108b6 (check-lld needs dsymutil) adds 0b3b0a727ad6 [AArch64][RISCV] Make sure isel correctly honors failure o [...] adds 8702c6da162b [clang-format] [docs] Regenerate style options documentation. adds 65527a8082ac [dsymutil tests] Try to make eh_frames.test run on other p [...] adds 06eaffa85821 [NFC] Remove confusing info about MainLoop VF/UF from debu [...] adds a41309966a86 [RISCV] Pre-commit test cases for D103211. NFC adds f765445a6911 [LoopUnroll] Clean up exit folding (NFC) adds 4af2730ac3e9 [LoopUnroll] Add store to unreachable latch test (NFC) adds bc6799f2f79f [RISCV] Add separate MxList tablegen classes for widening/ [...] adds 90310dfff8fd [LoopUnroll] Use changeToUnreachable() (NFC) adds 2644399ce772 [lld-macho][test] Simplify --allow-empty with count 0 adds 577fea4e1a13 [CGAtomic] Delete outdated code comparing success/failure [...] adds bde21b624585 [Verifier] Significantly speed up IsolatedFromAbove checki [...] adds 09b75f480d1d [clang-format] New BreakInheritanceList style AfterComma adds 018a9641ff1a [AArch64][GlobalISel] Fix a crash during selection of a G_ [...] adds 38dbdde7924c [Internalize] Simplify comdat renaming with noduplicates a [...] adds c4053cd14eb9 [lld/mac] Don't crash on -order_file with assembly inputs [...] adds c4c3869554a6 [RISCV] Enable interleaved vectorization for RVV adds 9f506fc761cc [InstrProfiling][test] Fix stale tests adds cdd1adfb7d5d [InstrProfiling][test] Fix stale linkage.ll adds b577ec495698 [AtomicExpandPass][AArch64] Promote xchg with floating-poi [...] adds 625920dabf49 [LoopUnroll] Make DomTree explicitly required (NFC) adds b13edf6e907b Revert "[libc++] NFC: Move unwrap_iter to its own header" adds 42910da585d3 [gn build] Port b13edf6e907b adds c123c178b26e [SystemZ] Set getExtendForAtomicOps to ISD::ANY_EXTEND adds fae3534b3056 [analyzer] Use Optional as a return type of StoreManager: [...] adds 52f297003601 [InstCombine] reduce code duplication; NFC adds c7da0c383a1b [InstCombine] fold zext of masked bit set/clear adds aa9a30b83a06 [RISCV] Remove -riscv-no-aliases in favour of new -M no-aliases adds 762f707c0072 [Support] Fix getMainExecutable on FreeBSD when called via [...] adds 00dfd4f87041 Revert "[RISCV] Remove -riscv-no-aliases in favour of new [...] adds ffb48d48e45c [clang-format] successive C# attributes cause line breakin [...] adds d11abdfd5a27 [Verifier] Inline a method to simplify the code in prepara [...] adds 67d0e79b1f41 [Dominance] Speed up recalculate noticable, NFC. adds 65831422a98f [ARM] Guard against WhileLoopStart kill flags adds 5cc55fdb57c9 [libc++] [test] Update "test_compare.h" users to avoid rem [...] adds 7145c6caf158 [InstrProfiling][test] Improve tests adds c9385297ce75 [libc++] [modules] Add __threading_support to the modulemap. adds bfbd73f87d7b [libc++] Alphabetize and include-what-you-use. NFCI. adds 620cef91207b [analyzer] MallocSizeof: sizeof pointer type is compatible [...] adds 3a6f12f9156b Revert "[NFC] Use ArgListEntry indirect types more in ISel [...] adds 71cca4f728d7 Revert "[TargetLowering] Only inspect attributes in the ar [...] adds 056733d0195b [SafeStack] Use proper API to get stack guard adds 71acce68daf4 [NFCI] Move DEBUG_TYPE definition below #includes adds 126f90b25250 [DAGCombine] Poison-prove scalarizeExtractedVectorLoad. adds 7bb8bfa0622b [InstCombine] fix miscompile from vector select substitution adds 829978744d24 [VectorCombine] Add tests with noundef index for load scal [...] adds be6b9e8ae717 Revert "[clang-tidy] Simplify static assert check" adds c1ee4fb5af49 [clang][AVR] Add avr-libc/include to clang system include paths adds bb542f2a76d4 [mlir] StandardToLLVM: option to disable AllocOp lowering adds 268e24a46af0 [LoopDeletion] Add more tests with infinite sub-loops & mu [...] adds 86812faa5f9b [AVR] Improve inline assembly adds 2176be556b44 [ARM] Guard against loop variant gather ptr operands adds 442f2d7bc0bc [ORC-RT] Add OrcRTCWrapperFunctionResult. adds 1ed29f8784ee [ORC-RT] Add common.h -- Logging, casting and remote dispa [...] adds 1e344ce4f3fa [CSE] Make domInfo a stored property, cut use of Dominance [...] adds 36597e4719e9 [lldb] Fix typos. NFC. adds 22668c6e1f36 [AVR][NFC] Refactor 8-bit & 16-bit shifts adds 4f2fd3818b0e [InstCombine] Fix miscompile on GEP+load to icmp fold (PR45210) adds e97206884071 [clangd] Move gtest include to TestTU.cpp from TestTU.h adds 5aa5eba135b7 [mlir][NFC] Rename MathToLLVM->MathToLibm adds 7d7b72bad7ff [libcxx] [test] Add UNSUPPORTED: msvc in a couple verify.c [...] adds 22f635b1b31a [LangRef] update according to unwinding support in inline asm adds 2bc8ffa8afab [mlir] Support permutation maps in vector transfer op folder adds 2290a80b4dcb [mlir][NFC] Remove illegal TanhOp in LLVMConversionTarget adds bf35f4af51cd [WebAssembly][CodeGen] IR support for WebAssembly local variables adds 818338add774 [clang] Add support for the "abstract" contextual keyword of MSVC adds bc1ad6e3c49d Revert "[WebAssembly][CodeGen] IR support for WebAssembly [...] adds 37b530a2ea8b [clang] NFC: split HeaderMapTest to have re-usable header [...] adds eb2393659113 [RISCV] Support vector conversions between fp and i1 adds 24ee6d3d3c62 [lldb][NFC] Remove unused var in SBDebugger::GetInternalVa [...] adds 222aeb4d51a4 [DSE] Remove stores in the same loop iteration adds 7161bb87c914 [InsCombine] Fix a few remaining vec transforms to use poi [...] adds 2b37c405cc18 [RISCV] Scale scalably-typed split argument offsets by VSCALE adds dee85d47d9f1 [LiveDebugVariables] Stop trimming locations of non-inlined vars adds a723ca32af89 fix broken clang tests after 7161bb87c914 adds 434c8e013a2c [SDAG] try harder to fold casts into vector compare adds 8006ac7fe449 fix test for symlinked clang c1ee4fb5af49a adds 83cc4478a060 [llvm-objcopy][NFC] Refactor CopyConfig structure - remove [...] adds 4fc328695143 [AMDGPU][Libomptarget][NFC] Split host and device malloc adds 18c2106e281b [MLIR] Fix warnings in AffineOps.cpp adds f7c95c33222e [NFC] ScalarEvolution: apply SSO to the ExprValueMap value adds 1288adaa7350 [MLIR][Shape] Remove duplicate operands of `shape.assuming [...] adds 2fc05fdc156f [libunwind] fix -Wc++98-compat-extra-semi without _LIBUNWI [...] adds 63fe4cb08206 [SDAG] add check to sext-of-setcc fold to bypass changing [...] adds 0a52d9006c86 [mlir][linalg] Update Structured Op Interface (NFC). adds c36ff6424f24 Revert "[clang] Add support for the "abstract" contextual [...] adds f4f7bc17374e [mlir][linalg] Cleanup LinalgOp usage in verification (NFC). adds e853d3b27447 [NFC] MemoryDependenceAnalysis cleanup. adds b8dcd920ec28 [AsmParser][SystemZ][z/OS] Introducing HLASM Parser suppor [...] adds d39f5c3cb97e [libc++] Avoid `result_type` and `unary/binary_function` i [...] adds 8815ce03e857 Remove "Rewrite Symbols" from codegen pipeline adds 41bdf64d3e94 [libc++] Update all the pre-defined iterator types for C++20 adds a610df533379 [test] Fix addr-label.ll after D99707 adds 9853d0db1e01 [MCA][NFCI] Minor changes to InstrBuilder and Instruction. adds d350dd8ba26f [test] Properly match parameter/argument ABI attributes adds 73cdc7599bf0 [libc++] [test] Fix a few tests for 32-bit x86 adds 116179c2ee52 Re-commit [clang] Add support for the "abstract" contextua [...] adds 2c3afa323776 [OpaquePtr] Clean up some uses of Type::getPointerElementType() adds e4034881c353 [MLIR] Specify namespace for standard dialect using cppNam [...] adds bf92bdad77a3 [libcxx][nfc] moves std `advance`, `next`, and `prev` into [...] adds 1279b79c9bb1 [gn build] make libunwind build on macOS adds c0b3071833a8 [PowerPC] Fix x86 vector intrinsics wrapper compilation under C++ adds 73b759a33a9c [MLIR] Add dialect prefix to all operations from Math adds aa00b1d76364 [LV] Try to sink users recursively for first-order recurrences. adds b48a256e9c6e [libcxx] [test] Don't look for the literal spelling __mbst [...] adds c8644ae1e98c [libcxx] Define LIBCPP_HAS_TIMESPEC_GET for MSVC configurations adds be34d5f74afe [libcxx] [test] Remove an incorrect TEST_HAS_ALIGNED_ALLOC [...] adds 23f7f56cecf9 [libcxx] [test] Fix the include_as_c.sh.cpp test in MSVC c [...] adds 5c9fe816e3b6 [LoopDeletion] Add additional test cases with more nested loops. adds bfefde22b670 [LoopInterhcange] Handle movement of reduction phis appropriately adds f0e10cc91bc4 [HIP] Relax checks in hip-include-path.hip test case again adds db26cd30b6dd [PowerPC] Improve f32 to i32 bitcast code gen adds 372237487e24 [OpaquePtr] Remove some uses of PointerType::getElementType() adds e6b086bef2c0 Revert "[InstCombine] Fix miscompile on GEP+load to icmp f [...] adds 119bf57ab6de Fix invalid math formulas in quantization doc adds 4ef47eaed952 [Test] Add one more loop deletion irreducible CFG test new 4d788fb80ff3 [PowerPC] Split tests for constrained intrinsics new 0be2657c2f48 [clangd] Type hints for variables with 'auto' type new 41d7909368be [libcxx] [test] Fix the _supportsVerify check on Windows b [...] new cf9b1f7a0e9d [X86] Split FeatureFastVariableShuffle tuning into Lane-Cr [...] new a3b8695bf592 [X86] AMD Zen 3 has fast variable per-lane shuffles new 912ebf60b151 [mlir][linalg] Cleanup LinalgOp usage in vectorization (NFC). new 5b747197f8fb [clangd] Fix -Wunused-variable warning (NFC) new c2e5226a8514 [mlir][linalg] Cleanup LinalgOp usage in tiling (NFC). new 7594f5028a11 [mlir][linalg] Cleanup LinalgOp usage in fusion (NFC). new 94643fda1346 [mlir][linalg] Cleanup LinalgOp usage in dependence analys [...] new 18225d45769b Mark test as requiring asserts. new f000c4cfb66c [VectorCombine] Add tests with multiple noundef indices fo [...] new 82f92e35c646 [WebAssembly][CodeGen] IR support for WebAssembly local variables new 4f500c402b73 [RISCV] Support vector types in combination with fastcc new d4c070d80141 [VectorCombine] Freeze index unless it is known to be non-poison. new 07576cc4dc89 [mlir][linalg] Fix signed/unsigned comparison warnings (NFC). new 1ebf7ce950bb [mlir] Use interfaces in MathToLibm new 1b14f3951a20 [SDAG] add helper function for sext-of-setcc folds; NFC new 1b84acb23aca [LoopDeletion] Consider infinite loops alive, unless mustp [...] new 7879fa688472 [compiler-rt] Fix compilation when multiple architectures [...] new 13140120dcca [InstCombine] Relax constraints of uses for exp(X) * exp(Y [...] new fb113264a8da [AMDGPU][Libomptarget] Remove g_atmi_machine global new 94b0aec0f5c6 [OpenCL] Fix ICE with invalid use of half new 97d234935f15 [clang][Parse] Add parsing support for C++ attributes on u [...] new e60f147324b6 [llvm-dwarfdump][test] Add missing dedicated tests for som [...] new 36911971a58d [SLP]Better detection of perfect/shuffles matches for gath [...] new 41d08541e884 Simplify coro-zero-alloca.ll new de65b1ab7de1 [x86] add test for sext-of-setcc; NFC new 01fb14e17763 [lldb] Remove SBCommandReturnObject::ref new ecfca427f960 [lldb][NFC] Use Language plugins in Mangled::GuessLanguage new 5a5219a0f961 [RISCV] Remove earlyclobber from compares with LMUL<=1.

The 31 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: .../clang-tidy/ClangTidyDiagnosticConsumer.cpp | 6 + .../clang-tidy/misc/StaticAssertCheck.cpp | 49 +- .../clang-tidy/misc/StaticAssertCheck.h | 3 - clang-tools-extra/clangd/ClangdServer.cpp | 7 +- clang-tools-extra/clangd/InlayHints.cpp | 28 +- clang-tools-extra/clangd/Protocol.cpp | 2 + clang-tools-extra/clangd/Protocol.h | 7 +- clang-tools-extra/clangd/TUScheduler.cpp | 1 + clang-tools-extra/clangd/TUScheduler.h | 5 + .../clangd/unittests/InlayHintTests.cpp | 147 +- clang-tools-extra/clangd/unittests/TestTU.cpp | 1 + clang-tools-extra/clangd/unittests/TestTU.h | 1 - .../clangd/unittests/TestWorkspace.cpp | 3 +- .../clang-tidy/infrastructure/Inputs/remarks/A.h | 1 + .../infrastructure/Inputs/remarks/module.modulemap | 1 + .../test/clang-tidy/infrastructure/remarks.cpp | 15 + clang/.clang-tidy | 2 +- clang/cmake/caches/Fuchsia-stage2.cmake | 2 +- clang/docs/ClangFormatStyleOptions.rst | 98 +- clang/docs/LanguageExtensions.rst | 80 +- clang/docs/OpenCLSupport.rst | 16 +- clang/docs/ReleaseNotes.rst | 10 +- clang/docs/SanitizerCoverage.rst | 14 +- clang/include/clang/AST/ASTContext.h | 28 + clang/include/clang/AST/Attr.h | 2 + clang/include/clang/AST/ComputeDependence.h | 2 + clang/include/clang/AST/DeclCXX.h | 1 + clang/include/clang/AST/Expr.h | 58 + clang/include/clang/AST/JSONNodeDumper.h | 1 + clang/include/clang/AST/Mangle.h | 11 +- clang/include/clang/AST/RecursiveASTVisitor.h | 3 + clang/include/clang/AST/TextNodeDumper.h | 1 + clang/include/clang/Basic/Attr.td | 9 + clang/include/clang/Basic/AttrDocs.td | 30 +- clang/include/clang/Basic/Builtins.def | 32 +- clang/include/clang/Basic/Builtins.h | 1 + clang/include/clang/Basic/BuiltinsPPC.def | 17 + clang/include/clang/Basic/CodeGenOptions.h | 6 + clang/include/clang/Basic/DiagnosticGroups.td | 3 +- clang/include/clang/Basic/DiagnosticLexKinds.td | 6 +- clang/include/clang/Basic/DiagnosticParseKinds.td | 9 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 8 + clang/include/clang/Basic/Features.def | 2 + clang/include/clang/Basic/LangOptions.h | 4 + clang/include/clang/Basic/OpenCLExtensions.def | 1 + clang/include/clang/Basic/Specifiers.h | 7 +- clang/include/clang/Basic/StmtNodes.td | 1 + clang/include/clang/Basic/TargetInfo.h | 6 + clang/include/clang/Basic/TokenKinds.def | 13 +- clang/include/clang/CrossTU/CrossTranslationUnit.h | 2 + clang/include/clang/Driver/Options.td | 2 +- clang/include/clang/Format/Format.h | 13 +- .../Lex/DependencyDirectivesSourceMinimizer.h | 2 + clang/include/clang/Lex/PPCallbacks.h | 58 + .../clang/Lex/PPConditionalDirectiveRecord.h | 8 + clang/include/clang/Lex/PreprocessingRecord.h | 7 + clang/include/clang/Lex/Preprocessor.h | 3 +- clang/include/clang/Parse/Parser.h | 8 + clang/include/clang/Sema/DeclSpec.h | 6 +- clang/include/clang/Sema/Sema.h | 18 + clang/include/clang/Serialization/ASTBitCodes.h | 3 + .../StaticAnalyzer/Core/PathSensitive/Store.h | 3 +- clang/include/clang/Tooling/Core/Diagnostic.h | 1 + clang/include/clang/Tooling/DiagnosticsYaml.h | 1 + clang/lib/AST/ASTContext.cpp | 117 +- clang/lib/AST/ComputeDependence.cpp | 4 + clang/lib/AST/Expr.cpp | 65 + clang/lib/AST/ExprClassification.cpp | 3 + clang/lib/AST/ExprConstant.cpp | 24 +- clang/lib/AST/ItaniumMangle.cpp | 54 +- clang/lib/AST/JSONNodeDumper.cpp | 6 + clang/lib/AST/Stmt.cpp | 8 +- clang/lib/AST/StmtPrinter.cpp | 7 + clang/lib/AST/StmtProfile.cpp | 6 + clang/lib/AST/TextNodeDumper.cpp | 5 + clang/lib/AST/TypePrinter.cpp | 2 + clang/lib/Analysis/CFG.cpp | 7 + clang/lib/Analysis/RetainSummaryManager.cpp | 14 +- clang/lib/Analysis/ThreadSafety.cpp | 38 +- clang/lib/Basic/Builtins.cpp | 11 +- clang/lib/Basic/IdentifierTable.cpp | 7 +- clang/lib/Basic/Targets/AMDGPU.h | 1 + clang/lib/Basic/Targets/M68k.cpp | 24 + clang/lib/Basic/Targets/M68k.h | 1 + clang/lib/Basic/Targets/NVPTX.h | 1 + clang/lib/Basic/Targets/PPC.cpp | 4 + clang/lib/Basic/Targets/PPC.h | 18 + clang/lib/CodeGen/BackendUtil.cpp | 8 +- clang/lib/CodeGen/CGAtomic.cpp | 5 - clang/lib/CodeGen/CGCUDANV.cpp | 27 +- clang/lib/CodeGen/CGCall.cpp | 4 + clang/lib/CodeGen/CGDebugInfo.cpp | 9 +- clang/lib/CodeGen/CGExprScalar.cpp | 21 + clang/lib/CodeGen/CodeGenFunction.cpp | 11 +- clang/lib/CodeGen/CodeGenModule.cpp | 7 +- clang/lib/CrossTU/CrossTranslationUnit.cpp | 22 +- clang/lib/Driver/ToolChain.cpp | 2 +- clang/lib/Driver/ToolChains/AIX.cpp | 1 + clang/lib/Driver/ToolChains/AMDGPU.cpp | 20 +- clang/lib/Driver/ToolChains/AMDGPU.h | 14 +- clang/lib/Driver/ToolChains/AVR.cpp | 17 + clang/lib/Driver/ToolChains/AVR.h | 3 + clang/lib/Driver/ToolChains/Clang.cpp | 13 +- clang/lib/Driver/ToolChains/CommonArgs.cpp | 12 +- clang/lib/Driver/ToolChains/HIP.cpp | 25 + clang/lib/Driver/ToolChains/HIP.h | 1 + clang/lib/Driver/ToolChains/MSVC.cpp | 4 +- clang/lib/Driver/ToolChains/MinGW.cpp | 1 + clang/lib/Format/Format.cpp | 5 +- clang/lib/Format/TokenAnnotator.cpp | 14 + clang/lib/Format/UnwrappedLineParser.cpp | 2 + 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+- llvm/test/CodeGen/ARM/arm-vld1.ll | 343 ++ llvm/test/CodeGen/ARM/build-attributes.ll | 6 +- llvm/test/CodeGen/ARM/dbg-tcreturn.ll | 2 +- llvm/test/CodeGen/ARM/fastcc-tailcall.ll | 193 + .../CodeGen/ARM/peephole-callee-save-regalloc.mir | 2 +- llvm/test/CodeGen/ARM/pr45824.ll | 85 - llvm/test/CodeGen/ARM/swifttailcc-call.ll | 201 + llvm/test/CodeGen/ARM/swifttailcc-fastisel.ll | 11 + llvm/test/CodeGen/ARM/tailcc-call.ll | 193 + llvm/test/CodeGen/ARM/tailcc-notail.ll | 8 + llvm/test/CodeGen/ARM/v8m-tail-call.ll | 13 +- llvm/test/CodeGen/AVR/inline-asm/inline-asm3.ll | 388 ++ llvm/test/CodeGen/BPF/reloc-2.ll | 60 + llvm/test/CodeGen/BPF/reloc-3.ll | 25 + llvm/test/CodeGen/BPF/reloc-btf-2.ll | 4 +- llvm/test/CodeGen/BPF/reloc-btf.ll | 6 +- llvm/test/CodeGen/BPF/reloc.ll | 2 +- llvm/test/CodeGen/Generic/addr-label.ll | 5 +- llvm/test/CodeGen/Hexagon/autohvx/align2-128b.ll | 124 +- llvm/test/CodeGen/Hexagon/autohvx/align2-64b.ll | 60 +- .../Hexagon/autohvx/shuffle-expanding-128b.ll | 28 + .../Hexagon/autohvx/shuffle-expanding-64b.ll | 28 + .../CodeGen/Hexagon/autohvx/shuffle-half-128b.ll | 240 + .../CodeGen/Hexagon/autohvx/shuffle-half-64b.ll | 239 + .../CodeGen/MIR/AMDGPU/machine-function-info.ll | 2 +- llvm/test/CodeGen/Mips/gpopt-explict-section.ll | 2 +- llvm/test/CodeGen/NVPTX/f16-instructions.ll | 4 +- llvm/test/CodeGen/NVPTX/f16x2-instructions.ll | 4 +- llvm/test/CodeGen/PowerPC/aix-overflow-toc.py | 30 +- .../PowerPC/aix-p9-xxinsertw-xxextractuw.ll | 8 - llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll | 52 +- llvm/test/CodeGen/PowerPC/bitcasts-direct-move.ll | 8 +- .../CodeGen/PowerPC/builtins-ppc-xlcompat-msync.ll | 33 + .../CodeGen/PowerPC/builtins-ppc-xlcompat-sync.ll | 74 + llvm/test/CodeGen/PowerPC/eieio.ll | 4 +- .../PowerPC/non-debug-mi-search-frspxsrsp.ll | 2 +- .../CodeGen/PowerPC/p9-xxinsertw-xxextractuw.ll | 8 - llvm/test/CodeGen/PowerPC/scalar_vector_test_4.ll | 2 - llvm/test/CodeGen/PowerPC/stack-guard-oob.ll | 29 + llvm/test/CodeGen/PowerPC/stack-protector.ll | 6 + llvm/test/CodeGen/PowerPC/vec_insert_elt.ll | 48 +- .../PowerPC/vector-constrained-fp-intrinsics.ll | 6358 +++++++++----------- llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll | 6 +- llvm/test/CodeGen/RISCV/rv32zbs.ll | 40 +- llvm/test/CodeGen/RISCV/rv64zbs.ll | 40 +- .../RISCV/rvv/access-fixed-objects-by-rvv.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/add-vsetvli-gpr.mir | 56 - llvm/test/CodeGen/RISCV/rvv/add-vsetvli-vlmax.ll | 32 - .../CodeGen/RISCV/rvv/addi-scalable-offset.mir | 6 +- llvm/test/CodeGen/RISCV/rvv/allocate-lmul-2-4-8.ll | 40 +- llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll | 628 ++ llvm/test/CodeGen/RISCV/rvv/calling-conv.ll | 94 + llvm/test/CodeGen/RISCV/rvv/cleanup-vsetivli.mir | 46 - llvm/test/CodeGen/RISCV/rvv/cleanup-vsetvli.mir | 79 - llvm/test/CodeGen/RISCV/rvv/combine-store-fp.ll | 18 + llvm/test/CodeGen/RISCV/rvv/extload-truncstore.ll | 110 +- llvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/extractelt-i1.ll | 14 +- llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv64.ll | 88 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs.ll | 32 +- .../CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll | 46 +- .../CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll | 312 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll | 156 +- .../RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll | 557 ++ .../RISCV/rvv/fixed-vectors-calling-conv.ll | 537 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll | 304 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop.ll | 118 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll | 408 +- .../RISCV/rvv/fixed-vectors-extload-truncstore.ll | 1118 ++-- .../CodeGen/RISCV/rvv/fixed-vectors-extract-i1.ll | 34 +- .../RISCV/rvv/fixed-vectors-extract-subvector.ll | 250 +- .../CodeGen/RISCV/rvv/fixed-vectors-extract.ll | 138 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-bitcast.ll | 78 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll | 117 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-conv.ll | 104 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll | 516 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-shuffles.ll | 138 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-splat.ll | 36 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-vrgather.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll | 250 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll | 498 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll | 358 +- .../CodeGen/RISCV/rvv/fixed-vectors-insert-i1.ll | 68 +- .../RISCV/rvv/fixed-vectors-insert-subvector.ll | 244 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll | 90 +- .../RISCV/rvv/fixed-vectors-int-buildvec.ll | 68 +- .../RISCV/rvv/fixed-vectors-int-exttrunc.ll | 96 +- .../CodeGen/RISCV/rvv/fixed-vectors-int-setcc.ll | 152 +- .../RISCV/rvv/fixed-vectors-int-shuffles.ll | 142 +- .../CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll | 154 +- .../RISCV/rvv/fixed-vectors-int-vrgather.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll | 1176 ++-- .../RISCV/rvv/fixed-vectors-mask-buildvec.ll | 128 +- .../RISCV/rvv/fixed-vectors-mask-load-store.ll | 30 +- .../CodeGen/RISCV/rvv/fixed-vectors-mask-logic.ll | 20 +- .../CodeGen/RISCV/rvv/fixed-vectors-mask-splat.ll | 120 +- .../RISCV/rvv/fixed-vectors-masked-gather.ll | 610 +- .../RISCV/rvv/fixed-vectors-masked-load-fp.ll | 54 +- .../RISCV/rvv/fixed-vectors-masked-load-int.ll | 64 +- .../RISCV/rvv/fixed-vectors-masked-scatter.ll | 452 +- .../RISCV/rvv/fixed-vectors-masked-store-fp.ll | 54 +- .../RISCV/rvv/fixed-vectors-masked-store-int.ll | 66 +- .../RISCV/rvv/fixed-vectors-reduction-fp.ll | 345 +- .../RISCV/rvv/fixed-vectors-reduction-int.ll | 1543 ++--- .../CodeGen/RISCV/rvv/fixed-vectors-select-fp.ll | 4709 +++++++-------- .../CodeGen/RISCV/rvv/fixed-vectors-select-int.ll | 228 +- .../RISCV/rvv/fixed-vectors-stepvector-rv32.ll | 30 +- .../RISCV/rvv/fixed-vectors-stepvector-rv64.ll | 44 +- .../CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll | 224 +- .../CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll | 224 +- .../CodeGen/RISCV/rvv/fixed-vectors-vdiv-vp.ll | 160 +- .../CodeGen/RISCV/rvv/fixed-vectors-vdivu-vp.ll | 160 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax.ll | 48 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin.ll | 48 +- .../CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll | 160 +- .../CodeGen/RISCV/rvv/fixed-vectors-vnsra-vnsrl.ll | 50 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vor-vp.ll | 224 +- .../RISCV/rvv/fixed-vectors-vreductions-mask.ll | 48 +- .../CodeGen/RISCV/rvv/fixed-vectors-vrem-vp.ll | 160 +- .../CodeGen/RISCV/rvv/fixed-vectors-vremu-vp.ll | 160 +- .../CodeGen/RISCV/rvv/fixed-vectors-vrsub-vp.ll | 160 +- .../CodeGen/RISCV/rvv/fixed-vectors-vselect.ll | 146 +- .../CodeGen/RISCV/rvv/fixed-vectors-vshl-vp.ll | 288 +- .../CodeGen/RISCV/rvv/fixed-vectors-vsra-vp.ll | 288 +- .../CodeGen/RISCV/rvv/fixed-vectors-vsrl-vp.ll | 288 +- .../CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll | 160 +- .../CodeGen/RISCV/rvv/fixed-vectors-vxor-vp.ll | 288 +- llvm/test/CodeGen/RISCV/rvv/frameindex-addr.ll | 3 +- llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll | 38 +- llvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/insertelt-i1.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv32.ll | 128 +- llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv64.ll | 88 +- llvm/test/CodeGen/RISCV/rvv/interleave-crash.ll | 490 +- .../RISCV/rvv/legalize-scalable-vectortype.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/mask-reg-alloc.mir | 13 +- llvm/test/CodeGen/RISCV/rvv/memory-args.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll | 240 +- llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll | 92 +- .../RISCV/rvv/named-vector-shuffle-reverse.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/regalloc-fast-crash.ll | 2 +- .../CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/rv32-spill-zvlsseg.ll | 20 +- .../CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/rv64-spill-zvlsseg.ll | 20 +- llvm/test/CodeGen/RISCV/rvv/rvv-framelayout.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/saddo-sdnode.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/select-int.ll | 64 +- llvm/test/CodeGen/RISCV/rvv/select-sra.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv32.ll | 168 +- llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv64.ll | 168 +- llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv64.ll | 2 +- .../RISCV/rvv/tail-agnostic-impdef-copy.mir | 5 +- .../CodeGen/RISCV/rvv/unsupported-calling-conv.ll | 11 + llvm/test/CodeGen/RISCV/rvv/vaadd-rv32.ll | 364 +- llvm/test/CodeGen/RISCV/rvv/vaadd-rv64.ll | 356 +- llvm/test/CodeGen/RISCV/rvv/vaaddu-rv32.ll | 364 +- llvm/test/CodeGen/RISCV/rvv/vaaddu-rv64.ll | 356 +- llvm/test/CodeGen/RISCV/rvv/vadc-rv32.ll | 266 +- llvm/test/CodeGen/RISCV/rvv/vadc-rv64.ll | 266 +- llvm/test/CodeGen/RISCV/rvv/vadd-rv32.ll | 540 +- llvm/test/CodeGen/RISCV/rvv/vadd-rv64.ll | 532 +- llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll | 280 +- llvm/test/CodeGen/RISCV/rvv/vamoadd-rv32.ll | 282 +- llvm/test/CodeGen/RISCV/rvv/vamoadd-rv64.ll | 282 +- llvm/test/CodeGen/RISCV/rvv/vamoand-rv32.ll | 282 +- llvm/test/CodeGen/RISCV/rvv/vamoand-rv64.ll | 282 +- llvm/test/CodeGen/RISCV/rvv/vamomax-rv32.ll | 282 +- llvm/test/CodeGen/RISCV/rvv/vamomax-rv64.ll | 282 +- llvm/test/CodeGen/RISCV/rvv/vamomaxu-rv32.ll | 282 +- llvm/test/CodeGen/RISCV/rvv/vamomaxu-rv64.ll | 282 +- llvm/test/CodeGen/RISCV/rvv/vamomin-rv32.ll | 282 +- llvm/test/CodeGen/RISCV/rvv/vamomin-rv64.ll | 282 +- llvm/test/CodeGen/RISCV/rvv/vamominu-rv32.ll | 282 +- llvm/test/CodeGen/RISCV/rvv/vamominu-rv64.ll | 282 +- llvm/test/CodeGen/RISCV/rvv/vamoor-rv32.ll | 282 +- llvm/test/CodeGen/RISCV/rvv/vamoor-rv64.ll | 282 +- llvm/test/CodeGen/RISCV/rvv/vamoswap-rv32.ll | 562 +- llvm/test/CodeGen/RISCV/rvv/vamoswap-rv64.ll | 562 +- llvm/test/CodeGen/RISCV/rvv/vamoxor-rv32.ll | 282 +- llvm/test/CodeGen/RISCV/rvv/vamoxor-rv64.ll | 282 +- llvm/test/CodeGen/RISCV/rvv/vand-rv32.ll | 540 +- llvm/test/CodeGen/RISCV/rvv/vand-rv64.ll | 532 +- llvm/test/CodeGen/RISCV/rvv/vand-vp.ll | 280 +- llvm/test/CodeGen/RISCV/rvv/vasub-rv32.ll | 364 +- llvm/test/CodeGen/RISCV/rvv/vasub-rv64.ll | 356 +- llvm/test/CodeGen/RISCV/rvv/vasubu-rv32.ll | 364 +- llvm/test/CodeGen/RISCV/rvv/vasubu-rv64.ll | 356 +- llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll | 154 +- llvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll | 154 +- llvm/test/CodeGen/RISCV/rvv/vdiv-rv32.ll | 364 +- llvm/test/CodeGen/RISCV/rvv/vdiv-rv64.ll | 356 +- llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vdivu-rv32.ll | 364 +- llvm/test/CodeGen/RISCV/rvv/vdivu-rv64.ll | 356 +- llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vfadd-rv32.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vfadd-rv64.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vfclass-rv32.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfclass-rv64.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode.ll | 104 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv32.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv64.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv32.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv64.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv32.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv64.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv32.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv64.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv32.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv64.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv32.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv64.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfdiv-rv32.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vfdiv-rv64.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vfirst-rv32.ll | 58 +- llvm/test/CodeGen/RISCV/rvv/vfirst-rv64.ll | 58 +- llvm/test/CodeGen/RISCV/rvv/vfmacc-rv32.ll | 194 +- llvm/test/CodeGen/RISCV/rvv/vfmacc-rv64.ll | 194 +- llvm/test/CodeGen/RISCV/rvv/vfmadd-rv32.ll | 194 +- llvm/test/CodeGen/RISCV/rvv/vfmadd-rv64.ll | 194 +- llvm/test/CodeGen/RISCV/rvv/vfmax-rv32.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vfmax-rv64.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll | 182 +- llvm/test/CodeGen/RISCV/rvv/vfmerge-rv64.ll | 182 +- llvm/test/CodeGen/RISCV/rvv/vfmin-rv32.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vfmin-rv64.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vfmsac-rv32.ll | 194 +- llvm/test/CodeGen/RISCV/rvv/vfmsac-rv64.ll | 194 +- llvm/test/CodeGen/RISCV/rvv/vfmsub-rv32.ll | 194 +- llvm/test/CodeGen/RISCV/rvv/vfmsub-rv64.ll | 194 +- llvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vfmul-rv64.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv32.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv64.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv32.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv64.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv32.ll | 74 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv64.ll | 74 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv32.ll | 74 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv64.ll | 74 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv32.ll | 74 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv64.ll | 74 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv32.ll | 74 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv64.ll | 74 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv32.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv64.ll | 122 +- .../test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv32.ll | 122 +- .../test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv64.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv32.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv64.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv32.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv64.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv32.ll | 194 +- llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv64.ll | 194 +- llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv32.ll | 194 +- llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv64.ll | 194 +- llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv32.ll | 194 +- llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv64.ll | 194 +- llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv32.ll | 194 +- llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv64.ll | 194 +- llvm/test/CodeGen/RISCV/rvv/vfpext-sdnode.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vfptoi-sdnode.ll | 2552 ++++---- llvm/test/CodeGen/RISCV/rvv/vfptrunc-sdnode.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv32.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv64.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfrec7-rv32.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfrec7-rv64.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfredmax-rv32.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfredmax-rv64.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfredmin-rv32.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfredmin-rv64.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfredosum-rv32.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfredosum-rv64.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfredsum-rv32.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfredsum-rv64.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfrsqrt7-rv32.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfrsqrt7-rv64.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfrsub-rv32.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfrsub-rv64.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv32.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv64.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv32.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv64.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv32.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv64.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv32.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv64.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv32.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv64.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv32.ll | 110 +- llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv64.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfsub-rv32.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vfsub-rv64.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vfwadd-rv32.ll | 146 +- llvm/test/CodeGen/RISCV/rvv/vfwadd-rv64.ll | 146 +- llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll | 479 +- llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll | 479 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv32.ll | 74 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv64.ll | 74 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv32.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv64.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv32.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv64.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv32.ll | 74 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv64.ll | 74 +- .../test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv32.ll | 74 +- .../test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv64.ll | 74 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv32.ll | 74 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv64.ll | 74 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv32.ll | 74 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv64.ll | 74 +- llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv32.ll | 146 +- llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv64.ll | 146 +- llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv32.ll | 146 +- llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv64.ll | 146 +- llvm/test/CodeGen/RISCV/rvv/vfwmul-rv32.ll | 146 +- llvm/test/CodeGen/RISCV/rvv/vfwmul-rv64.ll | 146 +- llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv32.ll | 146 +- llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv64.ll | 146 +- llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv32.ll | 146 +- llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv64.ll | 146 +- llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv32.ll | 90 +- llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv64.ll | 90 +- llvm/test/CodeGen/RISCV/rvv/vfwredsum-rv32.ll | 90 +- llvm/test/CodeGen/RISCV/rvv/vfwredsum-rv64.ll | 90 +- llvm/test/CodeGen/RISCV/rvv/vfwsub-rv32.ll | 146 +- llvm/test/CodeGen/RISCV/rvv/vfwsub-rv64.ll | 146 +- llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll | 479 +- llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll | 479 +- llvm/test/CodeGen/RISCV/rvv/vid-rv32.ll | 170 +- llvm/test/CodeGen/RISCV/rvv/vid-rv64.ll | 170 +- llvm/test/CodeGen/RISCV/rvv/viota-rv32.ll | 178 +- llvm/test/CodeGen/RISCV/rvv/viota-rv64.ll | 178 +- llvm/test/CodeGen/RISCV/rvv/vitofp-sdnode.ll | 2426 ++++---- llvm/test/CodeGen/RISCV/rvv/vle-rv32.ll | 298 +- llvm/test/CodeGen/RISCV/rvv/vle-rv64.ll | 298 +- llvm/test/CodeGen/RISCV/rvv/vle1-rv32.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vle1-rv64.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vleff-rv32.ll | 160 +- llvm/test/CodeGen/RISCV/rvv/vleff-rv64.ll | 160 +- llvm/test/CodeGen/RISCV/rvv/vloxei-rv32.ll | 1074 ++-- llvm/test/CodeGen/RISCV/rvv/vloxei-rv64.ll | 1074 ++-- llvm/test/CodeGen/RISCV/rvv/vloxseg-rv32.ll | 1544 ++--- llvm/test/CodeGen/RISCV/rvv/vloxseg-rv64.ll | 2212 +++---- llvm/test/CodeGen/RISCV/rvv/vlse-rv32.ll | 298 +- llvm/test/CodeGen/RISCV/rvv/vlse-rv64.ll | 298 +- llvm/test/CodeGen/RISCV/rvv/vlseg-rv32.ll | 774 +-- llvm/test/CodeGen/RISCV/rvv/vlseg-rv64.ll | 840 +-- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv32-dead.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv32.ll | 516 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv64-dead.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv64.ll | 560 +- llvm/test/CodeGen/RISCV/rvv/vlsseg-rv32.ll | 774 +-- llvm/test/CodeGen/RISCV/rvv/vlsseg-rv64.ll | 840 +-- llvm/test/CodeGen/RISCV/rvv/vluxei-rv32.ll | 1074 ++-- llvm/test/CodeGen/RISCV/rvv/vluxei-rv64.ll | 1074 ++-- llvm/test/CodeGen/RISCV/rvv/vluxseg-rv32.ll | 1544 ++--- llvm/test/CodeGen/RISCV/rvv/vluxseg-rv64.ll | 2212 +++---- llvm/test/CodeGen/RISCV/rvv/vmacc-rv32.ll | 302 +- llvm/test/CodeGen/RISCV/rvv/vmacc-rv64.ll | 290 +- llvm/test/CodeGen/RISCV/rvv/vmadc-rv32.ll | 266 +- llvm/test/CodeGen/RISCV/rvv/vmadc-rv64.ll | 266 +- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv32.ll | 266 +- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv64.ll | 266 +- llvm/test/CodeGen/RISCV/rvv/vmadd-rv32.ll | 302 +- llvm/test/CodeGen/RISCV/rvv/vmadd-rv64.ll | 290 +- llvm/test/CodeGen/RISCV/rvv/vmand-rv32.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vmand-rv64.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vmandnot-rv32.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vmandnot-rv64.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vmax-rv32.ll | 364 +- llvm/test/CodeGen/RISCV/rvv/vmax-rv64.ll | 356 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-rv32.ll | 364 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-rv64.ll | 356 +- llvm/test/CodeGen/RISCV/rvv/vmclr-rv32.ll | 14 +- llvm/test/CodeGen/RISCV/rvv/vmclr-rv64.ll | 14 +- llvm/test/CodeGen/RISCV/rvv/vmerge-rv32.ll | 266 +- llvm/test/CodeGen/RISCV/rvv/vmerge-rv64.ll | 266 +- llvm/test/CodeGen/RISCV/rvv/vmfeq-rv32.ll | 218 +- llvm/test/CodeGen/RISCV/rvv/vmfeq-rv64.ll | 218 +- llvm/test/CodeGen/RISCV/rvv/vmfge-rv32.ll | 218 +- llvm/test/CodeGen/RISCV/rvv/vmfge-rv64.ll | 218 +- llvm/test/CodeGen/RISCV/rvv/vmfgt-rv32.ll | 218 +- llvm/test/CodeGen/RISCV/rvv/vmfgt-rv64.ll | 218 +- llvm/test/CodeGen/RISCV/rvv/vmfle-rv32.ll | 218 +- llvm/test/CodeGen/RISCV/rvv/vmfle-rv64.ll | 218 +- llvm/test/CodeGen/RISCV/rvv/vmflt-rv32.ll | 218 +- llvm/test/CodeGen/RISCV/rvv/vmflt-rv64.ll | 218 +- llvm/test/CodeGen/RISCV/rvv/vmfne-rv32.ll | 218 +- llvm/test/CodeGen/RISCV/rvv/vmfne-rv64.ll | 218 +- llvm/test/CodeGen/RISCV/rvv/vmin-rv32.ll | 364 +- llvm/test/CodeGen/RISCV/rvv/vmin-rv64.ll | 356 +- llvm/test/CodeGen/RISCV/rvv/vminu-rv32.ll | 364 +- llvm/test/CodeGen/RISCV/rvv/vminu-rv64.ll | 356 +- llvm/test/CodeGen/RISCV/rvv/vmnand-rv32.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vmnand-rv64.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vmnor-rv32.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vmnor-rv64.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vmor-rv32.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vmor-rv64.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vmornot-rv32.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vmornot-rv64.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vmsbc-rv32.ll | 178 +- llvm/test/CodeGen/RISCV/rvv/vmsbc-rv64.ll | 178 +- .../test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv32.ll | 178 +- .../test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv64.ll | 178 +- llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll | 58 +- llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll | 58 +- llvm/test/CodeGen/RISCV/rvv/vmseq-rv32.ll | 476 +- llvm/test/CodeGen/RISCV/rvv/vmseq-rv64.ll | 470 +- llvm/test/CodeGen/RISCV/rvv/vmset-rv32.ll | 14 +- llvm/test/CodeGen/RISCV/rvv/vmset-rv64.ll | 14 +- llvm/test/CodeGen/RISCV/rvv/vmsge-rv32.ll | 590 +- llvm/test/CodeGen/RISCV/rvv/vmsge-rv64.ll | 578 +- llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv32.ll | 590 +- llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv64.ll | 578 +- llvm/test/CodeGen/RISCV/rvv/vmsgt-rv32.ll | 476 +- llvm/test/CodeGen/RISCV/rvv/vmsgt-rv64.ll | 470 +- llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv32.ll | 476 +- llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv64.ll | 470 +- llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll | 58 +- llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll | 58 +- llvm/test/CodeGen/RISCV/rvv/vmsle-rv32.ll | 476 +- llvm/test/CodeGen/RISCV/rvv/vmsle-rv64.ll | 470 +- llvm/test/CodeGen/RISCV/rvv/vmsleu-rv32.ll | 476 +- llvm/test/CodeGen/RISCV/rvv/vmsleu-rv64.ll | 470 +- llvm/test/CodeGen/RISCV/rvv/vmslt-rv32.ll | 476 +- llvm/test/CodeGen/RISCV/rvv/vmslt-rv64.ll | 470 +- llvm/test/CodeGen/RISCV/rvv/vmsltu-rv32.ll | 476 +- llvm/test/CodeGen/RISCV/rvv/vmsltu-rv64.ll | 470 +- llvm/test/CodeGen/RISCV/rvv/vmsne-rv32.ll | 476 +- llvm/test/CodeGen/RISCV/rvv/vmsne-rv64.ll | 470 +- llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll | 58 +- llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll | 58 +- llvm/test/CodeGen/RISCV/rvv/vmul-rv32.ll | 364 +- llvm/test/CodeGen/RISCV/rvv/vmul-rv64.ll | 356 +- llvm/test/CodeGen/RISCV/rvv/vmul-vp.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vmulh-rv32.ll | 364 +- llvm/test/CodeGen/RISCV/rvv/vmulh-rv64.ll | 356 +- llvm/test/CodeGen/RISCV/rvv/vmulhsu-rv32.ll | 364 +- llvm/test/CodeGen/RISCV/rvv/vmulhsu-rv64.ll | 356 +- llvm/test/CodeGen/RISCV/rvv/vmulhu-rv32.ll | 364 +- llvm/test/CodeGen/RISCV/rvv/vmulhu-rv64.ll | 356 +- llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv32.ll | 44 +- llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv64.ll | 44 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv32.ll | 150 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv64.ll | 150 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv32.ll | 178 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv64.ll | 178 +- llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv32.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vmxnor-rv32.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vmxnor-rv64.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vmxor-rv32.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vmxor-rv64.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vnclip-rv32.ll | 362 +- llvm/test/CodeGen/RISCV/rvv/vnclip-rv64.ll | 362 +- llvm/test/CodeGen/RISCV/rvv/vnclipu-rv32.ll | 362 +- llvm/test/CodeGen/RISCV/rvv/vnclipu-rv64.ll | 362 +- llvm/test/CodeGen/RISCV/rvv/vnmsac-rv32.ll | 302 +- llvm/test/CodeGen/RISCV/rvv/vnmsac-rv64.ll | 290 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-rv32.ll | 302 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-rv64.ll | 290 +- llvm/test/CodeGen/RISCV/rvv/vnsra-rv32.ll | 362 +- llvm/test/CodeGen/RISCV/rvv/vnsra-rv64.ll | 362 +- llvm/test/CodeGen/RISCV/rvv/vnsrl-rv32.ll | 362 +- llvm/test/CodeGen/RISCV/rvv/vnsrl-rv64.ll | 362 +- llvm/test/CodeGen/RISCV/rvv/vor-rv32.ll | 540 +- llvm/test/CodeGen/RISCV/rvv/vor-rv64.ll | 532 +- llvm/test/CodeGen/RISCV/rvv/vor-vp.ll | 280 +- llvm/test/CodeGen/RISCV/rvv/vpopc-rv32.ll | 58 +- llvm/test/CodeGen/RISCV/rvv/vpopc-rv64.ll | 58 +- llvm/test/CodeGen/RISCV/rvv/vredand-rv32.ll | 170 +- llvm/test/CodeGen/RISCV/rvv/vredand-rv64.ll | 170 +- llvm/test/CodeGen/RISCV/rvv/vredmax-rv32.ll | 170 +- llvm/test/CodeGen/RISCV/rvv/vredmax-rv64.ll | 170 +- llvm/test/CodeGen/RISCV/rvv/vredmaxu-rv32.ll | 170 +- llvm/test/CodeGen/RISCV/rvv/vredmaxu-rv64.ll | 170 +- llvm/test/CodeGen/RISCV/rvv/vredmin-rv32.ll | 170 +- llvm/test/CodeGen/RISCV/rvv/vredmin-rv64.ll | 170 +- llvm/test/CodeGen/RISCV/rvv/vredminu-rv32.ll | 170 +- llvm/test/CodeGen/RISCV/rvv/vredminu-rv64.ll | 170 +- llvm/test/CodeGen/RISCV/rvv/vredor-rv32.ll | 170 +- llvm/test/CodeGen/RISCV/rvv/vredor-rv64.ll | 170 +- llvm/test/CodeGen/RISCV/rvv/vredsum-rv32.ll | 170 +- llvm/test/CodeGen/RISCV/rvv/vredsum-rv64.ll | 170 +- .../CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll | 38 - .../test/CodeGen/RISCV/rvv/vreductions-int-rv32.ll | 120 +- .../test/CodeGen/RISCV/rvv/vreductions-int-rv64.ll | 72 - llvm/test/CodeGen/RISCV/rvv/vredxor-rv32.ll | 170 +- llvm/test/CodeGen/RISCV/rvv/vredxor-rv64.ll | 170 +- llvm/test/CodeGen/RISCV/rvv/vrem-rv32.ll | 364 +- llvm/test/CodeGen/RISCV/rvv/vrem-rv64.ll | 356 +- llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vremu-rv32.ll | 364 +- llvm/test/CodeGen/RISCV/rvv/vremu-rv64.ll | 356 +- llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vrgather-rv32.ll | 796 +-- llvm/test/CodeGen/RISCV/rvv/vrgather-rv64.ll | 892 +-- llvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv32.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv64.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vrsub-rv32.ll | 362 +- llvm/test/CodeGen/RISCV/rvv/vrsub-rv64.ll | 354 +- llvm/test/CodeGen/RISCV/rvv/vrsub-vp.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vsadd-rv32.ll | 540 +- llvm/test/CodeGen/RISCV/rvv/vsadd-rv64.ll | 532 +- llvm/test/CodeGen/RISCV/rvv/vsaddu-rv32.ll | 540 +- llvm/test/CodeGen/RISCV/rvv/vsaddu-rv64.ll | 532 +- llvm/test/CodeGen/RISCV/rvv/vsbc-rv32.ll | 178 +- llvm/test/CodeGen/RISCV/rvv/vsbc-rv64.ll | 178 +- llvm/test/CodeGen/RISCV/rvv/vse-rv32.ll | 298 +- llvm/test/CodeGen/RISCV/rvv/vse-rv64.ll | 298 +- llvm/test/CodeGen/RISCV/rvv/vse1-rv32.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vse1-rv64.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vselect-mask.ll | 87 + .../CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll | 498 ++ .../CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir | 415 ++ llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir | 400 ++ llvm/test/CodeGen/RISCV/rvv/vsext-rv32.ll | 194 +- llvm/test/CodeGen/RISCV/rvv/vsext-rv64.ll | 226 +- llvm/test/CodeGen/RISCV/rvv/vshl-sdnode-rv32.ll | 44 +- llvm/test/CodeGen/RISCV/rvv/vshl-vp.ll | 360 +- llvm/test/CodeGen/RISCV/rvv/vslide1down-rv32.ll | 186 +- llvm/test/CodeGen/RISCV/rvv/vslide1down-rv64.ll | 178 +- llvm/test/CodeGen/RISCV/rvv/vslide1up-rv32.ll | 186 +- llvm/test/CodeGen/RISCV/rvv/vslide1up-rv64.ll | 178 +- llvm/test/CodeGen/RISCV/rvv/vslidedown-rv32.ll | 482 +- llvm/test/CodeGen/RISCV/rvv/vslidedown-rv64.ll | 482 +- llvm/test/CodeGen/RISCV/rvv/vslideup-rv32.ll | 482 +- llvm/test/CodeGen/RISCV/rvv/vslideup-rv64.ll | 482 +- llvm/test/CodeGen/RISCV/rvv/vsll-rv32.ll | 532 +- llvm/test/CodeGen/RISCV/rvv/vsll-rv64.ll | 532 +- llvm/test/CodeGen/RISCV/rvv/vsmul-rv32.ll | 364 +- llvm/test/CodeGen/RISCV/rvv/vsmul-rv64.ll | 356 +- llvm/test/CodeGen/RISCV/rvv/vsoxei-rv32.ll | 1074 ++-- llvm/test/CodeGen/RISCV/rvv/vsoxei-rv64.ll | 1074 ++-- llvm/test/CodeGen/RISCV/rvv/vsoxseg-rv32.ll | 1544 ++--- llvm/test/CodeGen/RISCV/rvv/vsoxseg-rv64.ll | 2212 +++---- llvm/test/CodeGen/RISCV/rvv/vsra-rv32.ll | 532 +- llvm/test/CodeGen/RISCV/rvv/vsra-rv64.ll | 532 +- llvm/test/CodeGen/RISCV/rvv/vsra-sdnode-rv32.ll | 44 +- llvm/test/CodeGen/RISCV/rvv/vsra-vp.ll | 360 +- llvm/test/CodeGen/RISCV/rvv/vsrl-rv32.ll | 532 +- llvm/test/CodeGen/RISCV/rvv/vsrl-rv64.ll | 532 +- llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode-rv32.ll | 44 +- llvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll | 360 +- llvm/test/CodeGen/RISCV/rvv/vsse-rv32.ll | 298 +- llvm/test/CodeGen/RISCV/rvv/vsse-rv64.ll | 298 +- llvm/test/CodeGen/RISCV/rvv/vsseg-rv32.ll | 516 +- llvm/test/CodeGen/RISCV/rvv/vsseg-rv64.ll | 560 +- llvm/test/CodeGen/RISCV/rvv/vssra-rv32.ll | 468 +- llvm/test/CodeGen/RISCV/rvv/vssra-rv64.ll | 532 +- llvm/test/CodeGen/RISCV/rvv/vssrl-rv32.ll | 468 +- llvm/test/CodeGen/RISCV/rvv/vssrl-rv64.ll | 532 +- llvm/test/CodeGen/RISCV/rvv/vssseg-rv32.ll | 516 +- llvm/test/CodeGen/RISCV/rvv/vssseg-rv64.ll | 560 +- llvm/test/CodeGen/RISCV/rvv/vssub-rv32.ll | 364 +- llvm/test/CodeGen/RISCV/rvv/vssub-rv64.ll | 356 +- llvm/test/CodeGen/RISCV/rvv/vssubu-rv32.ll | 364 +- llvm/test/CodeGen/RISCV/rvv/vssubu-rv64.ll | 356 +- llvm/test/CodeGen/RISCV/rvv/vsub-rv32.ll | 540 +- llvm/test/CodeGen/RISCV/rvv/vsub-rv64.ll | 532 +- llvm/test/CodeGen/RISCV/rvv/vsub-vp.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vsuxei-rv32.ll | 1074 ++-- llvm/test/CodeGen/RISCV/rvv/vsuxei-rv64.ll | 1074 ++-- llvm/test/CodeGen/RISCV/rvv/vsuxseg-rv32.ll | 1544 ++--- llvm/test/CodeGen/RISCV/rvv/vsuxseg-rv64.ll | 2212 +++---- llvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode-rv32.ll | 34 +- llvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode-rv64.ll | 34 +- llvm/test/CodeGen/RISCV/rvv/vwadd-rv32.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vwadd-rv64.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vwadd.w-rv32.ll | 784 ++- llvm/test/CodeGen/RISCV/rvv/vwadd.w-rv64.ll | 784 ++- llvm/test/CodeGen/RISCV/rvv/vwaddu-rv32.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vwaddu-rv64.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv32.ll | 784 ++- llvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv64.ll | 784 ++- llvm/test/CodeGen/RISCV/rvv/vwmacc-rv32.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vwmacc-rv64.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv32.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv64.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vwmaccu-rv32.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vwmaccu-rv64.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vwmaccus-rv32.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vwmaccus-rv64.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vwmul-rv32.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vwmul-rv64.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vwmulsu-rv32.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vwmulsu-rv64.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vwmulu-rv32.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vwmulu-rv64.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vwredsum-rv32.ll | 146 +- llvm/test/CodeGen/RISCV/rvv/vwredsum-rv64.ll | 146 +- llvm/test/CodeGen/RISCV/rvv/vwredsumu-rv32.ll | 146 +- llvm/test/CodeGen/RISCV/rvv/vwredsumu-rv64.ll | 146 +- llvm/test/CodeGen/RISCV/rvv/vwsub-rv32.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vwsub-rv64.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vwsub.w-rv32.ll | 784 ++- llvm/test/CodeGen/RISCV/rvv/vwsub.w-rv64.ll | 784 ++- llvm/test/CodeGen/RISCV/rvv/vwsubu-rv32.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vwsubu-rv64.ll | 242 +- llvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv32.ll | 784 ++- llvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv64.ll | 784 ++- llvm/test/CodeGen/RISCV/rvv/vxor-rv32.ll | 540 +- llvm/test/CodeGen/RISCV/rvv/vxor-rv64.ll | 532 +- llvm/test/CodeGen/RISCV/rvv/vxor-vp.ll | 368 +- llvm/test/CodeGen/RISCV/rvv/vzext-rv32.ll | 226 +- llvm/test/CodeGen/RISCV/rvv/vzext-rv64.ll | 226 +- llvm/test/CodeGen/RISCV/rvv/zvlsseg-spill.mir | 6 +- llvm/test/CodeGen/RISCV/rvv/zvlsseg-zero-vl.ll | 36 +- llvm/test/CodeGen/RISCV/spill-fpr-scalar.ll | 14 +- .../test/CodeGen/RISCV/srem-seteq-illegal-types.ll | 12 +- .../test/CodeGen/RISCV/urem-seteq-illegal-types.ll | 8 +- .../CodeGen/SystemZ/codegenprepare-form-OF-ops.ll | 38 + llvm/test/CodeGen/SystemZ/inline-asm-i128.ll | 120 + llvm/test/CodeGen/SystemZ/vec-extract-02.ll | 2 +- .../Thumb2/LowOverheadLoops/wls-search-killed.mir | 176 + .../CodeGen/Thumb2/mve-gather-optimisation-deep.ll | 44 + llvm/test/CodeGen/Thumb2/mve-memtp-branch.ll | 367 ++ llvm/test/CodeGen/Thumb2/mve-memtp-loop.ll | 581 +- llvm/test/CodeGen/Thumb2/mve-phireg.ll | 2 +- llvm/test/CodeGen/Thumb2/mve-tp-loop.mir | 40 +- llvm/test/CodeGen/Thumb2/mve-vmulh.ll | 463 +- llvm/test/CodeGen/WebAssembly/ir-locals-stackid.ll | 22 + llvm/test/CodeGen/WebAssembly/ir-locals.ll | 87 + llvm/test/CodeGen/WebAssembly/reg-stackify-dbg.mir | 51 - llvm/test/CodeGen/X86/AMX/amx-gemm.ll | 210 + llvm/test/CodeGen/X86/O0-pipeline.ll | 2 - llvm/test/CodeGen/X86/atomicf128.ll | 15 +- llvm/test/CodeGen/X86/avx2-arith.ll | 8 +- llvm/test/CodeGen/X86/avx2-conversions.ll | 52 +- llvm/test/CodeGen/X86/avx2-vector-shifts.ll | 528 +- llvm/test/CodeGen/X86/avx512-broadcast-unfold.ll | 58 +- .../X86/avx512-extract-subvector-load-store.ll | 426 +- .../X86/avx512-shuffles/broadcast-vector-int.ll | 3 +- .../CodeGen/X86/avx512-shuffles/partial_permute.ll | 950 ++- llvm/test/CodeGen/X86/avx512-trunc.ll | 3 +- .../CodeGen/X86/bitcast-int-to-vector-bool-sext.ll | 6 +- .../CodeGen/X86/bitcast-int-to-vector-bool-zext.ll | 6 +- llvm/test/CodeGen/X86/broadcastm-lowering.ll | 18 +- llvm/test/CodeGen/X86/buildvec-extract.ll | 4 +- llvm/test/CodeGen/X86/callbr-asm-phi-placement.ll | 2 +- llvm/test/CodeGen/X86/combine-mul.ll | 58 +- llvm/test/CodeGen/X86/combine-rotates.ll | 30 +- llvm/test/CodeGen/X86/combine-sdiv.ll | 328 +- llvm/test/CodeGen/X86/combine-shl.ll | 164 +- llvm/test/CodeGen/X86/combine-sra.ll | 88 +- llvm/test/CodeGen/X86/combine-srl.ll | 83 +- .../CodeGen/X86/elf-unique-sections-by-flags.ll | 140 + .../test/CodeGen/X86/explicit-section-mergeable.ll | 90 +- llvm/test/CodeGen/X86/insertelement-zero.ll | 27 +- llvm/test/CodeGen/X86/memcpy-scoped-aa.ll | 106 + llvm/test/CodeGen/X86/mismatched-byval.ll | 45 - llvm/test/CodeGen/X86/oddshuffles.ll | 285 +- llvm/test/CodeGen/X86/oddsubvector.ll | 182 +- llvm/test/CodeGen/X86/opt-pipeline.ll | 10 +- llvm/test/CodeGen/X86/paddus.ll | 3 +- llvm/test/CodeGen/X86/phaddsub.ll | 3 +- llvm/test/CodeGen/X86/pr50431.ll | 40 + llvm/test/CodeGen/X86/prefer-avx256-shift.ll | 30 +- llvm/test/CodeGen/X86/psubus.ll | 274 +- llvm/test/CodeGen/X86/sadd_sat_vec.ll | 6 +- llvm/test/CodeGen/X86/select_meta.ll | 2 +- llvm/test/CodeGen/X86/sext-vsetcc.ll | 528 ++ .../test/CodeGen/X86/shuffle-of-splat-multiuses.ll | 22 +- .../CodeGen/X86/shuffle-strided-with-offset-128.ll | 12 +- .../CodeGen/X86/shuffle-strided-with-offset-256.ll | 12 +- .../CodeGen/X86/shuffle-strided-with-offset-512.ll | 119 +- llvm/test/CodeGen/X86/shuffle-vs-trunc-128.ll | 15 +- llvm/test/CodeGen/X86/shuffle-vs-trunc-256.ll | 86 +- llvm/test/CodeGen/X86/shuffle-vs-trunc-512.ll | 49 +- llvm/test/CodeGen/X86/sse-domains.ll | 25 +- llvm/test/CodeGen/X86/sse2-vector-shifts.ll | 8 +- llvm/test/CodeGen/X86/ssub_sat_vec.ll | 6 +- llvm/test/CodeGen/X86/stack-protector-3.ll | 4 +- llvm/test/CodeGen/X86/tailcall-swifttailcc.ll | 10 +- llvm/test/CodeGen/X86/tailcc-notail.ll | 8 + llvm/test/CodeGen/X86/uadd_sat_vec.ll | 6 +- llvm/test/CodeGen/X86/usub_sat_vec.ll | 6 +- llvm/test/CodeGen/X86/vec_saddo.ll | 3 +- llvm/test/CodeGen/X86/vec_shift5.ll | 44 + llvm/test/CodeGen/X86/vec_shift6.ll | 24 +- llvm/test/CodeGen/X86/vec_smulo.ll | 6 +- llvm/test/CodeGen/X86/vec_ssubo.ll | 3 +- llvm/test/CodeGen/X86/vec_uaddo.ll | 3 +- llvm/test/CodeGen/X86/vec_umulo.ll | 6 +- llvm/test/CodeGen/X86/vec_usubo.ll | 3 +- llvm/test/CodeGen/X86/vecloadextract.ll | 10 +- llvm/test/CodeGen/X86/vector-fshl-128.ll | 290 +- llvm/test/CodeGen/X86/vector-fshl-256.ll | 240 +- llvm/test/CodeGen/X86/vector-fshl-512.ll | 144 +- llvm/test/CodeGen/X86/vector-fshl-rot-128.ll | 220 +- llvm/test/CodeGen/X86/vector-fshl-rot-256.ll | 172 +- llvm/test/CodeGen/X86/vector-fshl-rot-512.ll | 116 +- llvm/test/CodeGen/X86/vector-fshl-rot-sub128.ll | 48 +- llvm/test/CodeGen/X86/vector-fshr-128.ll | 240 +- llvm/test/CodeGen/X86/vector-fshr-256.ll | 204 +- llvm/test/CodeGen/X86/vector-fshr-512.ll | 136 +- llvm/test/CodeGen/X86/vector-fshr-rot-128.ll | 220 +- llvm/test/CodeGen/X86/vector-fshr-rot-256.ll | 172 +- llvm/test/CodeGen/X86/vector-fshr-rot-512.ll | 116 +- llvm/test/CodeGen/X86/vector-fshr-rot-sub128.ll | 48 +- llvm/test/CodeGen/X86/vector-gep.ll | 2 +- llvm/test/CodeGen/X86/vector-half-conversions.ll | 6 +- .../X86/vector-interleaved-load-i16-stride-2.ll | 81 +- .../X86/vector-interleaved-load-i16-stride-3.ll | 100 +- .../X86/vector-interleaved-load-i16-stride-4.ll | 920 ++- .../X86/vector-interleaved-load-i16-stride-5.ll | 523 ++ .../X86/vector-interleaved-load-i16-stride-6.ll | 586 ++ .../X86/vector-interleaved-store-i16-stride-2.ll | 42 +- .../X86/vector-interleaved-store-i16-stride-3.ll | 255 +- .../X86/vector-interleaved-store-i16-stride-4.ll | 528 +- .../X86/vector-interleaved-store-i16-stride-5.ll | 526 ++ .../X86/vector-interleaved-store-i16-stride-6.ll | 633 ++ llvm/test/CodeGen/X86/vector-rotate-128.ll | 328 +- llvm/test/CodeGen/X86/vector-shift-ashr-128.ll | 62 +- llvm/test/CodeGen/X86/vector-shift-ashr-256.ll | 80 +- llvm/test/CodeGen/X86/vector-shift-ashr-512.ll | 12 +- llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll | 108 +- llvm/test/CodeGen/X86/vector-shift-lshr-128.ll | 96 +- llvm/test/CodeGen/X86/vector-shift-lshr-256.ll | 114 +- llvm/test/CodeGen/X86/vector-shift-lshr-512.ll | 20 +- llvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll | 190 +- llvm/test/CodeGen/X86/vector-shift-shl-128.ll | 102 +- llvm/test/CodeGen/X86/vector-shift-shl-256.ll | 106 +- llvm/test/CodeGen/X86/vector-shift-shl-512.ll | 18 +- llvm/test/CodeGen/X86/vector-shift-shl-sub128.ll | 208 +- llvm/test/CodeGen/X86/vector-shuffle-128-unpck.ll | 6 +- llvm/test/CodeGen/X86/vector-shuffle-128-v16.ll | 9 +- llvm/test/CodeGen/X86/vector-shuffle-128-v4.ll | 30 +- llvm/test/CodeGen/X86/vector-shuffle-128-v8.ll | 6 +- llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll | 579 +- llvm/test/CodeGen/X86/vector-shuffle-256-v32.ll | 440 +- llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll | 234 +- llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll | 917 ++- llvm/test/CodeGen/X86/vector-shuffle-combining.ll | 50 +- llvm/test/CodeGen/X86/vector-shuffle-v1.ll | 79 +- llvm/test/CodeGen/X86/vector-trunc-math.ll | 701 ++- llvm/test/CodeGen/X86/vector-trunc-packus.ll | 148 +- llvm/test/CodeGen/X86/vector-trunc-ssat.ll | 180 +- llvm/test/CodeGen/X86/vector-trunc-usat.ll | 247 +- llvm/test/CodeGen/X86/vector-trunc.ll | 102 +- llvm/test/CodeGen/X86/vector-zext.ll | 6 +- .../X86/vector_splat-const-shift-of-constmasked.ll | 782 +-- llvm/test/CodeGen/X86/x86-shifts.ll | 16 +- .../Generic/2010-06-29-InlinedFnLocalVar.ll | 2 +- llvm/test/DebugInfo/Generic/array.ll | 2 +- .../MIR/InstrRef/phi-regallocd-to-stack.mir | 153 + .../MIR/InstrRef/phi-through-regalloc.mir | 134 + .../MIR/Mips/livedebugvars-stop-trimming-loc.mir | 119 + llvm/test/DebugInfo/WebAssembly/call-site.ll | 47 + llvm/test/DebugInfo/WebAssembly/dbg-value-list.ll | 42 + llvm/test/DebugInfo/X86/dbg-addr-dse.ll | 4 +- llvm/test/DebugInfo/limit-arglist-size.ll | 63 + .../JITLink/AArch64/MachO_arm64_relocations.s | 32 +- .../RuntimeDyld/BPF/abs64-relocation.s | 26 + .../RuntimeDyld}/BPF/lit.local.cfg | 0 .../RuntimeDyld/BPF/nodyld32-64-relocations.s | 77 + .../Instrumentation/AddressSanitizer/fake-stack.ll | 90 +- .../AddressSanitizer/lifetime-uar-uas.ll | 20 +- .../AddressSanitizer/localescape.ll | 16 +- .../AddressSanitizer/stack-poisoning.ll | 17 +- .../AddressSanitizer/stack_dynamic_alloca.ll | 38 +- .../dont_combine_offset_labels_on_gep.ll | 21 + .../test/Instrumentation/InstrProfiling/PR23499.ll | 33 - .../InstrProfiling/always_inline.ll | 10 +- .../InstrProfiling/atomic-updates.ll | 2 +- llvm/test/Instrumentation/InstrProfiling/comdat.ll | 50 +- .../Instrumentation/InstrProfiling/early-exit.ll | 4 +- .../test/Instrumentation/InstrProfiling/linkage.ll | 28 +- .../Instrumentation/InstrProfiling/noruntime.ll | 2 +- .../Instrumentation/InstrProfiling/platform.ll | 10 +- .../Instrumentation/InstrProfiling/profiling.ll | 32 +- .../InstrProfiling/runtime-counter-relocation.ll | 2 +- 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