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from eda5a15909c sh: Recognize >> 31 in treg_set_expr_not_const01 new 106591f79a3 libstdc++: Fix typo in __size_to_integer(__GLIBCXX_TYPE_INT_N_3) new eeea445e1d0 libstdc++: Avoid -Wswitch warning from chrono formatters new b960201091f RISC-V: prefetch: const offset needs to have 5 bits zero, not 4 new f2a3ab7ebf3 RISC-V: prefetch: fix LRA failing to allocate reg [PR118241] new a90b869d386 Daily bump. new 6c472b330ac [vxworks] [ppc] match TARGET_VXWORKS64 to TARGET_64BIT
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Summary of changes: ChangeLog | 8 +++ gcc/ChangeLog | 65 ++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/ada/ChangeLog | 83 +++++++++++++++++++++++ gcc/c-family/ChangeLog | 8 +++ gcc/config/riscv/predicates.md | 4 +- gcc/config/riscv/riscv.md | 2 +- gcc/config/rs6000/vxworks.h | 15 +++++ gcc/cp/ChangeLog | 7 ++ gcc/fortran/ChangeLog | 5 ++ gcc/testsuite/ChangeLog | 99 ++++++++++++++++++++++++++++ gcc/testsuite/gcc.target/riscv/pr118241-b.cc | 33 ++++++++++ libstdc++-v3/ChangeLog | 11 ++++ libstdc++-v3/include/bits/chrono_io.h | 2 + libstdc++-v3/include/bits/stl_algobase.h | 4 +- maintainer-scripts/ChangeLog | 4 ++ 16 files changed, 346 insertions(+), 6 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/pr118241-b.cc