[Tcwg-commits] [gcc] branch master updated (ffa29648b2f -> d324d56221d)

27 Jan 2023


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from  ffa29648b2f testsuite: Use noipa attribute for pr95115 test
       new  6b6b9c680bc RISC-V: Finalize VSETVL PASS implementation
       new  d324d56221d RISC-V: Finalize testcases for final version VSETVL PASS.
The 2 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails.  The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
 gcc/config/riscv/riscv-vsetvl.cc                   | 930 ++++++++++++++++-----
 gcc/config/riscv/riscv-vsetvl.h                    |  30 +-
 .../vsetvl/{avl_single-1.c => avl_multiple-1.c}    |  24 +-
 .../vsetvl/{avl_single-9.c => avl_multiple-10.c}   |  25 +-
 .../vsetvl/{avl_single-10.c => avl_multiple-11.c}  |  23 +-
 .../vsetvl/{avl_single-11.c => avl_multiple-12.c}  |  26 +-
 .../vsetvl/{avl_single-13.c => avl_multiple-13.c}  |  26 +-
 .../gcc.target/riscv/rvv/vsetvl/avl_multiple-14.c  |  66 ++
 .../gcc.target/riscv/rvv/vsetvl/avl_multiple-15.c  |  67 ++
 .../gcc.target/riscv/rvv/vsetvl/avl_multiple-16.c  |  67 ++
 .../gcc.target/riscv/rvv/vsetvl/avl_multiple-2.c   |  35 +
 .../vsetvl/{avl_single-4.c => avl_multiple-3.c}    |  24 +-
 .../vsetvl/{avl_single-4.c => avl_multiple-4.c}    |  23 +-
 .../vsetvl/{avl_single-4.c => avl_multiple-5.c}    |  25 +-
 .../vsetvl/{avl_single-4.c => avl_multiple-6.c}    |  25 +-
 .../gcc.target/riscv/rvv/vsetvl/avl_multiple-7.c   |  40 +
 .../vsetvl/{avl_single-4.c => avl_multiple-8.c}    |  24 +-
 .../vsetvl/{avl_single-9.c => avl_multiple-9.c}    |  26 +-
 .../gcc.target/riscv/rvv/vsetvl/avl_single-14.c    |   4 +-
 .../gcc.target/riscv/rvv/vsetvl/avl_single-23.c    |   2 +-
 .../gcc.target/riscv/rvv/vsetvl/avl_single-30.c    |   2 +-
 .../gcc.target/riscv/rvv/vsetvl/avl_single-44.c    |   3 +-
 .../gcc.target/riscv/rvv/vsetvl/avl_single-47.c    |   2 +-
 .../gcc.target/riscv/rvv/vsetvl/avl_single-50.c    |   2 +-
 .../gcc.target/riscv/rvv/vsetvl/avl_single-51.c    |   2 +-
 .../gcc.target/riscv/rvv/vsetvl/avl_single-6.c     |   4 +-
 .../gcc.target/riscv/rvv/vsetvl/avl_single-65.c    |   4 +-
 .../gcc.target/riscv/rvv/vsetvl/avl_single-66.c    |  37 +-
 .../gcc.target/riscv/rvv/vsetvl/avl_single-67.c    |   5 +-
 .../gcc.target/riscv/rvv/vsetvl/avl_single-68.c    |   5 +-
 .../gcc.target/riscv/rvv/vsetvl/avl_single-70.c    |  23 +-
 .../gcc.target/riscv/rvv/vsetvl/avl_single-71.c    |   2 +-
 .../gcc.target/riscv/rvv/vsetvl/avl_single-73.c    |  25 +
 .../vsetvl/{avl_single-14.c => avl_single-74.c}    |  22 +-
 .../vsetvl/{avl_single-31.c => avl_single-75.c}    |  16 +-
 .../gcc.target/riscv/rvv/vsetvl/avl_single-9.c     |   1 +
 .../gcc.target/riscv/rvv/vsetvl/imm_bb_prop-2.c    |   2 +-
 .../gcc.target/riscv/rvv/vsetvl/imm_bb_prop-3.c    |   2 +-
 .../gcc.target/riscv/rvv/vsetvl/imm_bb_prop-4.c    |   2 +-
 .../gcc.target/riscv/rvv/vsetvl/imm_conflict-4.c   |  10 +-
 .../gcc.target/riscv/rvv/vsetvl/imm_conflict-5.c   |  10 +-
 .../riscv/rvv/vsetvl/vlmax_back_prop-13.c          |   6 +-
 .../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-13.c |   6 -
 .../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-14.c |   6 -
 .../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-15.c |   1 -
 .../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-16.c |   7 -
 .../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-21.c |  12 +-
 .../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-22.c |  12 +-
 .../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-23.c |   2 +-
 .../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-24.c |  14 +-
 .../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-5.c  |  12 +-
 .../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-6.c  |  12 +-
 .../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-7.c  |   2 +-
 .../gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-8.c  |  14 +-
 .../gcc.target/riscv/rvv/vsetvl/vlmax_conflict-1.c |   4 +-
 .../gcc.target/riscv/rvv/vsetvl/vlmax_conflict-6.c |   1 -
 .../riscv/rvv/vsetvl/vlmax_miss_default-1.c        |   2 +-
 .../riscv/rvv/vsetvl/vlmax_miss_default-10.c       |   1 -
 .../riscv/rvv/vsetvl/vlmax_miss_default-11.c       |   2 +-
 .../riscv/rvv/vsetvl/vlmax_miss_default-12.c       |   2 +-
 .../riscv/rvv/vsetvl/vlmax_miss_default-13.c       |   2 +-
 .../riscv/rvv/vsetvl/vlmax_miss_default-14.c       |   8 +-
 .../riscv/rvv/vsetvl/vlmax_miss_default-2.c        |   2 +-
 .../riscv/rvv/vsetvl/vlmax_miss_default-3.c        |   2 +-
 .../riscv/rvv/vsetvl/vlmax_miss_default-4.c        |   2 +-
 .../riscv/rvv/vsetvl/vlmax_miss_default-5.c        |   2 +-
 .../riscv/rvv/vsetvl/vlmax_miss_default-6.c        |   2 +-
 .../riscv/rvv/vsetvl/vlmax_miss_default-7.c        |   2 +-
 .../riscv/rvv/vsetvl/vlmax_miss_default-8.c        |   2 +-
 .../riscv/rvv/vsetvl/vlmax_miss_default-9.c        |   2 +-
 .../riscv/rvv/vsetvl/vlmax_switch_vtype-10.c       |   1 -
 .../gcc.target/riscv/rvv/vsetvl/vsetvl-1.c         |  16 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvl-10.c        |  20 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvl-11.c        |  21 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvl-12.c        |  21 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvl-13.c        |  22 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvl-14.c        |  24 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvl-15.c        |  22 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvl-16.c        |  20 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvl-17.c        |  14 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvl-18.c        |  19 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvl-19.c        |  22 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvl-2.c         |  20 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvl-20.c        |  23 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvl-3.c         |  21 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvl-4.c         |  21 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvl-5.c         |  17 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvl-6.c         |  22 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvl-7.c         |  17 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvl-8.c         |  22 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvl-9.c         |  20 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvlmax-1.c      |  17 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvlmax-10.c     |  23 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvlmax-11.c     |  23 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvlmax-12.c     |  26 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvlmax-13.c     |  27 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvlmax-14.c     |  18 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvlmax-15.c     |  23 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvlmax-16.c     |  14 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvlmax-17.c     |  16 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvlmax-18.c     |  19 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvlmax-19.c     |  22 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvlmax-2.c      |  21 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvlmax-20.c     |  19 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvlmax-3.c      |  16 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvlmax-4.c      |  21 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvlmax-5.c      |  21 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvlmax-6.c      |  22 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvlmax-7.c      |  24 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvlmax-8.c      |  22 +
 .../gcc.target/riscv/rvv/vsetvl/vsetvlmax-9.c      |  23 +
 111 files changed, 2221 insertions(+), 438 deletions(-)
 copy gcc/testsuite/gcc.target/riscv/rvv/vsetvl/{avl_single-1.c => avl_multiple-1.c} (54%)
 copy gcc/testsuite/gcc.target/riscv/rvv/vsetvl/{avl_single-9.c => avl_multiple-10. [...]
 copy gcc/testsuite/gcc.target/riscv/rvv/vsetvl/{avl_single-10.c => avl_multiple-11 [...]
 copy gcc/testsuite/gcc.target/riscv/rvv/vsetvl/{avl_single-11.c => avl_multiple-12 [...]
 copy gcc/testsuite/gcc.target/riscv/rvv/vsetvl/{avl_single-13.c => avl_multiple-13 [...]
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-14.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-15.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-16.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-2.c
 copy gcc/testsuite/gcc.target/riscv/rvv/vsetvl/{avl_single-4.c => avl_multiple-3.c} (65%)
 copy gcc/testsuite/gcc.target/riscv/rvv/vsetvl/{avl_single-4.c => avl_multiple-4.c} (66%)
 copy gcc/testsuite/gcc.target/riscv/rvv/vsetvl/{avl_single-4.c => avl_multiple-5.c} (60%)
 copy gcc/testsuite/gcc.target/riscv/rvv/vsetvl/{avl_single-4.c => avl_multiple-6.c} (60%)
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_multiple-7.c
 copy gcc/testsuite/gcc.target/riscv/rvv/vsetvl/{avl_single-4.c => avl_multiple-8.c} (60%)
 copy gcc/testsuite/gcc.target/riscv/rvv/vsetvl/{avl_single-9.c => avl_multiple-9.c} (76%)
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-73.c
 copy gcc/testsuite/gcc.target/riscv/rvv/vsetvl/{avl_single-14.c => avl_single-74.c} (57%)
 copy gcc/testsuite/gcc.target/riscv/rvv/vsetvl/{avl_single-31.c => avl_single-75.c} (56%)
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-10.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-11.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-12.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-13.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-14.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-15.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-16.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-17.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-18.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-19.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-20.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-3.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-5.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-6.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-7.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-8.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvl-9.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-1.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-10.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-11.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-12.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-13.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-14.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-15.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-16.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-17.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-18.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-19.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-20.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-3.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-5.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-6.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-7.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-8.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vsetvlmax-9.c
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[Tcwg-commits] [gcc] branch master updated (ffa29648b2f -> d324d56221d)