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from 1f645368469 RISC-V: testsuite: Skip test with -flto new 7b815107f40 RISC-V: Disallow negative step for interleaving [PR117682] new f71fe877da7 Daily bump. new f12bb6c26b8 rs6000: Add clobber and guard for vsx_stxvd2x4_le_const [PR116030]
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Summary of changes: ChangeLog | 4 + gcc/ChangeLog | 99 ++++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/ada/ChangeLog | 97 +++++++++++++++++++++ gcc/config/riscv/riscv-v.cc | 11 ++- gcc/config/rs6000/vsx.md | 10 ++- gcc/fortran/ChangeLog | 9 ++ gcc/m2/ChangeLog | 17 ++++ gcc/testsuite/ChangeLog | 78 +++++++++++++++++ gcc/testsuite/gcc.target/powerpc/pr116030.c | 22 +++++ .../gcc.target/riscv/rvv/autovec/pr117682.c | 15 ++++ libgomp/ChangeLog | 5 ++ libphobos/ChangeLog | 6 ++ 13 files changed, 368 insertions(+), 7 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/pr116030.c create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/pr117682.c